Lines Matching +full:ultra +full:- +full:low +full:- +full:power
2 SPDX-License-Identifier: BSD-3-Clause
4 Copyright (c) 2001-2020, Intel Corporation
66 #define E1000_ICH_FWSM_PCIM2PCI 0x01000000 /* ME PCIm-to-PCI active */
73 #define E1000_FWSM_ULP_CFG_DONE 0x00000400 /* Low power cfg done */
121 /* bit24: RXDCTL thresholds granularity: 0 - cache lines, 1 - descriptors */
132 #define E1000_PCH2_RAR_ENTRIES 5 /* RAR[0], SHRA[0-3] */
133 #define E1000_PCH_LPT_RAR_ENTRIES 12 /* RAR[0], SHRA[0-10] */
170 /* Half-duplex collision counts */
197 /* I218 Ultra Low Power Configuration 1 Register */
220 /* Strapping Option Register - RO */
229 #define HV_OEM_BITS_LPLU 0x0004 /* Low Power Link Up */
231 #define HV_OEM_BITS_RESTART_AN 0x0400 /* Restart Auto-negotiation */
242 /* PHY Power Management Control */
257 /* Low Power Idle GPIO Control */
261 /* PHY Low Power Idle Control */