203 	u16 phy_reg = 0;  in e1000_phy_is_accessible_pchlan()  local
210 		ret_val = hw->phy.ops.read_reg_locked(hw, PHY_ID1, &phy_reg);  in e1000_phy_is_accessible_pchlan()
211 		if (ret_val || (phy_reg == 0xFFFF))  in e1000_phy_is_accessible_pchlan()
213 		phy_id = (u32)(phy_reg << 16);  in e1000_phy_is_accessible_pchlan()
215 		ret_val = hw->phy.ops.read_reg_locked(hw, PHY_ID2, &phy_reg);  in e1000_phy_is_accessible_pchlan()
216 		if (ret_val || (phy_reg == 0xFFFF)) {  in e1000_phy_is_accessible_pchlan()
220 		phy_id |= (u32)(phy_reg & PHY_REVISION_MASK);  in e1000_phy_is_accessible_pchlan()
229 		hw->phy.revision = (u32)(phy_reg & ~PHY_REVISION_MASK);  in e1000_phy_is_accessible_pchlan()
252 			hw->phy.ops.read_reg_locked(hw, CV_SMB_CTRL, &phy_reg);  in e1000_phy_is_accessible_pchlan()
253 			phy_reg &= ~CV_SMB_CTRL_FORCE_SMBUS;  in e1000_phy_is_accessible_pchlan()
254 			hw->phy.ops.write_reg_locked(hw, CV_SMB_CTRL, phy_reg);  in e1000_phy_is_accessible_pchlan()
1276 	u16 phy_reg;  in e1000_enable_ulp_lpt_lp()  local
1323 	ret_val = e1000_read_phy_reg_hv_locked(hw, CV_SMB_CTRL, &phy_reg);  in e1000_enable_ulp_lpt_lp()
1326 	phy_reg |= CV_SMB_CTRL_FORCE_SMBUS;  in e1000_enable_ulp_lpt_lp()
1327 	e1000_write_phy_reg_hv_locked(hw, CV_SMB_CTRL, phy_reg);  in e1000_enable_ulp_lpt_lp()
1343 		phy_reg = oem_reg;  in e1000_enable_ulp_lpt_lp()
1344 		phy_reg |= HV_OEM_BITS_LPLU | HV_OEM_BITS_GBE_DIS;  in e1000_enable_ulp_lpt_lp()
1347 							phy_reg);  in e1000_enable_ulp_lpt_lp()
1356 	ret_val = e1000_read_phy_reg_hv_locked(hw, I218_ULP_CONFIG1, &phy_reg);  in e1000_enable_ulp_lpt_lp()
1359 	phy_reg |= (I218_ULP_CONFIG1_RESET_TO_SMBUS |  in e1000_enable_ulp_lpt_lp()
1363 			phy_reg |= I218_ULP_CONFIG1_WOL_HOST;  in e1000_enable_ulp_lpt_lp()
1365 			phy_reg &= ~I218_ULP_CONFIG1_WOL_HOST;  in e1000_enable_ulp_lpt_lp()
1367 		phy_reg |= I218_ULP_CONFIG1_STICKY_ULP;  in e1000_enable_ulp_lpt_lp()
1368 		phy_reg &= ~I218_ULP_CONFIG1_INBAND_EXIT;  in e1000_enable_ulp_lpt_lp()
1370 		phy_reg |= I218_ULP_CONFIG1_INBAND_EXIT;  in e1000_enable_ulp_lpt_lp()
1371 		phy_reg &= ~I218_ULP_CONFIG1_STICKY_ULP;  in e1000_enable_ulp_lpt_lp()
1372 		phy_reg &= ~I218_ULP_CONFIG1_WOL_HOST;  in e1000_enable_ulp_lpt_lp()
1374 	e1000_write_phy_reg_hv_locked(hw, I218_ULP_CONFIG1, phy_reg);  in e1000_enable_ulp_lpt_lp()
1382 	phy_reg |= I218_ULP_CONFIG1_START;  in e1000_enable_ulp_lpt_lp()
1383 	e1000_write_phy_reg_hv_locked(hw, I218_ULP_CONFIG1, phy_reg);  in e1000_enable_ulp_lpt_lp()
1424 	u16 phy_reg;  in e1000_disable_ulp_lpt_lp()  local
1481 	ret_val = e1000_read_phy_reg_hv_locked(hw, CV_SMB_CTRL, &phy_reg);  in e1000_disable_ulp_lpt_lp()
1493 						       &phy_reg);  in e1000_disable_ulp_lpt_lp()
1497 	phy_reg &= ~CV_SMB_CTRL_FORCE_SMBUS;  in e1000_disable_ulp_lpt_lp()
1498 	e1000_write_phy_reg_hv_locked(hw, CV_SMB_CTRL, phy_reg);  in e1000_disable_ulp_lpt_lp()
1508 	ret_val = e1000_read_phy_reg_hv_locked(hw, HV_PM_CTRL, &phy_reg);  in e1000_disable_ulp_lpt_lp()
1511 	phy_reg |= HV_PM_CTRL_K1_ENABLE;  in e1000_disable_ulp_lpt_lp()
1512 	e1000_write_phy_reg_hv_locked(hw, HV_PM_CTRL, phy_reg);  in e1000_disable_ulp_lpt_lp()
1515 	ret_val = e1000_read_phy_reg_hv_locked(hw, I218_ULP_CONFIG1, &phy_reg);  in e1000_disable_ulp_lpt_lp()
1518 	phy_reg &= ~(I218_ULP_CONFIG1_IND |  in e1000_disable_ulp_lpt_lp()
1526 	e1000_write_phy_reg_hv_locked(hw, I218_ULP_CONFIG1, phy_reg);  in e1000_disable_ulp_lpt_lp()
1529 	phy_reg |= I218_ULP_CONFIG1_START;  in e1000_disable_ulp_lpt_lp()
1530 	e1000_write_phy_reg_hv_locked(hw, I218_ULP_CONFIG1, phy_reg);  in e1000_disable_ulp_lpt_lp()
1566 	u16 phy_reg;  in e1000_check_for_copper_link_ich8lan()  local
1632 						    &phy_reg);  in e1000_check_for_copper_link_ich8lan()
1633 			phy_reg &= ~I217_PLL_CLOCK_GATE_MASK;  in e1000_check_for_copper_link_ich8lan()
1635 				phy_reg |= 0x3E8;  in e1000_check_for_copper_link_ich8lan()
1637 				phy_reg |= 0xFA;  in e1000_check_for_copper_link_ich8lan()
1640 						     phy_reg);  in e1000_check_for_copper_link_ich8lan()
1644 							    &phy_reg);  in e1000_check_for_copper_link_ich8lan()
1646 				phy_reg |= HV_PM_CTRL_K1_CLK_REQ;  in e1000_check_for_copper_link_ich8lan()
1649 							     phy_reg);  in e1000_check_for_copper_link_ich8lan()
1781 		hw->phy.ops.read_reg(hw, HV_KMRN_FIFO_CTRLSTA, &phy_reg);  in e1000_check_for_copper_link_ich8lan()
1782 		phy_reg &= ~HV_KMRN_FIFO_CTRLSTA_PREAMBLE_MASK;  in e1000_check_for_copper_link_ich8lan()
1786 			phy_reg |= (1 << HV_KMRN_FIFO_CTRLSTA_PREAMBLE_SHIFT);  in e1000_check_for_copper_link_ich8lan()
1788 		hw->phy.ops.write_reg(hw, HV_KMRN_FIFO_CTRLSTA, phy_reg);  in e1000_check_for_copper_link_ich8lan()
2175 	u16 phy_reg = 0;  in e1000_update_mc_addr_list_pch2lan()  local
2187 	ret_val = e1000_enable_phy_wakeup_reg_access_bm(hw, &phy_reg);  in e1000_update_mc_addr_list_pch2lan()
2200 	e1000_disable_phy_wakeup_reg_access_bm(hw, &phy_reg);  in e1000_update_mc_addr_list_pch2lan()
2728 	u16 i, phy_reg = 0;  in e1000_copy_rx_addrs_to_phy_ich8lan()  local
2736 	ret_val = e1000_enable_phy_wakeup_reg_access_bm(hw, &phy_reg);  in e1000_copy_rx_addrs_to_phy_ich8lan()
2756 	e1000_disable_phy_wakeup_reg_access_bm(hw, &phy_reg);  in e1000_copy_rx_addrs_to_phy_ich8lan()
2789 	u16 phy_reg, data;  in e1000_lv_jumbo_workaround_ich8lan()  local
2799 	hw->phy.ops.read_reg(hw, PHY_REG(769, 20), &phy_reg);  in e1000_lv_jumbo_workaround_ich8lan()
2801 					phy_reg | (1 << 14));  in e1000_lv_jumbo_workaround_ich8lan()
2951 	return hw->phy.ops.write_reg(hw, PHY_REG(769, 20), phy_reg &  in e1000_lv_jumbo_workaround_ich8lan()
5691 		u16 phy_reg, device_id = hw->device_id;  in e1000_suspend_workarounds_ich8lan()  local
5733 							    &phy_reg);  in e1000_suspend_workarounds_ich8lan()
5734 				phy_reg |= I217_LPI_GPIO_CTRL_AUTO_EN_LPI;  in e1000_suspend_workarounds_ich8lan()
5737 							     phy_reg);  in e1000_suspend_workarounds_ich8lan()
5752 						    &phy_reg);  in e1000_suspend_workarounds_ich8lan()
5753 			phy_reg |= I217_PROXY_CTRL_AUTO_DISABLE;  in e1000_suspend_workarounds_ich8lan()
5755 						     phy_reg);  in e1000_suspend_workarounds_ich8lan()
5760 			hw->phy.ops.read_reg_locked(hw, I217_SxCTRL, &phy_reg);  in e1000_suspend_workarounds_ich8lan()
5761 			phy_reg |= I217_SxCTRL_ENABLE_LPI_RESET;  in e1000_suspend_workarounds_ich8lan()
5762 			hw->phy.ops.write_reg_locked(hw, I217_SxCTRL, phy_reg);  in e1000_suspend_workarounds_ich8lan()
5765 			hw->phy.ops.read_reg_locked(hw, I217_MEMPWR, &phy_reg);  in e1000_suspend_workarounds_ich8lan()
5766 			phy_reg &= ~I217_MEMPWR_DISABLE_SMB_RELEASE;  in e1000_suspend_workarounds_ich8lan()
5767 			hw->phy.ops.write_reg_locked(hw, I217_MEMPWR, phy_reg);  in e1000_suspend_workarounds_ich8lan()
5773 		hw->phy.ops.read_reg_locked(hw, I217_CGFREG, &phy_reg);  in e1000_suspend_workarounds_ich8lan()
5774 		phy_reg |= I217_CGFREG_ENABLE_MTA_RESET;  in e1000_suspend_workarounds_ich8lan()
5775 		hw->phy.ops.write_reg_locked(hw, I217_CGFREG, phy_reg);  in e1000_suspend_workarounds_ich8lan()
5833 		u16 phy_reg;  in e1000_resume_workarounds_pchlan()  local
5842 		hw->phy.ops.read_reg_locked(hw, I217_LPI_GPIO_CTRL, &phy_reg);  in e1000_resume_workarounds_pchlan()
5843 		phy_reg &= ~I217_LPI_GPIO_CTRL_AUTO_EN_LPI;  in e1000_resume_workarounds_pchlan()
5844 		hw->phy.ops.write_reg_locked(hw, I217_LPI_GPIO_CTRL, phy_reg);  in e1000_resume_workarounds_pchlan()
5852 							      &phy_reg);  in e1000_resume_workarounds_pchlan()
5855 			phy_reg |= I217_MEMPWR_DISABLE_SMB_RELEASE;  in e1000_resume_workarounds_pchlan()
5856 			hw->phy.ops.write_reg_locked(hw, I217_MEMPWR, phy_reg);  in e1000_resume_workarounds_pchlan()
5863 						      &phy_reg);  in e1000_resume_workarounds_pchlan()
5866 		phy_reg &= ~I217_CGFREG_ENABLE_MTA_RESET;  in e1000_resume_workarounds_pchlan()
5867 		hw->phy.ops.write_reg_locked(hw, I217_CGFREG, phy_reg);  in e1000_resume_workarounds_pchlan()