Lines Matching refs:oem_reg
1277 u16 oem_reg = 0; in e1000_enable_ulp_lpt_lp() local
1339 &oem_reg); in e1000_enable_ulp_lpt_lp()
1343 phy_reg = oem_reg; in e1000_enable_ulp_lpt_lp()
1388 oem_reg); in e1000_enable_ulp_lpt_lp()
2552 u16 oem_reg; in e1000_oem_bits_config_ich8lan() local
2575 ret_val = hw->phy.ops.read_reg_locked(hw, HV_OEM_BITS, &oem_reg); in e1000_oem_bits_config_ich8lan()
2579 oem_reg &= ~(HV_OEM_BITS_GBE_DIS | HV_OEM_BITS_LPLU); in e1000_oem_bits_config_ich8lan()
2583 oem_reg |= HV_OEM_BITS_GBE_DIS; in e1000_oem_bits_config_ich8lan()
2586 oem_reg |= HV_OEM_BITS_LPLU; in e1000_oem_bits_config_ich8lan()
2590 oem_reg |= HV_OEM_BITS_GBE_DIS; in e1000_oem_bits_config_ich8lan()
2594 oem_reg |= HV_OEM_BITS_LPLU; in e1000_oem_bits_config_ich8lan()
2600 oem_reg |= HV_OEM_BITS_RESTART_AN; in e1000_oem_bits_config_ich8lan()
2602 ret_val = hw->phy.ops.write_reg_locked(hw, HV_OEM_BITS, oem_reg); in e1000_oem_bits_config_ich8lan()
3208 u16 oem_reg; in e1000_set_lplu_state_pchlan() local
3211 ret_val = hw->phy.ops.read_reg(hw, HV_OEM_BITS, &oem_reg); in e1000_set_lplu_state_pchlan()
3216 oem_reg |= HV_OEM_BITS_LPLU; in e1000_set_lplu_state_pchlan()
3218 oem_reg &= ~HV_OEM_BITS_LPLU; in e1000_set_lplu_state_pchlan()
3221 oem_reg |= HV_OEM_BITS_RESTART_AN; in e1000_set_lplu_state_pchlan()
3223 return hw->phy.ops.write_reg(hw, HV_OEM_BITS, oem_reg); in e1000_set_lplu_state_pchlan()