Lines Matching +full:hw +full:- +full:flow +full:- +full:ctrl
2 SPDX-License-Identifier: BSD-3-Clause
4 Copyright (c) 2001-2020, Intel Corporation
48 static s32 e1000_init_phy_params_82575(struct e1000_hw *hw);
49 static s32 e1000_init_mac_params_82575(struct e1000_hw *hw);
50 static s32 e1000_acquire_nvm_82575(struct e1000_hw *hw);
51 static void e1000_release_nvm_82575(struct e1000_hw *hw);
52 static s32 e1000_check_for_link_82575(struct e1000_hw *hw);
53 static s32 e1000_check_for_link_media_swap(struct e1000_hw *hw);
54 static s32 e1000_get_cfg_done_82575(struct e1000_hw *hw);
55 static s32 e1000_get_link_up_info_82575(struct e1000_hw *hw, u16 *speed,
57 static s32 e1000_phy_hw_reset_sgmii_82575(struct e1000_hw *hw);
58 static s32 e1000_read_phy_reg_sgmii_82575(struct e1000_hw *hw, u32 offset,
60 static s32 e1000_reset_hw_82575(struct e1000_hw *hw);
61 static s32 e1000_init_hw_82575(struct e1000_hw *hw);
62 static s32 e1000_reset_hw_82580(struct e1000_hw *hw);
63 static s32 e1000_read_phy_reg_82580(struct e1000_hw *hw,
65 static s32 e1000_write_phy_reg_82580(struct e1000_hw *hw,
67 static s32 e1000_set_d0_lplu_state_82580(struct e1000_hw *hw,
69 static s32 e1000_set_d3_lplu_state_82580(struct e1000_hw *hw,
71 static s32 e1000_set_d0_lplu_state_82575(struct e1000_hw *hw,
73 static s32 e1000_setup_copper_link_82575(struct e1000_hw *hw);
74 static s32 e1000_setup_serdes_link_82575(struct e1000_hw *hw);
75 static s32 e1000_get_media_type_82575(struct e1000_hw *hw);
76 static s32 e1000_set_sfp_media_type_82575(struct e1000_hw *hw);
77 static s32 e1000_valid_led_default_82575(struct e1000_hw *hw, u16 *data);
78 static s32 e1000_write_phy_reg_sgmii_82575(struct e1000_hw *hw,
80 static void e1000_clear_hw_cntrs_82575(struct e1000_hw *hw);
81 static s32 e1000_get_pcs_speed_and_duplex_82575(struct e1000_hw *hw,
83 static s32 e1000_get_phy_id_82575(struct e1000_hw *hw);
84 static bool e1000_sgmii_active_82575(struct e1000_hw *hw);
85 static s32 e1000_read_mac_addr_82575(struct e1000_hw *hw);
86 static void e1000_config_collision_dist_82575(struct e1000_hw *hw);
87 static void e1000_shutdown_serdes_link_82575(struct e1000_hw *hw);
88 static void e1000_power_up_serdes_link_82575(struct e1000_hw *hw);
89 static s32 e1000_set_pcie_completion_timeout(struct e1000_hw *hw);
90 static s32 e1000_reset_mdicnfg_82580(struct e1000_hw *hw);
91 static s32 e1000_validate_nvm_checksum_82580(struct e1000_hw *hw);
92 static s32 e1000_update_nvm_checksum_82580(struct e1000_hw *hw);
93 static s32 e1000_update_nvm_checksum_with_offset(struct e1000_hw *hw,
95 static s32 e1000_validate_nvm_checksum_with_offset(struct e1000_hw *hw,
97 static s32 e1000_validate_nvm_checksum_i350(struct e1000_hw *hw);
98 static s32 e1000_update_nvm_checksum_i350(struct e1000_hw *hw);
99 static void e1000_clear_vfta_i350(struct e1000_hw *hw);
101 static void e1000_i2c_start(struct e1000_hw *hw);
102 static void e1000_i2c_stop(struct e1000_hw *hw);
103 static void e1000_clock_in_i2c_byte(struct e1000_hw *hw, u8 *data);
104 static s32 e1000_clock_out_i2c_byte(struct e1000_hw *hw, u8 data);
105 static s32 e1000_get_i2c_ack(struct e1000_hw *hw);
106 static void e1000_clock_in_i2c_bit(struct e1000_hw *hw, bool *data);
107 static s32 e1000_clock_out_i2c_bit(struct e1000_hw *hw, bool data);
108 static void e1000_raise_i2c_clk(struct e1000_hw *hw, u32 *i2cctl);
109 static void e1000_lower_i2c_clk(struct e1000_hw *hw, u32 *i2cctl);
110 static s32 e1000_set_i2c_data(struct e1000_hw *hw, u32 *i2cctl, bool data);
121 * e1000_sgmii_uses_mdio_82575 - Determine if I2C pins are for external MDIO
122 * @hw: pointer to the HW structure
127 static bool e1000_sgmii_uses_mdio_82575(struct e1000_hw *hw) in e1000_sgmii_uses_mdio_82575() argument
134 switch (hw->mac.type) { in e1000_sgmii_uses_mdio_82575()
137 reg = E1000_READ_REG(hw, E1000_MDIC); in e1000_sgmii_uses_mdio_82575()
145 reg = E1000_READ_REG(hw, E1000_MDICNFG); in e1000_sgmii_uses_mdio_82575()
155 * e1000_init_phy_params_82575 - Initialize PHY function ptrs
156 * @hw: pointer to the HW structure
158 static s32 e1000_init_phy_params_82575(struct e1000_hw *hw) in e1000_init_phy_params_82575() argument
160 struct e1000_phy_info *phy = &hw->phy; in e1000_init_phy_params_82575()
166 phy->ops.read_i2c_byte = e1000_read_i2c_byte_generic; in e1000_init_phy_params_82575()
167 phy->ops.write_i2c_byte = e1000_write_i2c_byte_generic; in e1000_init_phy_params_82575()
169 if (hw->phy.media_type != e1000_media_type_copper) { in e1000_init_phy_params_82575()
170 phy->type = e1000_phy_none; in e1000_init_phy_params_82575()
174 phy->ops.power_up = e1000_power_up_phy_copper; in e1000_init_phy_params_82575()
175 phy->ops.power_down = e1000_power_down_phy_copper_base; in e1000_init_phy_params_82575()
177 phy->autoneg_mask = AUTONEG_ADVERTISE_SPEED_DEFAULT; in e1000_init_phy_params_82575()
178 phy->reset_delay_us = 100; in e1000_init_phy_params_82575()
180 phy->ops.acquire = e1000_acquire_phy_base; in e1000_init_phy_params_82575()
181 phy->ops.check_reset_block = e1000_check_reset_block_generic; in e1000_init_phy_params_82575()
182 phy->ops.commit = e1000_phy_sw_reset_generic; in e1000_init_phy_params_82575()
183 phy->ops.get_cfg_done = e1000_get_cfg_done_82575; in e1000_init_phy_params_82575()
184 phy->ops.release = e1000_release_phy_base; in e1000_init_phy_params_82575()
186 ctrl_ext = E1000_READ_REG(hw, E1000_CTRL_EXT); in e1000_init_phy_params_82575()
188 if (e1000_sgmii_active_82575(hw)) { in e1000_init_phy_params_82575()
189 phy->ops.reset = e1000_phy_hw_reset_sgmii_82575; in e1000_init_phy_params_82575()
192 phy->ops.reset = e1000_phy_hw_reset_generic; in e1000_init_phy_params_82575()
196 E1000_WRITE_REG(hw, E1000_CTRL_EXT, ctrl_ext); in e1000_init_phy_params_82575()
197 e1000_reset_mdicnfg_82580(hw); in e1000_init_phy_params_82575()
199 if (e1000_sgmii_active_82575(hw) && !e1000_sgmii_uses_mdio_82575(hw)) { in e1000_init_phy_params_82575()
200 phy->ops.read_reg = e1000_read_phy_reg_sgmii_82575; in e1000_init_phy_params_82575()
201 phy->ops.write_reg = e1000_write_phy_reg_sgmii_82575; in e1000_init_phy_params_82575()
203 switch (hw->mac.type) { in e1000_init_phy_params_82575()
207 phy->ops.read_reg = e1000_read_phy_reg_82580; in e1000_init_phy_params_82575()
208 phy->ops.write_reg = e1000_write_phy_reg_82580; in e1000_init_phy_params_82575()
212 phy->ops.read_reg = e1000_read_phy_reg_gs40g; in e1000_init_phy_params_82575()
213 phy->ops.write_reg = e1000_write_phy_reg_gs40g; in e1000_init_phy_params_82575()
216 phy->ops.read_reg = e1000_read_phy_reg_igp; in e1000_init_phy_params_82575()
217 phy->ops.write_reg = e1000_write_phy_reg_igp; in e1000_init_phy_params_82575()
221 /* Set phy->phy_addr and phy->id. */ in e1000_init_phy_params_82575()
222 ret_val = e1000_get_phy_id_82575(hw); in e1000_init_phy_params_82575()
225 switch (phy->id) { in e1000_init_phy_params_82575()
231 phy->type = e1000_phy_m88; in e1000_init_phy_params_82575()
232 phy->ops.check_polarity = e1000_check_polarity_m88; in e1000_init_phy_params_82575()
233 phy->ops.get_info = e1000_get_phy_info_m88; in e1000_init_phy_params_82575()
234 phy->ops.get_cable_length = e1000_get_cable_length_m88_gen2; in e1000_init_phy_params_82575()
235 phy->ops.force_speed_duplex = e1000_phy_force_speed_duplex_m88; in e1000_init_phy_params_82575()
238 phy->type = e1000_phy_m88; in e1000_init_phy_params_82575()
239 phy->ops.check_polarity = e1000_check_polarity_m88; in e1000_init_phy_params_82575()
240 phy->ops.get_info = e1000_get_phy_info_m88; in e1000_init_phy_params_82575()
241 phy->ops.get_cable_length = e1000_get_cable_length_m88; in e1000_init_phy_params_82575()
242 phy->ops.force_speed_duplex = e1000_phy_force_speed_duplex_m88; in e1000_init_phy_params_82575()
246 phy->type = e1000_phy_igp_3; in e1000_init_phy_params_82575()
247 phy->ops.check_polarity = e1000_check_polarity_igp; in e1000_init_phy_params_82575()
248 phy->ops.get_info = e1000_get_phy_info_igp; in e1000_init_phy_params_82575()
249 phy->ops.get_cable_length = e1000_get_cable_length_igp_2; in e1000_init_phy_params_82575()
250 phy->ops.set_d0_lplu_state = e1000_set_d0_lplu_state_82575; in e1000_init_phy_params_82575()
251 phy->ops.set_d3_lplu_state = e1000_set_d3_lplu_state_generic; in e1000_init_phy_params_82575()
252 phy->ops.force_speed_duplex = e1000_phy_force_speed_duplex_igp; in e1000_init_phy_params_82575()
256 phy->type = e1000_phy_82580; in e1000_init_phy_params_82575()
257 phy->ops.check_polarity = e1000_check_polarity_82577; in e1000_init_phy_params_82575()
258 phy->ops.get_info = e1000_get_phy_info_82577; in e1000_init_phy_params_82575()
259 phy->ops.get_cable_length = e1000_get_cable_length_82577; in e1000_init_phy_params_82575()
260 phy->ops.set_d0_lplu_state = e1000_set_d0_lplu_state_82580; in e1000_init_phy_params_82575()
261 phy->ops.set_d3_lplu_state = e1000_set_d3_lplu_state_82580; in e1000_init_phy_params_82575()
262 phy->ops.force_speed_duplex = in e1000_init_phy_params_82575()
266 phy->type = e1000_phy_i210; in e1000_init_phy_params_82575()
267 phy->ops.check_polarity = e1000_check_polarity_m88; in e1000_init_phy_params_82575()
268 phy->ops.get_info = e1000_get_phy_info_m88; in e1000_init_phy_params_82575()
269 phy->ops.get_cable_length = e1000_get_cable_length_m88_gen2; in e1000_init_phy_params_82575()
270 phy->ops.set_d0_lplu_state = e1000_set_d0_lplu_state_82580; in e1000_init_phy_params_82575()
271 phy->ops.set_d3_lplu_state = e1000_set_d3_lplu_state_82580; in e1000_init_phy_params_82575()
272 phy->ops.force_speed_duplex = e1000_phy_force_speed_duplex_m88; in e1000_init_phy_params_82575()
275 ret_val = -E1000_ERR_PHY; in e1000_init_phy_params_82575()
280 switch (phy->id) { in e1000_init_phy_params_82575()
285 ret_val = phy->ops.write_reg(hw, E1000_M88E1112_PAGE_ADDR, 2); in e1000_init_phy_params_82575()
288 ret_val = phy->ops.read_reg(hw, E1000_M88E1112_MAC_CTRL_1, in e1000_init_phy_params_82575()
297 hw->mac.ops.check_for_link = in e1000_init_phy_params_82575()
303 ret_val = e1000_initialize_M88E1512_phy(hw); in e1000_init_phy_params_82575()
308 ret_val = e1000_initialize_M88E1543_phy(hw); in e1000_init_phy_params_82575()
320 * e1000_init_mac_params_82575 - Init MAC func ptrs.
321 * @hw: pointer to the HW structure
323 static s32 e1000_init_mac_params_82575(struct e1000_hw *hw) in e1000_init_mac_params_82575() argument
325 struct e1000_mac_info *mac = &hw->mac; in e1000_init_mac_params_82575()
326 struct e1000_dev_spec_82575 *dev_spec = &hw->dev_spec._82575; in e1000_init_mac_params_82575()
331 e1000_init_mac_ops_generic(hw); in e1000_init_mac_params_82575()
334 e1000_get_media_type_82575(hw); in e1000_init_mac_params_82575()
336 mac->mta_reg_count = 128; in e1000_init_mac_params_82575()
338 mac->uta_reg_count = (hw->mac.type == e1000_82575) ? 0 : 128; in e1000_init_mac_params_82575()
340 mac->rar_entry_count = E1000_RAR_ENTRIES_82575; in e1000_init_mac_params_82575()
341 if (mac->type == e1000_82576) in e1000_init_mac_params_82575()
342 mac->rar_entry_count = E1000_RAR_ENTRIES_82576; in e1000_init_mac_params_82575()
343 if (mac->type == e1000_82580) in e1000_init_mac_params_82575()
344 mac->rar_entry_count = E1000_RAR_ENTRIES_82580; in e1000_init_mac_params_82575()
345 if (mac->type == e1000_i350 || mac->type == e1000_i354) in e1000_init_mac_params_82575()
346 mac->rar_entry_count = E1000_RAR_ENTRIES_I350; in e1000_init_mac_params_82575()
349 if (mac->type >= e1000_i350) in e1000_init_mac_params_82575()
350 dev_spec->eee_disable = false; in e1000_init_mac_params_82575()
353 if (mac->type >= e1000_i210) in e1000_init_mac_params_82575()
354 dev_spec->clear_semaphore_once = true; in e1000_init_mac_params_82575()
357 mac->asf_firmware_present = true; in e1000_init_mac_params_82575()
359 mac->has_fwsm = true; in e1000_init_mac_params_82575()
361 mac->arc_subsystem_valid = in e1000_init_mac_params_82575()
362 !!(E1000_READ_REG(hw, E1000_FWSM) & E1000_FWSM_MODE_MASK); in e1000_init_mac_params_82575()
367 mac->ops.get_bus_info = e1000_get_bus_info_pcie_generic; in e1000_init_mac_params_82575()
369 if (mac->type >= e1000_82580) in e1000_init_mac_params_82575()
370 mac->ops.reset_hw = e1000_reset_hw_82580; in e1000_init_mac_params_82575()
372 mac->ops.reset_hw = e1000_reset_hw_82575; in e1000_init_mac_params_82575()
373 /* HW initialization */ in e1000_init_mac_params_82575()
374 if ((mac->type == e1000_i210) || (mac->type == e1000_i211)) in e1000_init_mac_params_82575()
375 mac->ops.init_hw = e1000_init_hw_i210; in e1000_init_mac_params_82575()
377 mac->ops.init_hw = e1000_init_hw_82575; in e1000_init_mac_params_82575()
379 mac->ops.setup_link = e1000_setup_link_generic; in e1000_init_mac_params_82575()
381 mac->ops.setup_physical_interface = in e1000_init_mac_params_82575()
382 (hw->phy.media_type == e1000_media_type_copper) in e1000_init_mac_params_82575()
385 mac->ops.shutdown_serdes = e1000_shutdown_serdes_link_82575; in e1000_init_mac_params_82575()
387 mac->ops.power_up_serdes = e1000_power_up_serdes_link_82575; in e1000_init_mac_params_82575()
389 mac->ops.check_for_link = e1000_check_for_link_82575; in e1000_init_mac_params_82575()
391 mac->ops.read_mac_addr = e1000_read_mac_addr_82575; in e1000_init_mac_params_82575()
393 mac->ops.config_collision_dist = e1000_config_collision_dist_82575; in e1000_init_mac_params_82575()
395 mac->ops.update_mc_addr_list = e1000_update_mc_addr_list_generic; in e1000_init_mac_params_82575()
396 if (hw->mac.type == e1000_i350 || mac->type == e1000_i354) { in e1000_init_mac_params_82575()
398 mac->ops.write_vfta = e1000_write_vfta_i350; in e1000_init_mac_params_82575()
400 mac->ops.clear_vfta = e1000_clear_vfta_i350; in e1000_init_mac_params_82575()
403 mac->ops.write_vfta = e1000_write_vfta_generic; in e1000_init_mac_params_82575()
405 mac->ops.clear_vfta = e1000_clear_vfta_generic; in e1000_init_mac_params_82575()
407 if (hw->mac.type >= e1000_82580) in e1000_init_mac_params_82575()
408 mac->ops.validate_mdi_setting = in e1000_init_mac_params_82575()
411 mac->ops.id_led_init = e1000_id_led_init_generic; in e1000_init_mac_params_82575()
413 mac->ops.blink_led = e1000_blink_led_generic; in e1000_init_mac_params_82575()
415 mac->ops.setup_led = e1000_setup_led_generic; in e1000_init_mac_params_82575()
417 mac->ops.cleanup_led = e1000_cleanup_led_generic; in e1000_init_mac_params_82575()
419 mac->ops.led_on = e1000_led_on_generic; in e1000_init_mac_params_82575()
420 mac->ops.led_off = e1000_led_off_generic; in e1000_init_mac_params_82575()
422 mac->ops.clear_hw_cntrs = e1000_clear_hw_cntrs_82575; in e1000_init_mac_params_82575()
424 mac->ops.get_link_up_info = e1000_get_link_up_info_82575; in e1000_init_mac_params_82575()
426 mac->ops.acquire_swfw_sync = e1000_acquire_swfw_sync; in e1000_init_mac_params_82575()
428 mac->ops.release_swfw_sync = e1000_release_swfw_sync; in e1000_init_mac_params_82575()
431 hw->mac.ops.set_lan_id(hw); in e1000_init_mac_params_82575()
437 * e1000_init_nvm_params_82575 - Initialize NVM function ptrs
438 * @hw: pointer to the HW structure
440 s32 e1000_init_nvm_params_82575(struct e1000_hw *hw) in e1000_init_nvm_params_82575() argument
442 struct e1000_nvm_info *nvm = &hw->nvm; in e1000_init_nvm_params_82575()
443 u32 eecd = E1000_READ_REG(hw, E1000_EECD); in e1000_init_nvm_params_82575()
450 /* Added to a constant, "size" becomes the left-shift value in e1000_init_nvm_params_82575()
461 nvm->word_size = 1 << size; in e1000_init_nvm_params_82575()
462 if (hw->mac.type < e1000_i210) { in e1000_init_nvm_params_82575()
463 nvm->opcode_bits = 8; in e1000_init_nvm_params_82575()
464 nvm->delay_usec = 1; in e1000_init_nvm_params_82575()
466 switch (nvm->override) { in e1000_init_nvm_params_82575()
468 nvm->page_size = 32; in e1000_init_nvm_params_82575()
469 nvm->address_bits = 16; in e1000_init_nvm_params_82575()
472 nvm->page_size = 8; in e1000_init_nvm_params_82575()
473 nvm->address_bits = 8; in e1000_init_nvm_params_82575()
476 nvm->page_size = eecd & E1000_EECD_ADDR_BITS ? 32 : 8; in e1000_init_nvm_params_82575()
477 nvm->address_bits = eecd & E1000_EECD_ADDR_BITS ? in e1000_init_nvm_params_82575()
481 if (nvm->word_size == (1 << 15)) in e1000_init_nvm_params_82575()
482 nvm->page_size = 128; in e1000_init_nvm_params_82575()
484 nvm->type = e1000_nvm_eeprom_spi; in e1000_init_nvm_params_82575()
486 nvm->type = e1000_nvm_flash_hw; in e1000_init_nvm_params_82575()
490 nvm->ops.acquire = e1000_acquire_nvm_82575; in e1000_init_nvm_params_82575()
491 nvm->ops.release = e1000_release_nvm_82575; in e1000_init_nvm_params_82575()
492 if (nvm->word_size < (1 << 15)) in e1000_init_nvm_params_82575()
493 nvm->ops.read = e1000_read_nvm_eerd; in e1000_init_nvm_params_82575()
495 nvm->ops.read = e1000_read_nvm_spi; in e1000_init_nvm_params_82575()
497 nvm->ops.write = e1000_write_nvm_spi; in e1000_init_nvm_params_82575()
498 nvm->ops.validate = e1000_validate_nvm_checksum_generic; in e1000_init_nvm_params_82575()
499 nvm->ops.update = e1000_update_nvm_checksum_generic; in e1000_init_nvm_params_82575()
500 nvm->ops.valid_led_default = e1000_valid_led_default_82575; in e1000_init_nvm_params_82575()
503 switch (hw->mac.type) { in e1000_init_nvm_params_82575()
505 nvm->ops.validate = e1000_validate_nvm_checksum_82580; in e1000_init_nvm_params_82575()
506 nvm->ops.update = e1000_update_nvm_checksum_82580; in e1000_init_nvm_params_82575()
509 nvm->ops.validate = e1000_validate_nvm_checksum_i350; in e1000_init_nvm_params_82575()
510 nvm->ops.update = e1000_update_nvm_checksum_i350; in e1000_init_nvm_params_82575()
520 * e1000_init_function_pointers_82575 - Init func ptrs.
521 * @hw: pointer to the HW structure
525 void e1000_init_function_pointers_82575(struct e1000_hw *hw) in e1000_init_function_pointers_82575() argument
529 hw->mac.ops.init_params = e1000_init_mac_params_82575; in e1000_init_function_pointers_82575()
530 hw->nvm.ops.init_params = e1000_init_nvm_params_82575; in e1000_init_function_pointers_82575()
531 hw->phy.ops.init_params = e1000_init_phy_params_82575; in e1000_init_function_pointers_82575()
532 hw->mbx.ops.init_params = e1000_init_mbx_params_pf; in e1000_init_function_pointers_82575()
536 * e1000_read_phy_reg_sgmii_82575 - Read PHY register using sgmii
537 * @hw: pointer to the HW structure
544 static s32 e1000_read_phy_reg_sgmii_82575(struct e1000_hw *hw, u32 offset, in e1000_read_phy_reg_sgmii_82575() argument
547 s32 ret_val = -E1000_ERR_PARAM; in e1000_read_phy_reg_sgmii_82575()
556 ret_val = hw->phy.ops.acquire(hw); in e1000_read_phy_reg_sgmii_82575()
560 ret_val = e1000_read_phy_reg_i2c(hw, offset, data); in e1000_read_phy_reg_sgmii_82575()
562 hw->phy.ops.release(hw); in e1000_read_phy_reg_sgmii_82575()
569 * e1000_write_phy_reg_sgmii_82575 - Write PHY register using sgmii
570 * @hw: pointer to the HW structure
577 static s32 e1000_write_phy_reg_sgmii_82575(struct e1000_hw *hw, u32 offset, in e1000_write_phy_reg_sgmii_82575() argument
580 s32 ret_val = -E1000_ERR_PARAM; in e1000_write_phy_reg_sgmii_82575()
589 ret_val = hw->phy.ops.acquire(hw); in e1000_write_phy_reg_sgmii_82575()
593 ret_val = e1000_write_phy_reg_i2c(hw, offset, data); in e1000_write_phy_reg_sgmii_82575()
595 hw->phy.ops.release(hw); in e1000_write_phy_reg_sgmii_82575()
602 * e1000_get_phy_id_82575 - Retrieve PHY addr and id
603 * @hw: pointer to the HW structure
608 static s32 e1000_get_phy_id_82575(struct e1000_hw *hw) in e1000_get_phy_id_82575() argument
610 struct e1000_phy_info *phy = &hw->phy; in e1000_get_phy_id_82575()
619 if (hw->mac.type == e1000_i354) in e1000_get_phy_id_82575()
620 e1000_get_phy_id(hw); in e1000_get_phy_id_82575()
624 * we find one that works. For non-SGMII PHYs in e1000_get_phy_id_82575()
626 * work. The result of this function should mean phy->phy_addr in e1000_get_phy_id_82575()
627 * and phy->id are set correctly. in e1000_get_phy_id_82575()
629 if (!e1000_sgmii_active_82575(hw)) { in e1000_get_phy_id_82575()
630 phy->addr = 1; in e1000_get_phy_id_82575()
631 ret_val = e1000_get_phy_id(hw); in e1000_get_phy_id_82575()
635 if (e1000_sgmii_uses_mdio_82575(hw)) { in e1000_get_phy_id_82575()
636 switch (hw->mac.type) { in e1000_get_phy_id_82575()
639 mdic = E1000_READ_REG(hw, E1000_MDIC); in e1000_get_phy_id_82575()
641 phy->addr = mdic >> E1000_MDIC_PHY_SHIFT; in e1000_get_phy_id_82575()
648 mdic = E1000_READ_REG(hw, E1000_MDICNFG); in e1000_get_phy_id_82575()
650 phy->addr = mdic >> E1000_MDICNFG_PHY_SHIFT; in e1000_get_phy_id_82575()
653 ret_val = -E1000_ERR_PHY; in e1000_get_phy_id_82575()
657 ret_val = e1000_get_phy_id(hw); in e1000_get_phy_id_82575()
662 ctrl_ext = E1000_READ_REG(hw, E1000_CTRL_EXT); in e1000_get_phy_id_82575()
663 E1000_WRITE_REG(hw, E1000_CTRL_EXT, in e1000_get_phy_id_82575()
665 E1000_WRITE_FLUSH(hw); in e1000_get_phy_id_82575()
670 * Therefore, we need to test 1-7 in e1000_get_phy_id_82575()
672 for (phy->addr = 1; phy->addr < 8; phy->addr++) { in e1000_get_phy_id_82575()
673 ret_val = e1000_read_phy_reg_sgmii_82575(hw, PHY_ID1, &phy_id); in e1000_get_phy_id_82575()
676 phy_id, phy->addr); in e1000_get_phy_id_82575()
685 phy->addr); in e1000_get_phy_id_82575()
690 if (phy->addr == 8) { in e1000_get_phy_id_82575()
691 phy->addr = 0; in e1000_get_phy_id_82575()
692 ret_val = -E1000_ERR_PHY; in e1000_get_phy_id_82575()
694 ret_val = e1000_get_phy_id(hw); in e1000_get_phy_id_82575()
698 E1000_WRITE_REG(hw, E1000_CTRL_EXT, ctrl_ext); in e1000_get_phy_id_82575()
705 * e1000_phy_hw_reset_sgmii_82575 - Performs a PHY reset
706 * @hw: pointer to the HW structure
710 static s32 e1000_phy_hw_reset_sgmii_82575(struct e1000_hw *hw) in e1000_phy_hw_reset_sgmii_82575() argument
713 struct e1000_phy_info *phy = &hw->phy; in e1000_phy_hw_reset_sgmii_82575()
724 if (!(hw->phy.ops.write_reg)) in e1000_phy_hw_reset_sgmii_82575()
731 ret_val = hw->phy.ops.write_reg(hw, 0x1B, 0x8084); in e1000_phy_hw_reset_sgmii_82575()
735 ret_val = hw->phy.ops.commit(hw); in e1000_phy_hw_reset_sgmii_82575()
739 if (phy->id == M88E1512_E_PHY_ID) in e1000_phy_hw_reset_sgmii_82575()
740 ret_val = e1000_initialize_M88E1512_phy(hw); in e1000_phy_hw_reset_sgmii_82575()
746 * e1000_set_d0_lplu_state_82575 - Set Low Power Linkup D0 state
747 * @hw: pointer to the HW structure
758 static s32 e1000_set_d0_lplu_state_82575(struct e1000_hw *hw, bool active) in e1000_set_d0_lplu_state_82575() argument
760 struct e1000_phy_info *phy = &hw->phy; in e1000_set_d0_lplu_state_82575()
766 if (!(hw->phy.ops.read_reg)) in e1000_set_d0_lplu_state_82575()
769 ret_val = phy->ops.read_reg(hw, IGP02E1000_PHY_POWER_MGMT, &data); in e1000_set_d0_lplu_state_82575()
775 ret_val = phy->ops.write_reg(hw, IGP02E1000_PHY_POWER_MGMT, in e1000_set_d0_lplu_state_82575()
781 ret_val = phy->ops.read_reg(hw, IGP01E1000_PHY_PORT_CONFIG, in e1000_set_d0_lplu_state_82575()
784 ret_val = phy->ops.write_reg(hw, IGP01E1000_PHY_PORT_CONFIG, in e1000_set_d0_lplu_state_82575()
790 ret_val = phy->ops.write_reg(hw, IGP02E1000_PHY_POWER_MGMT, in e1000_set_d0_lplu_state_82575()
798 if (phy->smart_speed == e1000_smart_speed_on) { in e1000_set_d0_lplu_state_82575()
799 ret_val = phy->ops.read_reg(hw, in e1000_set_d0_lplu_state_82575()
806 ret_val = phy->ops.write_reg(hw, in e1000_set_d0_lplu_state_82575()
811 } else if (phy->smart_speed == e1000_smart_speed_off) { in e1000_set_d0_lplu_state_82575()
812 ret_val = phy->ops.read_reg(hw, in e1000_set_d0_lplu_state_82575()
819 ret_val = phy->ops.write_reg(hw, in e1000_set_d0_lplu_state_82575()
832 * e1000_set_d0_lplu_state_82580 - Set Low Power Linkup D0 state
833 * @hw: pointer to the HW structure
844 static s32 e1000_set_d0_lplu_state_82580(struct e1000_hw *hw, bool active) in e1000_set_d0_lplu_state_82580() argument
846 struct e1000_phy_info *phy = &hw->phy; in e1000_set_d0_lplu_state_82580()
851 data = E1000_READ_REG(hw, E1000_82580_PHY_POWER_MGMT); in e1000_set_d0_lplu_state_82580()
867 if (phy->smart_speed == e1000_smart_speed_on) in e1000_set_d0_lplu_state_82580()
869 else if (phy->smart_speed == e1000_smart_speed_off) in e1000_set_d0_lplu_state_82580()
873 E1000_WRITE_REG(hw, E1000_82580_PHY_POWER_MGMT, data); in e1000_set_d0_lplu_state_82580()
878 * e1000_set_d3_lplu_state_82580 - Sets low power link up state for D3
879 * @hw: pointer to the HW structure
891 s32 e1000_set_d3_lplu_state_82580(struct e1000_hw *hw, bool active) in e1000_set_d3_lplu_state_82580() argument
893 struct e1000_phy_info *phy = &hw->phy; in e1000_set_d3_lplu_state_82580()
898 data = E1000_READ_REG(hw, E1000_82580_PHY_POWER_MGMT); in e1000_set_d3_lplu_state_82580()
908 if (phy->smart_speed == e1000_smart_speed_on) in e1000_set_d3_lplu_state_82580()
910 else if (phy->smart_speed == e1000_smart_speed_off) in e1000_set_d3_lplu_state_82580()
912 } else if ((phy->autoneg_advertised == E1000_ALL_SPEED_DUPLEX) || in e1000_set_d3_lplu_state_82580()
913 (phy->autoneg_advertised == E1000_ALL_NOT_GIG) || in e1000_set_d3_lplu_state_82580()
914 (phy->autoneg_advertised == E1000_ALL_10_SPEED)) { in e1000_set_d3_lplu_state_82580()
920 E1000_WRITE_REG(hw, E1000_82580_PHY_POWER_MGMT, data); in e1000_set_d3_lplu_state_82580()
925 * e1000_acquire_nvm_82575 - Request for access to EEPROM
926 * @hw: pointer to the HW structure
931 * EEPROM access and return -E1000_ERR_NVM (-1).
933 static s32 e1000_acquire_nvm_82575(struct e1000_hw *hw) in e1000_acquire_nvm_82575() argument
939 ret_val = e1000_acquire_swfw_sync(hw, E1000_SWFW_EEP_SM); in e1000_acquire_nvm_82575()
947 if (hw->mac.type == e1000_i350) { in e1000_acquire_nvm_82575()
948 u32 eecd = E1000_READ_REG(hw, E1000_EECD); in e1000_acquire_nvm_82575()
952 E1000_WRITE_REG(hw, E1000_EECD, eecd | in e1000_acquire_nvm_82575()
958 if (hw->mac.type == e1000_82580) { in e1000_acquire_nvm_82575()
959 u32 eecd = E1000_READ_REG(hw, E1000_EECD); in e1000_acquire_nvm_82575()
962 E1000_WRITE_REG(hw, E1000_EECD, eecd | in e1000_acquire_nvm_82575()
968 ret_val = e1000_acquire_nvm_generic(hw); in e1000_acquire_nvm_82575()
970 e1000_release_swfw_sync(hw, E1000_SWFW_EEP_SM); in e1000_acquire_nvm_82575()
977 * e1000_release_nvm_82575 - Release exclusive access to EEPROM
978 * @hw: pointer to the HW structure
983 static void e1000_release_nvm_82575(struct e1000_hw *hw) in e1000_release_nvm_82575() argument
987 e1000_release_nvm_generic(hw); in e1000_release_nvm_82575()
989 e1000_release_swfw_sync(hw, E1000_SWFW_EEP_SM); in e1000_release_nvm_82575()
993 * e1000_get_cfg_done_82575 - Read config done bit
994 * @hw: pointer to the HW structure
997 * completion status. NOTE: silicon which is EEPROM-less will fail trying
999 * E1000_SUCCESS. If we were to return with error, EEPROM-less silicon
1002 static s32 e1000_get_cfg_done_82575(struct e1000_hw *hw) in e1000_get_cfg_done_82575() argument
1009 if (hw->bus.func == E1000_FUNC_1) in e1000_get_cfg_done_82575()
1011 else if (hw->bus.func == E1000_FUNC_2) in e1000_get_cfg_done_82575()
1013 else if (hw->bus.func == E1000_FUNC_3) in e1000_get_cfg_done_82575()
1016 if (E1000_READ_REG(hw, E1000_EEMNGCTL) & mask) in e1000_get_cfg_done_82575()
1019 timeout--; in e1000_get_cfg_done_82575()
1025 if (!(E1000_READ_REG(hw, E1000_EECD) & E1000_EECD_PRES) && in e1000_get_cfg_done_82575()
1026 (hw->phy.type == e1000_phy_igp_3)) in e1000_get_cfg_done_82575()
1027 e1000_phy_init_script_igp3(hw); in e1000_get_cfg_done_82575()
1033 * e1000_get_link_up_info_82575 - Get link speed/duplex info
1034 * @hw: pointer to the HW structure
1042 static s32 e1000_get_link_up_info_82575(struct e1000_hw *hw, u16 *speed, in e1000_get_link_up_info_82575() argument
1049 if (hw->phy.media_type != e1000_media_type_copper) in e1000_get_link_up_info_82575()
1050 ret_val = e1000_get_pcs_speed_and_duplex_82575(hw, speed, in e1000_get_link_up_info_82575()
1053 ret_val = e1000_get_speed_and_duplex_copper_generic(hw, speed, in e1000_get_link_up_info_82575()
1060 * e1000_check_for_link_82575 - Check for link
1061 * @hw: pointer to the HW structure
1066 static s32 e1000_check_for_link_82575(struct e1000_hw *hw) in e1000_check_for_link_82575() argument
1073 if (hw->phy.media_type != e1000_media_type_copper) { in e1000_check_for_link_82575()
1074 ret_val = e1000_get_pcs_speed_and_duplex_82575(hw, &speed, in e1000_check_for_link_82575()
1081 hw->mac.get_link_status = !hw->mac.serdes_has_link; in e1000_check_for_link_82575()
1084 * Configure Flow Control now that Auto-Neg has completed. in e1000_check_for_link_82575()
1085 * First, we need to restore the desired flow control in e1000_check_for_link_82575()
1086 * settings because we may have had to re-autoneg with a in e1000_check_for_link_82575()
1089 ret_val = e1000_config_fc_after_link_up_generic(hw); in e1000_check_for_link_82575()
1091 DEBUGOUT("Error configuring flow control\n"); in e1000_check_for_link_82575()
1093 ret_val = e1000_check_for_copper_link_generic(hw); in e1000_check_for_link_82575()
1100 * e1000_check_for_link_media_swap - Check which M88E1112 interface linked
1101 * @hw: pointer to the HW structure
1105 static s32 e1000_check_for_link_media_swap(struct e1000_hw *hw) in e1000_check_for_link_media_swap() argument
1107 struct e1000_phy_info *phy = &hw->phy; in e1000_check_for_link_media_swap()
1115 ret_val = phy->ops.write_reg(hw, E1000_M88E1112_PAGE_ADDR, 0); in e1000_check_for_link_media_swap()
1119 ret_val = phy->ops.read_reg(hw, E1000_M88E1112_STATUS, &data); in e1000_check_for_link_media_swap()
1127 ret_val = phy->ops.write_reg(hw, E1000_M88E1112_PAGE_ADDR, 1); in e1000_check_for_link_media_swap()
1131 ret_val = phy->ops.read_reg(hw, E1000_M88E1112_STATUS, &data); in e1000_check_for_link_media_swap()
1139 if (port && (hw->dev_spec._82575.media_port != port)) { in e1000_check_for_link_media_swap()
1140 hw->dev_spec._82575.media_port = port; in e1000_check_for_link_media_swap()
1141 hw->dev_spec._82575.media_changed = true; in e1000_check_for_link_media_swap()
1146 ret_val = phy->ops.write_reg(hw, E1000_M88E1112_PAGE_ADDR, 0); in e1000_check_for_link_media_swap()
1149 e1000_check_for_link_82575(hw); in e1000_check_for_link_media_swap()
1151 e1000_check_for_link_82575(hw); in e1000_check_for_link_media_swap()
1153 ret_val = phy->ops.write_reg(hw, E1000_M88E1112_PAGE_ADDR, 0); in e1000_check_for_link_media_swap()
1162 * e1000_power_up_serdes_link_82575 - Power up the serdes link after shutdown
1163 * @hw: pointer to the HW structure
1165 static void e1000_power_up_serdes_link_82575(struct e1000_hw *hw) in e1000_power_up_serdes_link_82575() argument
1171 if ((hw->phy.media_type != e1000_media_type_internal_serdes) && in e1000_power_up_serdes_link_82575()
1172 !e1000_sgmii_active_82575(hw)) in e1000_power_up_serdes_link_82575()
1176 reg = E1000_READ_REG(hw, E1000_PCS_CFG0); in e1000_power_up_serdes_link_82575()
1178 E1000_WRITE_REG(hw, E1000_PCS_CFG0, reg); in e1000_power_up_serdes_link_82575()
1181 reg = E1000_READ_REG(hw, E1000_CTRL_EXT); in e1000_power_up_serdes_link_82575()
1183 E1000_WRITE_REG(hw, E1000_CTRL_EXT, reg); in e1000_power_up_serdes_link_82575()
1186 E1000_WRITE_FLUSH(hw); in e1000_power_up_serdes_link_82575()
1191 * e1000_get_pcs_speed_and_duplex_82575 - Retrieve current speed/duplex
1192 * @hw: pointer to the HW structure
1196 * Using the physical coding sub-layer (PCS), retrieve the current speed and
1199 static s32 e1000_get_pcs_speed_and_duplex_82575(struct e1000_hw *hw, in e1000_get_pcs_speed_and_duplex_82575() argument
1202 struct e1000_mac_info *mac = &hw->mac; in e1000_get_pcs_speed_and_duplex_82575()
1209 * Read the PCS Status register for link state. For non-copper mode, in e1000_get_pcs_speed_and_duplex_82575()
1213 pcs = E1000_READ_REG(hw, E1000_PCS_LSTAT); in e1000_get_pcs_speed_and_duplex_82575()
1219 mac->serdes_has_link = true; in e1000_get_pcs_speed_and_duplex_82575()
1236 if (mac->type == e1000_i354) { in e1000_get_pcs_speed_and_duplex_82575()
1237 status = E1000_READ_REG(hw, E1000_STATUS); in e1000_get_pcs_speed_and_duplex_82575()
1248 mac->serdes_has_link = false; in e1000_get_pcs_speed_and_duplex_82575()
1257 * e1000_shutdown_serdes_link_82575 - Remove link during power down
1258 * @hw: pointer to the HW structure
1263 void e1000_shutdown_serdes_link_82575(struct e1000_hw *hw) in e1000_shutdown_serdes_link_82575() argument
1269 if ((hw->phy.media_type != e1000_media_type_internal_serdes) && in e1000_shutdown_serdes_link_82575()
1270 !e1000_sgmii_active_82575(hw)) in e1000_shutdown_serdes_link_82575()
1273 if (!e1000_enable_mng_pass_thru(hw)) { in e1000_shutdown_serdes_link_82575()
1275 reg = E1000_READ_REG(hw, E1000_PCS_CFG0); in e1000_shutdown_serdes_link_82575()
1277 E1000_WRITE_REG(hw, E1000_PCS_CFG0, reg); in e1000_shutdown_serdes_link_82575()
1280 reg = E1000_READ_REG(hw, E1000_CTRL_EXT); in e1000_shutdown_serdes_link_82575()
1282 E1000_WRITE_REG(hw, E1000_CTRL_EXT, reg); in e1000_shutdown_serdes_link_82575()
1285 E1000_WRITE_FLUSH(hw); in e1000_shutdown_serdes_link_82575()
1293 * e1000_reset_hw_82575 - Reset hardware
1294 * @hw: pointer to the HW structure
1298 static s32 e1000_reset_hw_82575(struct e1000_hw *hw) in e1000_reset_hw_82575() argument
1300 u32 ctrl; in e1000_reset_hw_82575() local
1306 * Prevent the PCI-E bus from sticking if there is no TLP connection in e1000_reset_hw_82575()
1309 ret_val = e1000_disable_pcie_master_generic(hw); in e1000_reset_hw_82575()
1311 DEBUGOUT("PCI-E Master disable polling has failed.\n"); in e1000_reset_hw_82575()
1314 ret_val = e1000_set_pcie_completion_timeout(hw); in e1000_reset_hw_82575()
1316 DEBUGOUT("PCI-E Set completion timeout has failed.\n"); in e1000_reset_hw_82575()
1319 E1000_WRITE_REG(hw, E1000_IMC, 0xffffffff); in e1000_reset_hw_82575()
1321 E1000_WRITE_REG(hw, E1000_RCTL, 0); in e1000_reset_hw_82575()
1322 E1000_WRITE_REG(hw, E1000_TCTL, E1000_TCTL_PSP); in e1000_reset_hw_82575()
1323 E1000_WRITE_FLUSH(hw); in e1000_reset_hw_82575()
1327 ctrl = E1000_READ_REG(hw, E1000_CTRL); in e1000_reset_hw_82575()
1330 E1000_WRITE_REG(hw, E1000_CTRL, ctrl | E1000_CTRL_RST); in e1000_reset_hw_82575()
1332 ret_val = e1000_get_auto_rd_done_generic(hw); in e1000_reset_hw_82575()
1343 if (!(E1000_READ_REG(hw, E1000_EECD) & E1000_EECD_PRES)) in e1000_reset_hw_82575()
1344 e1000_reset_init_script_82575(hw); in e1000_reset_hw_82575()
1347 E1000_WRITE_REG(hw, E1000_IMC, 0xffffffff); in e1000_reset_hw_82575()
1348 E1000_READ_REG(hw, E1000_ICR); in e1000_reset_hw_82575()
1351 ret_val = e1000_check_alt_mac_addr_generic(hw); in e1000_reset_hw_82575()
1357 * e1000_init_hw_82575 - Initialize hardware
1358 * @hw: pointer to the HW structure
1362 static s32 e1000_init_hw_82575(struct e1000_hw *hw) in e1000_init_hw_82575() argument
1364 struct e1000_mac_info *mac = &hw->mac; in e1000_init_hw_82575()
1370 ret_val = mac->ops.id_led_init(hw); in e1000_init_hw_82575()
1378 mac->ops.clear_vfta(hw); in e1000_init_hw_82575()
1380 ret_val = e1000_init_hw_base(hw); in e1000_init_hw_82575()
1383 hw->dev_spec._82575.mtu = 1500; in e1000_init_hw_82575()
1390 e1000_clear_hw_cntrs_82575(hw); in e1000_init_hw_82575()
1395 * e1000_setup_copper_link_82575 - Configure copper link settings
1396 * @hw: pointer to the HW structure
1398 * Configures the link for auto-neg or forced speed and duplex. Then we check
1400 * and flow control are called.
1402 static s32 e1000_setup_copper_link_82575(struct e1000_hw *hw) in e1000_setup_copper_link_82575() argument
1405 u32 ctrl; in e1000_setup_copper_link_82575() local
1410 ctrl = E1000_READ_REG(hw, E1000_CTRL); in e1000_setup_copper_link_82575()
1411 ctrl |= E1000_CTRL_SLU; in e1000_setup_copper_link_82575()
1412 ctrl &= ~(E1000_CTRL_FRCSPD | E1000_CTRL_FRCDPX); in e1000_setup_copper_link_82575()
1413 E1000_WRITE_REG(hw, E1000_CTRL, ctrl); in e1000_setup_copper_link_82575()
1416 switch (hw->mac.type) { in e1000_setup_copper_link_82575()
1421 phpm_reg = E1000_READ_REG(hw, E1000_82580_PHY_POWER_MGMT); in e1000_setup_copper_link_82575()
1423 E1000_WRITE_REG(hw, E1000_82580_PHY_POWER_MGMT, phpm_reg); in e1000_setup_copper_link_82575()
1429 ret_val = e1000_setup_serdes_link_82575(hw); in e1000_setup_copper_link_82575()
1433 if (e1000_sgmii_active_82575(hw)) { in e1000_setup_copper_link_82575()
1437 ret_val = hw->phy.ops.reset(hw); in e1000_setup_copper_link_82575()
1443 switch (hw->phy.type) { in e1000_setup_copper_link_82575()
1447 switch (hw->phy.id) { in e1000_setup_copper_link_82575()
1459 ret_val = e1000_copper_link_setup_m88_gen2(hw); in e1000_setup_copper_link_82575()
1462 ret_val = e1000_copper_link_setup_m88(hw); in e1000_setup_copper_link_82575()
1467 ret_val = e1000_copper_link_setup_igp(hw); in e1000_setup_copper_link_82575()
1470 ret_val = e1000_copper_link_setup_82577(hw); in e1000_setup_copper_link_82575()
1473 ret_val = -E1000_ERR_PHY; in e1000_setup_copper_link_82575()
1480 ret_val = e1000_setup_copper_link_generic(hw); in e1000_setup_copper_link_82575()
1486 * e1000_setup_serdes_link_82575 - Setup link for serdes
1487 * @hw: pointer to the HW structure
1489 * Configure the physical coding sub-layer (PCS) link. The PCS link is
1492 * for auto-negotiation or forces speed/duplex.
1494 static s32 e1000_setup_serdes_link_82575(struct e1000_hw *hw) in e1000_setup_serdes_link_82575() argument
1503 if ((hw->phy.media_type != e1000_media_type_internal_serdes) && in e1000_setup_serdes_link_82575()
1504 !e1000_sgmii_active_82575(hw)) in e1000_setup_serdes_link_82575()
1513 E1000_WRITE_REG(hw, E1000_SCTL, E1000_SCTL_DISABLE_SERDES_LOOPBACK); in e1000_setup_serdes_link_82575()
1516 ctrl_ext = E1000_READ_REG(hw, E1000_CTRL_EXT); in e1000_setup_serdes_link_82575()
1518 E1000_WRITE_REG(hw, E1000_CTRL_EXT, ctrl_ext); in e1000_setup_serdes_link_82575()
1520 ctrl_reg = E1000_READ_REG(hw, E1000_CTRL); in e1000_setup_serdes_link_82575()
1524 if (hw->mac.type == e1000_82575 || hw->mac.type == e1000_82576) in e1000_setup_serdes_link_82575()
1527 reg = E1000_READ_REG(hw, E1000_PCS_LCTL); in e1000_setup_serdes_link_82575()
1530 pcs_autoneg = hw->mac.autoneg; in e1000_setup_serdes_link_82575()
1544 if (hw->mac.type == e1000_82575 || in e1000_setup_serdes_link_82575()
1545 hw->mac.type == e1000_82576) { in e1000_setup_serdes_link_82575()
1546 ret_val = hw->nvm.ops.read(hw, NVM_COMPAT, 1, &data); in e1000_setup_serdes_link_82575()
1557 * non-SGMII modes only supports a speed of 1000/Full for the in e1000_setup_serdes_link_82575()
1569 E1000_WRITE_REG(hw, E1000_CTRL, ctrl_reg); in e1000_setup_serdes_link_82575()
1585 /* Disable force flow control for autoneg */ in e1000_setup_serdes_link_82575()
1588 /* Configure flow control advertisement for autoneg */ in e1000_setup_serdes_link_82575()
1589 anadv_reg = E1000_READ_REG(hw, E1000_PCS_ANADV); in e1000_setup_serdes_link_82575()
1592 switch (hw->fc.requested_mode) { in e1000_setup_serdes_link_82575()
1605 E1000_WRITE_REG(hw, E1000_PCS_ANADV, anadv_reg); in e1000_setup_serdes_link_82575()
1612 /* Force flow control for forced link */ in e1000_setup_serdes_link_82575()
1618 E1000_WRITE_REG(hw, E1000_PCS_LCTL, reg); in e1000_setup_serdes_link_82575()
1620 if (!pcs_autoneg && !e1000_sgmii_active_82575(hw)) in e1000_setup_serdes_link_82575()
1621 e1000_force_mac_fc_generic(hw); in e1000_setup_serdes_link_82575()
1627 * e1000_get_media_type_82575 - derives current media type.
1628 * @hw: pointer to the HW structure
1632 * - link mode set in the current port Init Control Word #3
1633 * - current link mode settings in CSR register
1634 * - MDIO vs. I2C PHY control interface chosen
1635 * - SFP module media type
1637 static s32 e1000_get_media_type_82575(struct e1000_hw *hw) in e1000_get_media_type_82575() argument
1639 struct e1000_dev_spec_82575 *dev_spec = &hw->dev_spec._82575; in e1000_get_media_type_82575()
1645 dev_spec->sgmii_active = false; in e1000_get_media_type_82575()
1646 dev_spec->module_plugged = false; in e1000_get_media_type_82575()
1649 ctrl_ext = E1000_READ_REG(hw, E1000_CTRL_EXT); in e1000_get_media_type_82575()
1656 hw->phy.media_type = e1000_media_type_internal_serdes; in e1000_get_media_type_82575()
1659 hw->phy.media_type = e1000_media_type_copper; in e1000_get_media_type_82575()
1663 if (e1000_sgmii_uses_mdio_82575(hw)) { in e1000_get_media_type_82575()
1664 hw->phy.media_type = e1000_media_type_copper; in e1000_get_media_type_82575()
1665 dev_spec->sgmii_active = true; in e1000_get_media_type_82575()
1672 ret_val = e1000_set_sfp_media_type_82575(hw); in e1000_get_media_type_82575()
1674 (hw->phy.media_type == e1000_media_type_unknown)) { in e1000_get_media_type_82575()
1679 hw->phy.media_type = e1000_media_type_internal_serdes; in e1000_get_media_type_82575()
1682 hw->phy.media_type = e1000_media_type_copper; in e1000_get_media_type_82575()
1683 dev_spec->sgmii_active = true; in e1000_get_media_type_82575()
1692 if (dev_spec->sgmii_active) in e1000_get_media_type_82575()
1697 E1000_WRITE_REG(hw, E1000_CTRL_EXT, ctrl_ext); in e1000_get_media_type_82575()
1709 * e1000_set_sfp_media_type_82575 - derives SFP module media type.
1710 * @hw: pointer to the HW structure
1715 static s32 e1000_set_sfp_media_type_82575(struct e1000_hw *hw) in e1000_set_sfp_media_type_82575() argument
1719 struct e1000_dev_spec_82575 *dev_spec = &hw->dev_spec._82575; in e1000_set_sfp_media_type_82575()
1720 struct sfp_e1000_flags *eth_flags = &dev_spec->eth_flags; in e1000_set_sfp_media_type_82575()
1725 ctrl_ext = E1000_READ_REG(hw, E1000_CTRL_EXT); in e1000_set_sfp_media_type_82575()
1727 E1000_WRITE_REG(hw, E1000_CTRL_EXT, ctrl_ext | E1000_CTRL_I2C_ENA); in e1000_set_sfp_media_type_82575()
1729 E1000_WRITE_FLUSH(hw); in e1000_set_sfp_media_type_82575()
1733 ret_val = e1000_read_sfp_data_byte(hw, in e1000_set_sfp_media_type_82575()
1739 timeout--; in e1000_set_sfp_media_type_82575()
1744 ret_val = e1000_read_sfp_data_byte(hw, in e1000_set_sfp_media_type_82575()
1753 dev_spec->module_plugged = true; in e1000_set_sfp_media_type_82575()
1757 if (eth_flags->e1000_base_lx || eth_flags->e1000_base_sx) { in e1000_set_sfp_media_type_82575()
1758 hw->phy.media_type = e1000_media_type_internal_serdes; in e1000_set_sfp_media_type_82575()
1760 } else if (eth_flags->e100_base_fx || eth_flags->e100_base_lx) { in e1000_set_sfp_media_type_82575()
1761 dev_spec->sgmii_active = true; in e1000_set_sfp_media_type_82575()
1762 hw->phy.media_type = e1000_media_type_internal_serdes; in e1000_set_sfp_media_type_82575()
1764 } else if (eth_flags->e1000_base_t) { in e1000_set_sfp_media_type_82575()
1765 dev_spec->sgmii_active = true; in e1000_set_sfp_media_type_82575()
1766 hw->phy.media_type = e1000_media_type_copper; in e1000_set_sfp_media_type_82575()
1769 hw->phy.media_type = e1000_media_type_unknown; in e1000_set_sfp_media_type_82575()
1776 E1000_WRITE_REG(hw, E1000_CTRL_EXT, ctrl_ext); in e1000_set_sfp_media_type_82575()
1781 * e1000_valid_led_default_82575 - Verify a valid default LED config
1782 * @hw: pointer to the HW structure
1788 static s32 e1000_valid_led_default_82575(struct e1000_hw *hw, u16 *data) in e1000_valid_led_default_82575() argument
1794 ret_val = hw->nvm.ops.read(hw, NVM_ID_LED_SETTINGS, 1, data); in e1000_valid_led_default_82575()
1801 switch (hw->phy.media_type) { in e1000_valid_led_default_82575()
1816 * e1000_sgmii_active_82575 - Return sgmii state
1817 * @hw: pointer to the HW structure
1823 static bool e1000_sgmii_active_82575(struct e1000_hw *hw) in e1000_sgmii_active_82575() argument
1825 struct e1000_dev_spec_82575 *dev_spec = &hw->dev_spec._82575; in e1000_sgmii_active_82575()
1826 return dev_spec->sgmii_active; in e1000_sgmii_active_82575()
1830 * e1000_reset_init_script_82575 - Inits HW defaults after reset
1831 * @hw: pointer to the HW structure
1833 * Inits recommended HW defaults after a reset when there is no EEPROM
1836 s32 e1000_reset_init_script_82575(struct e1000_hw *hw) in e1000_reset_init_script_82575() argument
1840 if (hw->mac.type == e1000_82575) { in e1000_reset_init_script_82575()
1843 e1000_write_8bit_ctrl_reg_generic(hw, E1000_SCTL, 0x00, 0x0C); in e1000_reset_init_script_82575()
1844 e1000_write_8bit_ctrl_reg_generic(hw, E1000_SCTL, 0x01, 0x78); in e1000_reset_init_script_82575()
1845 e1000_write_8bit_ctrl_reg_generic(hw, E1000_SCTL, 0x1B, 0x23); in e1000_reset_init_script_82575()
1846 e1000_write_8bit_ctrl_reg_generic(hw, E1000_SCTL, 0x23, 0x15); in e1000_reset_init_script_82575()
1849 e1000_write_8bit_ctrl_reg_generic(hw, E1000_CCMCTL, 0x14, 0x00); in e1000_reset_init_script_82575()
1850 e1000_write_8bit_ctrl_reg_generic(hw, E1000_CCMCTL, 0x10, 0x00); in e1000_reset_init_script_82575()
1853 e1000_write_8bit_ctrl_reg_generic(hw, E1000_GIOCTL, 0x00, 0xEC); in e1000_reset_init_script_82575()
1854 e1000_write_8bit_ctrl_reg_generic(hw, E1000_GIOCTL, 0x61, 0xDF); in e1000_reset_init_script_82575()
1855 e1000_write_8bit_ctrl_reg_generic(hw, E1000_GIOCTL, 0x34, 0x05); in e1000_reset_init_script_82575()
1856 e1000_write_8bit_ctrl_reg_generic(hw, E1000_GIOCTL, 0x2F, 0x81); in e1000_reset_init_script_82575()
1859 e1000_write_8bit_ctrl_reg_generic(hw, E1000_SCCTL, 0x02, 0x47); in e1000_reset_init_script_82575()
1860 e1000_write_8bit_ctrl_reg_generic(hw, E1000_SCCTL, 0x14, 0x00); in e1000_reset_init_script_82575()
1861 e1000_write_8bit_ctrl_reg_generic(hw, E1000_SCCTL, 0x10, 0x00); in e1000_reset_init_script_82575()
1868 * e1000_read_mac_addr_82575 - Read device MAC address
1869 * @hw: pointer to the HW structure
1871 static s32 e1000_read_mac_addr_82575(struct e1000_hw *hw) in e1000_read_mac_addr_82575() argument
1882 ret_val = e1000_check_alt_mac_addr_generic(hw); in e1000_read_mac_addr_82575()
1886 ret_val = e1000_read_mac_addr_generic(hw); in e1000_read_mac_addr_82575()
1893 * e1000_config_collision_dist_82575 - Configure collision distance
1894 * @hw: pointer to the HW structure
1899 static void e1000_config_collision_dist_82575(struct e1000_hw *hw) in e1000_config_collision_dist_82575() argument
1905 tctl_ext = E1000_READ_REG(hw, E1000_TCTL_EXT); in e1000_config_collision_dist_82575()
1910 E1000_WRITE_REG(hw, E1000_TCTL_EXT, tctl_ext); in e1000_config_collision_dist_82575()
1911 E1000_WRITE_FLUSH(hw); in e1000_config_collision_dist_82575()
1915 * e1000_clear_hw_cntrs_82575 - Clear device specific hardware counters
1916 * @hw: pointer to the HW structure
1920 static void e1000_clear_hw_cntrs_82575(struct e1000_hw *hw) in e1000_clear_hw_cntrs_82575() argument
1924 e1000_clear_hw_cntrs_base_generic(hw); in e1000_clear_hw_cntrs_82575()
1926 E1000_READ_REG(hw, E1000_PRC64); in e1000_clear_hw_cntrs_82575()
1927 E1000_READ_REG(hw, E1000_PRC127); in e1000_clear_hw_cntrs_82575()
1928 E1000_READ_REG(hw, E1000_PRC255); in e1000_clear_hw_cntrs_82575()
1929 E1000_READ_REG(hw, E1000_PRC511); in e1000_clear_hw_cntrs_82575()
1930 E1000_READ_REG(hw, E1000_PRC1023); in e1000_clear_hw_cntrs_82575()
1931 E1000_READ_REG(hw, E1000_PRC1522); in e1000_clear_hw_cntrs_82575()
1932 E1000_READ_REG(hw, E1000_PTC64); in e1000_clear_hw_cntrs_82575()
1933 E1000_READ_REG(hw, E1000_PTC127); in e1000_clear_hw_cntrs_82575()
1934 E1000_READ_REG(hw, E1000_PTC255); in e1000_clear_hw_cntrs_82575()
1935 E1000_READ_REG(hw, E1000_PTC511); in e1000_clear_hw_cntrs_82575()
1936 E1000_READ_REG(hw, E1000_PTC1023); in e1000_clear_hw_cntrs_82575()
1937 E1000_READ_REG(hw, E1000_PTC1522); in e1000_clear_hw_cntrs_82575()
1939 E1000_READ_REG(hw, E1000_ALGNERRC); in e1000_clear_hw_cntrs_82575()
1940 E1000_READ_REG(hw, E1000_RXERRC); in e1000_clear_hw_cntrs_82575()
1941 E1000_READ_REG(hw, E1000_TNCRS); in e1000_clear_hw_cntrs_82575()
1942 E1000_READ_REG(hw, E1000_CEXTERR); in e1000_clear_hw_cntrs_82575()
1943 E1000_READ_REG(hw, E1000_TSCTC); in e1000_clear_hw_cntrs_82575()
1944 E1000_READ_REG(hw, E1000_TSCTFC); in e1000_clear_hw_cntrs_82575()
1946 E1000_READ_REG(hw, E1000_MGTPRC); in e1000_clear_hw_cntrs_82575()
1947 E1000_READ_REG(hw, E1000_MGTPDC); in e1000_clear_hw_cntrs_82575()
1948 E1000_READ_REG(hw, E1000_MGTPTC); in e1000_clear_hw_cntrs_82575()
1950 E1000_READ_REG(hw, E1000_IAC); in e1000_clear_hw_cntrs_82575()
1951 E1000_READ_REG(hw, E1000_ICRXOC); in e1000_clear_hw_cntrs_82575()
1953 E1000_READ_REG(hw, E1000_ICRXPTC); in e1000_clear_hw_cntrs_82575()
1954 E1000_READ_REG(hw, E1000_ICRXATC); in e1000_clear_hw_cntrs_82575()
1955 E1000_READ_REG(hw, E1000_ICTXPTC); in e1000_clear_hw_cntrs_82575()
1956 E1000_READ_REG(hw, E1000_ICTXATC); in e1000_clear_hw_cntrs_82575()
1957 E1000_READ_REG(hw, E1000_ICTXQEC); in e1000_clear_hw_cntrs_82575()
1958 E1000_READ_REG(hw, E1000_ICTXQMTC); in e1000_clear_hw_cntrs_82575()
1959 E1000_READ_REG(hw, E1000_ICRXDMTC); in e1000_clear_hw_cntrs_82575()
1961 E1000_READ_REG(hw, E1000_CBTMPC); in e1000_clear_hw_cntrs_82575()
1962 E1000_READ_REG(hw, E1000_HTDPMC); in e1000_clear_hw_cntrs_82575()
1963 E1000_READ_REG(hw, E1000_CBRMPC); in e1000_clear_hw_cntrs_82575()
1964 E1000_READ_REG(hw, E1000_RPTHC); in e1000_clear_hw_cntrs_82575()
1965 E1000_READ_REG(hw, E1000_HGPTC); in e1000_clear_hw_cntrs_82575()
1966 E1000_READ_REG(hw, E1000_HTCBDPC); in e1000_clear_hw_cntrs_82575()
1967 E1000_READ_REG(hw, E1000_HGORCL); in e1000_clear_hw_cntrs_82575()
1968 E1000_READ_REG(hw, E1000_HGORCH); in e1000_clear_hw_cntrs_82575()
1969 E1000_READ_REG(hw, E1000_HGOTCL); in e1000_clear_hw_cntrs_82575()
1970 E1000_READ_REG(hw, E1000_HGOTCH); in e1000_clear_hw_cntrs_82575()
1971 E1000_READ_REG(hw, E1000_LENERRS); in e1000_clear_hw_cntrs_82575()
1974 if ((hw->phy.media_type == e1000_media_type_internal_serdes) || in e1000_clear_hw_cntrs_82575()
1975 e1000_sgmii_active_82575(hw)) in e1000_clear_hw_cntrs_82575()
1976 E1000_READ_REG(hw, E1000_SCVPC); in e1000_clear_hw_cntrs_82575()
1980 * e1000_set_pcie_completion_timeout - set pci-e completion timeout
1981 * @hw: pointer to the HW structure
1985 * than the 10ms recommended by the pci-e spec. To address this we need to
1989 static s32 e1000_set_pcie_completion_timeout(struct e1000_hw *hw) in e1000_set_pcie_completion_timeout() argument
1991 u32 gcr = E1000_READ_REG(hw, E1000_GCR); in e1000_set_pcie_completion_timeout()
2013 ret_val = e1000_read_pcie_cap_reg(hw, PCIE_DEVICE_CONTROL2, in e1000_set_pcie_completion_timeout()
2020 ret_val = e1000_write_pcie_cap_reg(hw, PCIE_DEVICE_CONTROL2, in e1000_set_pcie_completion_timeout()
2026 E1000_WRITE_REG(hw, E1000_GCR, gcr); in e1000_set_pcie_completion_timeout()
2031 * e1000_vmdq_set_anti_spoofing_pf - enable or disable anti-spoofing
2032 * @hw: pointer to the hardware struct
2034 * @pf: Physical Function pool - do not set anti-spoofing for the PF
2036 * enables/disables L2 switch anti-spoofing functionality.
2038 void e1000_vmdq_set_anti_spoofing_pf(struct e1000_hw *hw, bool enable, int pf) in e1000_vmdq_set_anti_spoofing_pf() argument
2042 switch (hw->mac.type) { in e1000_vmdq_set_anti_spoofing_pf()
2054 reg_val = E1000_READ_REG(hw, reg_offset); in e1000_vmdq_set_anti_spoofing_pf()
2058 /* The PF can spoof - it has to in order to in e1000_vmdq_set_anti_spoofing_pf()
2066 E1000_WRITE_REG(hw, reg_offset, reg_val); in e1000_vmdq_set_anti_spoofing_pf()
2070 * e1000_vmdq_set_loopback_pf - enable or disable vmdq loopback
2071 * @hw: pointer to the hardware struct
2076 void e1000_vmdq_set_loopback_pf(struct e1000_hw *hw, bool enable) in e1000_vmdq_set_loopback_pf() argument
2080 switch (hw->mac.type) { in e1000_vmdq_set_loopback_pf()
2082 dtxswc = E1000_READ_REG(hw, E1000_DTXSWC); in e1000_vmdq_set_loopback_pf()
2087 E1000_WRITE_REG(hw, E1000_DTXSWC, dtxswc); in e1000_vmdq_set_loopback_pf()
2091 dtxswc = E1000_READ_REG(hw, E1000_TXSWC); in e1000_vmdq_set_loopback_pf()
2096 E1000_WRITE_REG(hw, E1000_TXSWC, dtxswc); in e1000_vmdq_set_loopback_pf()
2107 * e1000_vmdq_set_replication_pf - enable or disable vmdq replication
2108 * @hw: pointer to the hardware struct
2113 void e1000_vmdq_set_replication_pf(struct e1000_hw *hw, bool enable) in e1000_vmdq_set_replication_pf() argument
2115 u32 vt_ctl = E1000_READ_REG(hw, E1000_VT_CTL); in e1000_vmdq_set_replication_pf()
2122 E1000_WRITE_REG(hw, E1000_VT_CTL, vt_ctl); in e1000_vmdq_set_replication_pf()
2126 * e1000_read_phy_reg_82580 - Read 82580 MDI control register
2127 * @hw: pointer to the HW structure
2134 static s32 e1000_read_phy_reg_82580(struct e1000_hw *hw, u32 offset, u16 *data) in e1000_read_phy_reg_82580() argument
2140 ret_val = hw->phy.ops.acquire(hw); in e1000_read_phy_reg_82580()
2144 ret_val = e1000_read_phy_reg_mdic(hw, offset, data); in e1000_read_phy_reg_82580()
2146 hw->phy.ops.release(hw); in e1000_read_phy_reg_82580()
2153 * e1000_write_phy_reg_82580 - Write 82580 MDI control register
2154 * @hw: pointer to the HW structure
2160 static s32 e1000_write_phy_reg_82580(struct e1000_hw *hw, u32 offset, u16 data) in e1000_write_phy_reg_82580() argument
2166 ret_val = hw->phy.ops.acquire(hw); in e1000_write_phy_reg_82580()
2170 ret_val = e1000_write_phy_reg_mdic(hw, offset, data); in e1000_write_phy_reg_82580()
2172 hw->phy.ops.release(hw); in e1000_write_phy_reg_82580()
2179 * e1000_reset_mdicnfg_82580 - Reset MDICNFG destination and com_mdio bits
2180 * @hw: pointer to the HW structure
2186 static s32 e1000_reset_mdicnfg_82580(struct e1000_hw *hw) in e1000_reset_mdicnfg_82580() argument
2194 if (hw->mac.type != e1000_82580) in e1000_reset_mdicnfg_82580()
2196 if (!e1000_sgmii_active_82575(hw)) in e1000_reset_mdicnfg_82580()
2199 ret_val = hw->nvm.ops.read(hw, NVM_INIT_CONTROL3_PORT_A + in e1000_reset_mdicnfg_82580()
2200 NVM_82580_LAN_FUNC_OFFSET(hw->bus.func), 1, in e1000_reset_mdicnfg_82580()
2207 mdicnfg = E1000_READ_REG(hw, E1000_MDICNFG); in e1000_reset_mdicnfg_82580()
2212 E1000_WRITE_REG(hw, E1000_MDICNFG, mdicnfg); in e1000_reset_mdicnfg_82580()
2218 * e1000_reset_hw_82580 - Reset hardware
2219 * @hw: pointer to the HW structure
2224 static s32 e1000_reset_hw_82580(struct e1000_hw *hw) in e1000_reset_hw_82580() argument
2229 u32 ctrl; in e1000_reset_hw_82580() local
2230 bool global_device_reset = hw->dev_spec._82575.global_device_reset; in e1000_reset_hw_82580()
2234 hw->dev_spec._82575.global_device_reset = false; in e1000_reset_hw_82580()
2236 /* 82580 does not reliably do global_device_reset due to hw errata */ in e1000_reset_hw_82580()
2237 if (hw->mac.type == e1000_82580) in e1000_reset_hw_82580()
2241 ctrl = E1000_READ_REG(hw, E1000_CTRL); in e1000_reset_hw_82580()
2244 * Prevent the PCI-E bus from sticking if there is no TLP connection in e1000_reset_hw_82580()
2247 ret_val = e1000_disable_pcie_master_generic(hw); in e1000_reset_hw_82580()
2249 DEBUGOUT("PCI-E Master disable polling has failed.\n"); in e1000_reset_hw_82580()
2252 E1000_WRITE_REG(hw, E1000_IMC, 0xffffffff); in e1000_reset_hw_82580()
2253 E1000_WRITE_REG(hw, E1000_RCTL, 0); in e1000_reset_hw_82580()
2254 E1000_WRITE_REG(hw, E1000_TCTL, E1000_TCTL_PSP); in e1000_reset_hw_82580()
2255 E1000_WRITE_FLUSH(hw); in e1000_reset_hw_82580()
2260 if (global_device_reset && hw->mac.ops.acquire_swfw_sync(hw, in e1000_reset_hw_82580()
2264 if (global_device_reset && !(E1000_READ_REG(hw, E1000_STATUS) & in e1000_reset_hw_82580()
2266 ctrl |= E1000_CTRL_DEV_RST; in e1000_reset_hw_82580()
2268 ctrl |= E1000_CTRL_RST; in e1000_reset_hw_82580()
2270 E1000_WRITE_REG(hw, E1000_CTRL, ctrl); in e1000_reset_hw_82580()
2272 switch (hw->device_id) { in e1000_reset_hw_82580()
2276 E1000_WRITE_FLUSH(hw); in e1000_reset_hw_82580()
2283 ret_val = e1000_get_auto_rd_done_generic(hw); in e1000_reset_hw_82580()
2294 E1000_WRITE_REG(hw, E1000_STATUS, E1000_STAT_DEV_RST_SET); in e1000_reset_hw_82580()
2297 E1000_WRITE_REG(hw, E1000_IMC, 0xffffffff); in e1000_reset_hw_82580()
2298 E1000_READ_REG(hw, E1000_ICR); in e1000_reset_hw_82580()
2300 ret_val = e1000_reset_mdicnfg_82580(hw); in e1000_reset_hw_82580()
2305 ret_val = e1000_check_alt_mac_addr_generic(hw); in e1000_reset_hw_82580()
2309 hw->mac.ops.release_swfw_sync(hw, swmbsw_mask); in e1000_reset_hw_82580()
2315 * e1000_rxpbs_adjust_82580 - adjust RXPBS value to reflect actual Rx PBA size
2335 * e1000_validate_nvm_checksum_with_offset - Validate EEPROM
2337 * @hw: pointer to the HW structure
2343 s32 e1000_validate_nvm_checksum_with_offset(struct e1000_hw *hw, u16 offset) in e1000_validate_nvm_checksum_with_offset() argument
2352 ret_val = hw->nvm.ops.read(hw, i, 1, &nvm_data); in e1000_validate_nvm_checksum_with_offset()
2362 ret_val = -E1000_ERR_NVM; in e1000_validate_nvm_checksum_with_offset()
2371 * e1000_update_nvm_checksum_with_offset - Update EEPROM
2373 * @hw: pointer to the HW structure
2380 s32 e1000_update_nvm_checksum_with_offset(struct e1000_hw *hw, u16 offset) in e1000_update_nvm_checksum_with_offset() argument
2389 ret_val = hw->nvm.ops.read(hw, i, 1, &nvm_data); in e1000_update_nvm_checksum_with_offset()
2396 checksum = (u16) NVM_SUM - checksum; in e1000_update_nvm_checksum_with_offset()
2397 ret_val = hw->nvm.ops.write(hw, (NVM_CHECKSUM_REG + offset), 1, in e1000_update_nvm_checksum_with_offset()
2407 * e1000_validate_nvm_checksum_82580 - Validate EEPROM checksum
2408 * @hw: pointer to the HW structure
2414 static s32 e1000_validate_nvm_checksum_82580(struct e1000_hw *hw) in e1000_validate_nvm_checksum_82580() argument
2423 ret_val = hw->nvm.ops.read(hw, NVM_COMPATIBILITY_REG_3, 1, &nvm_data); in e1000_validate_nvm_checksum_82580()
2437 ret_val = e1000_validate_nvm_checksum_with_offset(hw, in e1000_validate_nvm_checksum_82580()
2448 * e1000_update_nvm_checksum_82580 - Update EEPROM checksum
2449 * @hw: pointer to the HW structure
2455 static s32 e1000_update_nvm_checksum_82580(struct e1000_hw *hw) in e1000_update_nvm_checksum_82580() argument
2463 ret_val = hw->nvm.ops.read(hw, NVM_COMPATIBILITY_REG_3, 1, &nvm_data); in e1000_update_nvm_checksum_82580()
2472 ret_val = hw->nvm.ops.write(hw, NVM_COMPATIBILITY_REG_3, 1, in e1000_update_nvm_checksum_82580()
2482 ret_val = e1000_update_nvm_checksum_with_offset(hw, nvm_offset); in e1000_update_nvm_checksum_82580()
2492 * e1000_validate_nvm_checksum_i350 - Validate EEPROM checksum
2493 * @hw: pointer to the HW structure
2499 static s32 e1000_validate_nvm_checksum_i350(struct e1000_hw *hw) in e1000_validate_nvm_checksum_i350() argument
2509 ret_val = e1000_validate_nvm_checksum_with_offset(hw, in e1000_validate_nvm_checksum_i350()
2520 * e1000_update_nvm_checksum_i350 - Update EEPROM checksum
2521 * @hw: pointer to the HW structure
2527 static s32 e1000_update_nvm_checksum_i350(struct e1000_hw *hw) in e1000_update_nvm_checksum_i350() argument
2537 ret_val = e1000_update_nvm_checksum_with_offset(hw, nvm_offset); in e1000_update_nvm_checksum_i350()
2547 * __e1000_access_emi_reg - Read/write EMI register
2548 * @hw: pointer to the HW structure
2553 static s32 __e1000_access_emi_reg(struct e1000_hw *hw, u16 address, in __e1000_access_emi_reg() argument
2560 ret_val = hw->phy.ops.write_reg(hw, E1000_EMIADD, address); in __e1000_access_emi_reg()
2565 ret_val = hw->phy.ops.read_reg(hw, E1000_EMIDATA, data); in __e1000_access_emi_reg()
2567 ret_val = hw->phy.ops.write_reg(hw, E1000_EMIDATA, *data); in __e1000_access_emi_reg()
2573 * e1000_read_emi_reg - Read Extended Management Interface register
2574 * @hw: pointer to the HW structure
2578 s32 e1000_read_emi_reg(struct e1000_hw *hw, u16 addr, u16 *data) in e1000_read_emi_reg() argument
2582 return __e1000_access_emi_reg(hw, addr, data, true); in e1000_read_emi_reg()
2586 * e1000_initialize_M88E1512_phy - Initialize M88E1512 PHY
2587 * @hw: pointer to the HW structure
2591 s32 e1000_initialize_M88E1512_phy(struct e1000_hw *hw) in e1000_initialize_M88E1512_phy() argument
2593 struct e1000_phy_info *phy = &hw->phy; in e1000_initialize_M88E1512_phy()
2599 if (phy->id != M88E1512_E_PHY_ID) in e1000_initialize_M88E1512_phy()
2603 ret_val = phy->ops.write_reg(hw, E1000_M88E1543_PAGE_ADDR, 0x00FF); in e1000_initialize_M88E1512_phy()
2607 ret_val = phy->ops.write_reg(hw, E1000_M88E1512_CFG_REG_2, 0x214B); in e1000_initialize_M88E1512_phy()
2611 ret_val = phy->ops.write_reg(hw, E1000_M88E1512_CFG_REG_1, 0x2144); in e1000_initialize_M88E1512_phy()
2615 ret_val = phy->ops.write_reg(hw, E1000_M88E1512_CFG_REG_2, 0x0C28); in e1000_initialize_M88E1512_phy()
2619 ret_val = phy->ops.write_reg(hw, E1000_M88E1512_CFG_REG_1, 0x2146); in e1000_initialize_M88E1512_phy()
2623 ret_val = phy->ops.write_reg(hw, E1000_M88E1512_CFG_REG_2, 0xB233); in e1000_initialize_M88E1512_phy()
2627 ret_val = phy->ops.write_reg(hw, E1000_M88E1512_CFG_REG_1, 0x214D); in e1000_initialize_M88E1512_phy()
2631 ret_val = phy->ops.write_reg(hw, E1000_M88E1512_CFG_REG_2, 0xCC0C); in e1000_initialize_M88E1512_phy()
2635 ret_val = phy->ops.write_reg(hw, E1000_M88E1512_CFG_REG_1, 0x2159); in e1000_initialize_M88E1512_phy()
2640 ret_val = phy->ops.write_reg(hw, E1000_M88E1543_PAGE_ADDR, 0x00FB); in e1000_initialize_M88E1512_phy()
2644 ret_val = phy->ops.write_reg(hw, E1000_M88E1512_CFG_REG_3, 0x000D); in e1000_initialize_M88E1512_phy()
2649 ret_val = phy->ops.write_reg(hw, E1000_M88E1543_PAGE_ADDR, 0x12); in e1000_initialize_M88E1512_phy()
2653 /* Change mode to SGMII-to-Copper */ in e1000_initialize_M88E1512_phy()
2654 ret_val = phy->ops.write_reg(hw, E1000_M88E1512_MODE, 0x8001); in e1000_initialize_M88E1512_phy()
2659 ret_val = phy->ops.write_reg(hw, E1000_M88E1543_PAGE_ADDR, 0); in e1000_initialize_M88E1512_phy()
2663 ret_val = phy->ops.commit(hw); in e1000_initialize_M88E1512_phy()
2675 * e1000_initialize_M88E1543_phy - Initialize M88E1543 PHY
2676 * @hw: pointer to the HW structure
2680 s32 e1000_initialize_M88E1543_phy(struct e1000_hw *hw) in e1000_initialize_M88E1543_phy() argument
2682 struct e1000_phy_info *phy = &hw->phy; in e1000_initialize_M88E1543_phy()
2688 if (phy->id != M88E1543_E_PHY_ID) in e1000_initialize_M88E1543_phy()
2692 ret_val = phy->ops.write_reg(hw, E1000_M88E1543_PAGE_ADDR, 0x00FF); in e1000_initialize_M88E1543_phy()
2696 ret_val = phy->ops.write_reg(hw, E1000_M88E1512_CFG_REG_2, 0x214B); in e1000_initialize_M88E1543_phy()
2700 ret_val = phy->ops.write_reg(hw, E1000_M88E1512_CFG_REG_1, 0x2144); in e1000_initialize_M88E1543_phy()
2704 ret_val = phy->ops.write_reg(hw, E1000_M88E1512_CFG_REG_2, 0x0C28); in e1000_initialize_M88E1543_phy()
2708 ret_val = phy->ops.write_reg(hw, E1000_M88E1512_CFG_REG_1, 0x2146); in e1000_initialize_M88E1543_phy()
2712 ret_val = phy->ops.write_reg(hw, E1000_M88E1512_CFG_REG_2, 0xB233); in e1000_initialize_M88E1543_phy()
2716 ret_val = phy->ops.write_reg(hw, E1000_M88E1512_CFG_REG_1, 0x214D); in e1000_initialize_M88E1543_phy()
2720 ret_val = phy->ops.write_reg(hw, E1000_M88E1512_CFG_REG_2, 0xDC0C); in e1000_initialize_M88E1543_phy()
2724 ret_val = phy->ops.write_reg(hw, E1000_M88E1512_CFG_REG_1, 0x2159); in e1000_initialize_M88E1543_phy()
2729 ret_val = phy->ops.write_reg(hw, E1000_M88E1543_PAGE_ADDR, 0x00FB); in e1000_initialize_M88E1543_phy()
2733 ret_val = phy->ops.write_reg(hw, E1000_M88E1512_CFG_REG_3, 0xC00D); in e1000_initialize_M88E1543_phy()
2738 ret_val = phy->ops.write_reg(hw, E1000_M88E1543_PAGE_ADDR, 0x12); in e1000_initialize_M88E1543_phy()
2742 /* Change mode to SGMII-to-Copper */ in e1000_initialize_M88E1543_phy()
2743 ret_val = phy->ops.write_reg(hw, E1000_M88E1512_MODE, 0x8001); in e1000_initialize_M88E1543_phy()
2748 ret_val = phy->ops.write_reg(hw, E1000_M88E1543_PAGE_ADDR, 0x1); in e1000_initialize_M88E1543_phy()
2752 /* Change mode to 1000BASE-X/SGMII and autoneg enable; reset */ in e1000_initialize_M88E1543_phy()
2753 ret_val = phy->ops.write_reg(hw, E1000_M88E1543_FIBER_CTRL, 0x9140); in e1000_initialize_M88E1543_phy()
2758 ret_val = phy->ops.write_reg(hw, E1000_M88E1543_PAGE_ADDR, 0); in e1000_initialize_M88E1543_phy()
2762 ret_val = phy->ops.commit(hw); in e1000_initialize_M88E1543_phy()
2774 * e1000_set_eee_i350 - Enable/disable EEE support
2775 * @hw: pointer to the HW structure
2782 s32 e1000_set_eee_i350(struct e1000_hw *hw, bool adv1G, bool adv100M) in e1000_set_eee_i350() argument
2788 if ((hw->mac.type < e1000_i350) || in e1000_set_eee_i350()
2789 (hw->phy.media_type != e1000_media_type_copper)) in e1000_set_eee_i350()
2791 ipcnfg = E1000_READ_REG(hw, E1000_IPCNFG); in e1000_set_eee_i350()
2792 eeer = E1000_READ_REG(hw, E1000_EEER); in e1000_set_eee_i350()
2795 if (!(hw->dev_spec._82575.eee_disable)) { in e1000_set_eee_i350()
2796 u32 eee_su = E1000_READ_REG(hw, E1000_EEE_SU); in e1000_set_eee_i350()
2819 E1000_WRITE_REG(hw, E1000_IPCNFG, ipcnfg); in e1000_set_eee_i350()
2820 E1000_WRITE_REG(hw, E1000_EEER, eeer); in e1000_set_eee_i350()
2821 E1000_READ_REG(hw, E1000_IPCNFG); in e1000_set_eee_i350()
2822 E1000_READ_REG(hw, E1000_EEER); in e1000_set_eee_i350()
2829 * e1000_set_eee_i354 - Enable/disable EEE support
2830 * @hw: pointer to the HW structure
2837 s32 e1000_set_eee_i354(struct e1000_hw *hw, bool adv1G, bool adv100M) in e1000_set_eee_i354() argument
2839 struct e1000_phy_info *phy = &hw->phy; in e1000_set_eee_i354()
2845 if ((hw->phy.media_type != e1000_media_type_copper) || in e1000_set_eee_i354()
2846 ((phy->id != M88E1543_E_PHY_ID) && in e1000_set_eee_i354()
2847 (phy->id != M88E1512_E_PHY_ID))) in e1000_set_eee_i354()
2850 if (!hw->dev_spec._82575.eee_disable) { in e1000_set_eee_i354()
2852 ret_val = phy->ops.write_reg(hw, E1000_M88E1543_PAGE_ADDR, 18); in e1000_set_eee_i354()
2856 ret_val = phy->ops.read_reg(hw, E1000_M88E1543_EEE_CTRL_1, in e1000_set_eee_i354()
2862 ret_val = phy->ops.write_reg(hw, E1000_M88E1543_EEE_CTRL_1, in e1000_set_eee_i354()
2868 ret_val = phy->ops.write_reg(hw, E1000_M88E1543_PAGE_ADDR, 0); in e1000_set_eee_i354()
2873 ret_val = e1000_read_xmdio_reg(hw, E1000_EEE_ADV_ADDR_I354, in e1000_set_eee_i354()
2889 ret_val = e1000_write_xmdio_reg(hw, E1000_EEE_ADV_ADDR_I354, in e1000_set_eee_i354()
2894 ret_val = e1000_read_xmdio_reg(hw, E1000_EEE_ADV_ADDR_I354, in e1000_set_eee_i354()
2902 ret_val = e1000_write_xmdio_reg(hw, E1000_EEE_ADV_ADDR_I354, in e1000_set_eee_i354()
2912 * e1000_get_eee_status_i354 - Get EEE status
2913 * @hw: pointer to the HW structure
2919 s32 e1000_get_eee_status_i354(struct e1000_hw *hw, bool *status) in e1000_get_eee_status_i354() argument
2921 struct e1000_phy_info *phy = &hw->phy; in e1000_get_eee_status_i354()
2928 if ((hw->phy.media_type != e1000_media_type_copper) || in e1000_get_eee_status_i354()
2929 ((phy->id != M88E1543_E_PHY_ID) && in e1000_get_eee_status_i354()
2930 (phy->id != M88E1512_E_PHY_ID))) in e1000_get_eee_status_i354()
2933 ret_val = e1000_read_xmdio_reg(hw, E1000_PCS_STATUS_ADDR_I354, in e1000_get_eee_status_i354()
2946 /* Due to a hw errata, if the host tries to configure the VFTA register
2952 * e1000_clear_vfta_i350 - Clear VLAN filter table
2953 * @hw: pointer to the HW structure
2958 void e1000_clear_vfta_i350(struct e1000_hw *hw) in e1000_clear_vfta_i350() argument
2967 E1000_WRITE_REG_ARRAY(hw, E1000_VFTA, offset, 0); in e1000_clear_vfta_i350()
2969 E1000_WRITE_FLUSH(hw); in e1000_clear_vfta_i350()
2974 * e1000_write_vfta_i350 - Write value to VLAN filter table
2975 * @hw: pointer to the HW structure
2982 void e1000_write_vfta_i350(struct e1000_hw *hw, u32 offset, u32 value) in e1000_write_vfta_i350() argument
2989 E1000_WRITE_REG_ARRAY(hw, E1000_VFTA, offset, value); in e1000_write_vfta_i350()
2991 E1000_WRITE_FLUSH(hw); in e1000_write_vfta_i350()
2996 * e1000_set_i2c_bb - Enable I2C bit-bang
2997 * @hw: pointer to the HW structure
2999 * Enable I2C bit-bang interface
3002 s32 e1000_set_i2c_bb(struct e1000_hw *hw) in e1000_set_i2c_bb() argument
3009 ctrl_ext = E1000_READ_REG(hw, E1000_CTRL_EXT); in e1000_set_i2c_bb()
3011 E1000_WRITE_REG(hw, E1000_CTRL_EXT, ctrl_ext); in e1000_set_i2c_bb()
3012 E1000_WRITE_FLUSH(hw); in e1000_set_i2c_bb()
3014 i2cparams = E1000_READ_REG(hw, E1000_I2CPARAMS); in e1000_set_i2c_bb()
3018 E1000_WRITE_REG(hw, E1000_I2CPARAMS, i2cparams); in e1000_set_i2c_bb()
3019 E1000_WRITE_FLUSH(hw); in e1000_set_i2c_bb()
3025 * e1000_read_i2c_byte_generic - Reads 8 bit word over I2C
3026 * @hw: pointer to hardware structure
3034 s32 e1000_read_i2c_byte_generic(struct e1000_hw *hw, u8 byte_offset, in e1000_read_i2c_byte_generic() argument
3049 if (hw->mac.ops.acquire_swfw_sync(hw, swfw_mask) in e1000_read_i2c_byte_generic()
3055 e1000_i2c_start(hw); in e1000_read_i2c_byte_generic()
3058 status = e1000_clock_out_i2c_byte(hw, dev_addr); in e1000_read_i2c_byte_generic()
3062 status = e1000_get_i2c_ack(hw); in e1000_read_i2c_byte_generic()
3066 status = e1000_clock_out_i2c_byte(hw, byte_offset); in e1000_read_i2c_byte_generic()
3070 status = e1000_get_i2c_ack(hw); in e1000_read_i2c_byte_generic()
3074 e1000_i2c_start(hw); in e1000_read_i2c_byte_generic()
3077 status = e1000_clock_out_i2c_byte(hw, (dev_addr | 0x1)); in e1000_read_i2c_byte_generic()
3081 status = e1000_get_i2c_ack(hw); in e1000_read_i2c_byte_generic()
3085 e1000_clock_in_i2c_byte(hw, data); in e1000_read_i2c_byte_generic()
3087 status = e1000_clock_out_i2c_bit(hw, nack); in e1000_read_i2c_byte_generic()
3091 e1000_i2c_stop(hw); in e1000_read_i2c_byte_generic()
3095 hw->mac.ops.release_swfw_sync(hw, swfw_mask); in e1000_read_i2c_byte_generic()
3097 e1000_i2c_bus_clear(hw); in e1000_read_i2c_byte_generic()
3100 DEBUGOUT("I2C byte read error - Retrying.\n"); in e1000_read_i2c_byte_generic()
3106 hw->mac.ops.release_swfw_sync(hw, swfw_mask); in e1000_read_i2c_byte_generic()
3114 * e1000_write_i2c_byte_generic - Writes 8 bit word over I2C
3115 * @hw: pointer to hardware structure
3123 s32 e1000_write_i2c_byte_generic(struct e1000_hw *hw, u8 byte_offset, in e1000_write_i2c_byte_generic() argument
3135 if (hw->mac.ops.acquire_swfw_sync(hw, swfw_mask) != E1000_SUCCESS) { in e1000_write_i2c_byte_generic()
3141 e1000_i2c_start(hw); in e1000_write_i2c_byte_generic()
3143 status = e1000_clock_out_i2c_byte(hw, dev_addr); in e1000_write_i2c_byte_generic()
3147 status = e1000_get_i2c_ack(hw); in e1000_write_i2c_byte_generic()
3151 status = e1000_clock_out_i2c_byte(hw, byte_offset); in e1000_write_i2c_byte_generic()
3155 status = e1000_get_i2c_ack(hw); in e1000_write_i2c_byte_generic()
3159 status = e1000_clock_out_i2c_byte(hw, data); in e1000_write_i2c_byte_generic()
3163 status = e1000_get_i2c_ack(hw); in e1000_write_i2c_byte_generic()
3167 e1000_i2c_stop(hw); in e1000_write_i2c_byte_generic()
3171 e1000_i2c_bus_clear(hw); in e1000_write_i2c_byte_generic()
3174 DEBUGOUT("I2C byte write error - Retrying.\n"); in e1000_write_i2c_byte_generic()
3179 hw->mac.ops.release_swfw_sync(hw, swfw_mask); in e1000_write_i2c_byte_generic()
3187 * e1000_i2c_start - Sets I2C start condition
3188 * @hw: pointer to hardware structure
3190 * Sets I2C start condition (High -> Low on SDA while SCL is High)
3192 static void e1000_i2c_start(struct e1000_hw *hw) in e1000_i2c_start() argument
3194 u32 i2cctl = E1000_READ_REG(hw, E1000_I2CPARAMS); in e1000_i2c_start()
3199 e1000_set_i2c_data(hw, &i2cctl, 1); in e1000_i2c_start()
3200 e1000_raise_i2c_clk(hw, &i2cctl); in e1000_i2c_start()
3205 e1000_set_i2c_data(hw, &i2cctl, 0); in e1000_i2c_start()
3210 e1000_lower_i2c_clk(hw, &i2cctl); in e1000_i2c_start()
3218 * e1000_i2c_stop - Sets I2C stop condition
3219 * @hw: pointer to hardware structure
3221 * Sets I2C stop condition (Low -> High on SDA while SCL is High)
3223 static void e1000_i2c_stop(struct e1000_hw *hw) in e1000_i2c_stop() argument
3225 u32 i2cctl = E1000_READ_REG(hw, E1000_I2CPARAMS); in e1000_i2c_stop()
3230 e1000_set_i2c_data(hw, &i2cctl, 0); in e1000_i2c_stop()
3231 e1000_raise_i2c_clk(hw, &i2cctl); in e1000_i2c_stop()
3236 e1000_set_i2c_data(hw, &i2cctl, 1); in e1000_i2c_stop()
3243 * e1000_clock_in_i2c_byte - Clocks in one byte via I2C
3244 * @hw: pointer to hardware structure
3249 static void e1000_clock_in_i2c_byte(struct e1000_hw *hw, u8 *data) in e1000_clock_in_i2c_byte() argument
3257 for (i = 7; i >= 0; i--) { in e1000_clock_in_i2c_byte()
3258 e1000_clock_in_i2c_bit(hw, &bit); in e1000_clock_in_i2c_byte()
3264 * e1000_clock_out_i2c_byte - Clocks out one byte via I2C
3265 * @hw: pointer to hardware structure
3270 static s32 e1000_clock_out_i2c_byte(struct e1000_hw *hw, u8 data) in e1000_clock_out_i2c_byte() argument
3279 for (i = 7; i >= 0; i--) { in e1000_clock_out_i2c_byte()
3281 status = e1000_clock_out_i2c_bit(hw, bit); in e1000_clock_out_i2c_byte()
3288 i2cctl = E1000_READ_REG(hw, E1000_I2CPARAMS); in e1000_clock_out_i2c_byte()
3291 E1000_WRITE_REG(hw, E1000_I2CPARAMS, i2cctl); in e1000_clock_out_i2c_byte()
3292 E1000_WRITE_FLUSH(hw); in e1000_clock_out_i2c_byte()
3298 * e1000_get_i2c_ack - Polls for I2C ACK
3299 * @hw: pointer to hardware structure
3303 static s32 e1000_get_i2c_ack(struct e1000_hw *hw) in e1000_get_i2c_ack() argument
3307 u32 i2cctl = E1000_READ_REG(hw, E1000_I2CPARAMS); in e1000_get_i2c_ack()
3313 e1000_raise_i2c_clk(hw, &i2cctl); in e1000_get_i2c_ack()
3321 i2cctl = E1000_READ_REG(hw, E1000_I2CPARAMS); in e1000_get_i2c_ack()
3334 e1000_lower_i2c_clk(hw, &i2cctl); in e1000_get_i2c_ack()
3343 * e1000_clock_in_i2c_bit - Clocks in one bit via I2C data/clock
3344 * @hw: pointer to hardware structure
3349 static void e1000_clock_in_i2c_bit(struct e1000_hw *hw, bool *data) in e1000_clock_in_i2c_bit() argument
3351 u32 i2cctl = E1000_READ_REG(hw, E1000_I2CPARAMS); in e1000_clock_in_i2c_bit()
3355 e1000_raise_i2c_clk(hw, &i2cctl); in e1000_clock_in_i2c_bit()
3360 i2cctl = E1000_READ_REG(hw, E1000_I2CPARAMS); in e1000_clock_in_i2c_bit()
3363 e1000_lower_i2c_clk(hw, &i2cctl); in e1000_clock_in_i2c_bit()
3370 * e1000_clock_out_i2c_bit - Clocks in/out one bit via I2C data/clock
3371 * @hw: pointer to hardware structure
3376 static s32 e1000_clock_out_i2c_bit(struct e1000_hw *hw, bool data) in e1000_clock_out_i2c_bit() argument
3379 u32 i2cctl = E1000_READ_REG(hw, E1000_I2CPARAMS); in e1000_clock_out_i2c_bit()
3383 status = e1000_set_i2c_data(hw, &i2cctl, data); in e1000_clock_out_i2c_bit()
3385 e1000_raise_i2c_clk(hw, &i2cctl); in e1000_clock_out_i2c_bit()
3390 e1000_lower_i2c_clk(hw, &i2cctl); in e1000_clock_out_i2c_bit()
3404 * e1000_raise_i2c_clk - Raises the I2C SCL clock
3405 * @hw: pointer to hardware structure
3408 * Raises the I2C clock line '0'->'1'
3410 static void e1000_raise_i2c_clk(struct e1000_hw *hw, u32 *i2cctl) in e1000_raise_i2c_clk() argument
3416 E1000_WRITE_REG(hw, E1000_I2CPARAMS, *i2cctl); in e1000_raise_i2c_clk()
3417 E1000_WRITE_FLUSH(hw); in e1000_raise_i2c_clk()
3424 * e1000_lower_i2c_clk - Lowers the I2C SCL clock
3425 * @hw: pointer to hardware structure
3428 * Lowers the I2C clock line '1'->'0'
3430 static void e1000_lower_i2c_clk(struct e1000_hw *hw, u32 *i2cctl) in e1000_lower_i2c_clk() argument
3437 E1000_WRITE_REG(hw, E1000_I2CPARAMS, *i2cctl); in e1000_lower_i2c_clk()
3438 E1000_WRITE_FLUSH(hw); in e1000_lower_i2c_clk()
3445 * e1000_set_i2c_data - Sets the I2C data bit
3446 * @hw: pointer to hardware structure
3452 static s32 e1000_set_i2c_data(struct e1000_hw *hw, u32 *i2cctl, bool data) in e1000_set_i2c_data() argument
3465 E1000_WRITE_REG(hw, E1000_I2CPARAMS, *i2cctl); in e1000_set_i2c_data()
3466 E1000_WRITE_FLUSH(hw); in e1000_set_i2c_data()
3468 /* Data rise/fall (1000ns/300ns) and set-up time (250ns) */ in e1000_set_i2c_data()
3471 *i2cctl = E1000_READ_REG(hw, E1000_I2CPARAMS); in e1000_set_i2c_data()
3474 DEBUGOUT1("Error - I2C data was not set to %X.\n", data); in e1000_set_i2c_data()
3481 * e1000_get_i2c_data - Reads the I2C SDA data bit
3501 * e1000_i2c_bus_clear - Clears the I2C bus
3502 * @hw: pointer to hardware structure
3507 void e1000_i2c_bus_clear(struct e1000_hw *hw) in e1000_i2c_bus_clear() argument
3509 u32 i2cctl = E1000_READ_REG(hw, E1000_I2CPARAMS); in e1000_i2c_bus_clear()
3514 e1000_i2c_start(hw); in e1000_i2c_bus_clear()
3516 e1000_set_i2c_data(hw, &i2cctl, 1); in e1000_i2c_bus_clear()
3519 e1000_raise_i2c_clk(hw, &i2cctl); in e1000_i2c_bus_clear()
3524 e1000_lower_i2c_clk(hw, &i2cctl); in e1000_i2c_bus_clear()
3530 e1000_i2c_start(hw); in e1000_i2c_bus_clear()
3533 e1000_i2c_stop(hw); in e1000_i2c_bus_clear()