Lines Matching full:hw

53 static s32  e1000_acquire_nvm_82571(struct e1000_hw *hw);
54 static void e1000_release_nvm_82571(struct e1000_hw *hw);
55 static s32 e1000_write_nvm_82571(struct e1000_hw *hw, u16 offset,
57 static s32 e1000_update_nvm_checksum_82571(struct e1000_hw *hw);
58 static s32 e1000_validate_nvm_checksum_82571(struct e1000_hw *hw);
59 static s32 e1000_get_cfg_done_82571(struct e1000_hw *hw);
60 static s32 e1000_set_d0_lplu_state_82571(struct e1000_hw *hw,
62 static s32 e1000_reset_hw_82571(struct e1000_hw *hw);
63 static s32 e1000_init_hw_82571(struct e1000_hw *hw);
64 static void e1000_clear_vfta_82571(struct e1000_hw *hw);
65 static bool e1000_check_mng_mode_82574(struct e1000_hw *hw);
66 static s32 e1000_led_on_82574(struct e1000_hw *hw);
67 static s32 e1000_setup_link_82571(struct e1000_hw *hw);
68 static s32 e1000_setup_copper_link_82571(struct e1000_hw *hw);
69 static s32 e1000_check_for_serdes_link_82571(struct e1000_hw *hw);
70 static s32 e1000_setup_fiber_serdes_link_82571(struct e1000_hw *hw);
71 static s32 e1000_valid_led_default_82571(struct e1000_hw *hw, u16 *data);
72 static void e1000_clear_hw_cntrs_82571(struct e1000_hw *hw);
73 static s32 e1000_fix_nvm_checksum_82571(struct e1000_hw *hw);
74 static s32 e1000_get_phy_id_82571(struct e1000_hw *hw);
75 static s32 e1000_get_hw_semaphore_82574(struct e1000_hw *hw);
76 static void e1000_put_hw_semaphore_82574(struct e1000_hw *hw);
77 static s32 e1000_set_d0_lplu_state_82574(struct e1000_hw *hw,
79 static s32 e1000_set_d3_lplu_state_82574(struct e1000_hw *hw,
81 static void e1000_initialize_hw_bits_82571(struct e1000_hw *hw);
82 static s32 e1000_write_nvm_eewr_82571(struct e1000_hw *hw, u16 offset,
84 static s32 e1000_read_mac_addr_82571(struct e1000_hw *hw);
85 static void e1000_power_down_phy_copper_82571(struct e1000_hw *hw);
89 * @hw: pointer to the HW structure
91 static s32 e1000_init_phy_params_82571(struct e1000_hw *hw) in e1000_init_phy_params_82571() argument
93 struct e1000_phy_info *phy = &hw->phy; in e1000_init_phy_params_82571()
98 if (hw->phy.media_type != e1000_media_type_copper) { in e1000_init_phy_params_82571()
114 switch (hw->mac.type) { in e1000_init_phy_params_82571()
164 ret_val = e1000_get_phy_id_82571(hw); in e1000_init_phy_params_82571()
171 switch (hw->mac.type) { in e1000_init_phy_params_82571()
199 * @hw: pointer to the HW structure
201 static s32 e1000_init_nvm_params_82571(struct e1000_hw *hw) in e1000_init_nvm_params_82571() argument
203 struct e1000_nvm_info *nvm = &hw->nvm; in e1000_init_nvm_params_82571()
204 u32 eecd = E1000_READ_REG(hw, E1000_EECD); in e1000_init_nvm_params_82571()
226 switch (hw->mac.type) { in e1000_init_nvm_params_82571()
237 E1000_WRITE_REG(hw, E1000_EECD, eecd); in e1000_init_nvm_params_82571()
258 switch (hw->mac.type) { in e1000_init_nvm_params_82571()
280 * @hw: pointer to the HW structure
282 static s32 e1000_init_mac_params_82571(struct e1000_hw *hw) in e1000_init_mac_params_82571() argument
284 struct e1000_mac_info *mac = &hw->mac; in e1000_init_mac_params_82571()
292 switch (hw->device_id) { in e1000_init_mac_params_82571()
296 hw->phy.media_type = e1000_media_type_fiber; in e1000_init_mac_params_82571()
307 hw->phy.media_type = e1000_media_type_internal_serdes; in e1000_init_mac_params_82571()
315 hw->phy.media_type = e1000_media_type_copper; in e1000_init_mac_params_82571()
339 /* hw initialization */ in e1000_init_mac_params_82571()
363 switch (hw->mac.type) { in e1000_init_mac_params_82571()
375 mac->arc_subsystem_valid = !!(E1000_READ_REG(hw, E1000_FWSM) & in e1000_init_mac_params_82571()
400 switch (hw->mac.type) { in e1000_init_mac_params_82571()
403 swsm2 = E1000_READ_REG(hw, E1000_SWSM2); in e1000_init_mac_params_82571()
407 E1000_WRITE_REG(hw, E1000_SWSM2, swsm2 | in e1000_init_mac_params_82571()
421 swsm = E1000_READ_REG(hw, E1000_SWSM); in e1000_init_mac_params_82571()
429 E1000_WRITE_REG(hw, E1000_SWSM, swsm & ~E1000_SWSM_SMBI); in e1000_init_mac_params_82571()
433 hw->dev_spec._82571.smb_counter = 0; in e1000_init_mac_params_82571()
440 * @hw: pointer to the HW structure
444 void e1000_init_function_pointers_82571(struct e1000_hw *hw) in e1000_init_function_pointers_82571() argument
448 hw->mac.ops.init_params = e1000_init_mac_params_82571; in e1000_init_function_pointers_82571()
449 hw->nvm.ops.init_params = e1000_init_nvm_params_82571; in e1000_init_function_pointers_82571()
450 hw->phy.ops.init_params = e1000_init_phy_params_82571; in e1000_init_function_pointers_82571()
455 * @hw: pointer to the HW structure
460 static s32 e1000_get_phy_id_82571(struct e1000_hw *hw) in e1000_get_phy_id_82571() argument
462 struct e1000_phy_info *phy = &hw->phy; in e1000_get_phy_id_82571()
468 switch (hw->mac.type) { in e1000_get_phy_id_82571()
479 return e1000_get_phy_id(hw); in e1000_get_phy_id_82571()
483 ret_val = phy->ops.read_reg(hw, PHY_ID1, &phy_id); in e1000_get_phy_id_82571()
489 ret_val = phy->ops.read_reg(hw, PHY_ID2, &phy_id); in e1000_get_phy_id_82571()
506 * @hw: pointer to the HW structure
508 * Acquire the HW semaphore during reset.
512 e1000_get_hw_semaphore_82574(struct e1000_hw *hw) in e1000_get_hw_semaphore_82574() argument
519 ASSERT_CTX_LOCK_HELD(hw); in e1000_get_hw_semaphore_82574()
520 extcnf_ctrl = E1000_READ_REG(hw, E1000_EXTCNF_CTRL); in e1000_get_hw_semaphore_82574()
523 E1000_WRITE_REG(hw, E1000_EXTCNF_CTRL, extcnf_ctrl); in e1000_get_hw_semaphore_82574()
524 extcnf_ctrl = E1000_READ_REG(hw, E1000_EXTCNF_CTRL); in e1000_get_hw_semaphore_82574()
535 e1000_put_hw_semaphore_82574(hw); in e1000_get_hw_semaphore_82574()
545 * @hw: pointer to the HW structure
551 e1000_put_hw_semaphore_82574(struct e1000_hw *hw) in e1000_put_hw_semaphore_82574() argument
557 extcnf_ctrl = E1000_READ_REG(hw, E1000_EXTCNF_CTRL); in e1000_put_hw_semaphore_82574()
559 E1000_WRITE_REG(hw, E1000_EXTCNF_CTRL, extcnf_ctrl); in e1000_put_hw_semaphore_82574()
564 * @hw: pointer to the HW structure
574 static s32 e1000_set_d0_lplu_state_82574(struct e1000_hw *hw, bool active) in e1000_set_d0_lplu_state_82574() argument
576 u32 data = E1000_READ_REG(hw, E1000_POEMB); in e1000_set_d0_lplu_state_82574()
585 E1000_WRITE_REG(hw, E1000_POEMB, data); in e1000_set_d0_lplu_state_82574()
591 * @hw: pointer to the HW structure
600 static s32 e1000_set_d3_lplu_state_82574(struct e1000_hw *hw, bool active) in e1000_set_d3_lplu_state_82574() argument
602 u32 data = E1000_READ_REG(hw, E1000_POEMB); in e1000_set_d3_lplu_state_82574()
608 } else if ((hw->phy.autoneg_advertised == E1000_ALL_SPEED_DUPLEX) || in e1000_set_d3_lplu_state_82574()
609 (hw->phy.autoneg_advertised == E1000_ALL_NOT_GIG) || in e1000_set_d3_lplu_state_82574()
610 (hw->phy.autoneg_advertised == E1000_ALL_10_SPEED)) { in e1000_set_d3_lplu_state_82574()
614 E1000_WRITE_REG(hw, E1000_POEMB, data); in e1000_set_d3_lplu_state_82574()
620 * @hw: pointer to the HW structure
627 static s32 e1000_acquire_nvm_82571(struct e1000_hw *hw) in e1000_acquire_nvm_82571() argument
633 ret_val = e1000_get_hw_semaphore(hw); in e1000_acquire_nvm_82571()
637 switch (hw->mac.type) { in e1000_acquire_nvm_82571()
641 ret_val = e1000_acquire_nvm_generic(hw); in e1000_acquire_nvm_82571()
646 e1000_put_hw_semaphore(hw); in e1000_acquire_nvm_82571()
653 * @hw: pointer to the HW structure
657 static void e1000_release_nvm_82571(struct e1000_hw *hw) in e1000_release_nvm_82571() argument
661 e1000_release_nvm_generic(hw); in e1000_release_nvm_82571()
662 e1000_put_hw_semaphore(hw); in e1000_release_nvm_82571()
667 * @hw: pointer to the HW structure
677 static s32 e1000_write_nvm_82571(struct e1000_hw *hw, u16 offset, u16 words, in e1000_write_nvm_82571() argument
684 switch (hw->mac.type) { in e1000_write_nvm_82571()
688 ret_val = e1000_write_nvm_eewr_82571(hw, offset, words, data); in e1000_write_nvm_82571()
692 ret_val = e1000_write_nvm_spi(hw, offset, words, data); in e1000_write_nvm_82571()
704 * @hw: pointer to the HW structure
710 static s32 e1000_update_nvm_checksum_82571(struct e1000_hw *hw) in e1000_update_nvm_checksum_82571() argument
718 ret_val = e1000_update_nvm_checksum_generic(hw); in e1000_update_nvm_checksum_82571()
725 if (hw->nvm.type != e1000_nvm_flash_hw) in e1000_update_nvm_checksum_82571()
731 if (!(E1000_READ_REG(hw, E1000_EECD) & E1000_EECD_FLUPD)) in e1000_update_nvm_checksum_82571()
739 if ((E1000_READ_REG(hw, E1000_FLOP) & 0xFF00) == E1000_STM_OPCODE) { in e1000_update_nvm_checksum_82571()
743 E1000_WRITE_REG(hw, E1000_HICR, E1000_HICR_FW_RESET_ENABLE); in e1000_update_nvm_checksum_82571()
744 E1000_WRITE_FLUSH(hw); in e1000_update_nvm_checksum_82571()
745 E1000_WRITE_REG(hw, E1000_HICR, E1000_HICR_FW_RESET); in e1000_update_nvm_checksum_82571()
749 eecd = E1000_READ_REG(hw, E1000_EECD) | E1000_EECD_FLUPD; in e1000_update_nvm_checksum_82571()
750 E1000_WRITE_REG(hw, E1000_EECD, eecd); in e1000_update_nvm_checksum_82571()
754 if (!(E1000_READ_REG(hw, E1000_EECD) & E1000_EECD_FLUPD)) in e1000_update_nvm_checksum_82571()
766 * @hw: pointer to the HW structure
771 static s32 e1000_validate_nvm_checksum_82571(struct e1000_hw *hw) in e1000_validate_nvm_checksum_82571() argument
775 if (hw->nvm.type == e1000_nvm_flash_hw) in e1000_validate_nvm_checksum_82571()
776 e1000_fix_nvm_checksum_82571(hw); in e1000_validate_nvm_checksum_82571()
778 return e1000_validate_nvm_checksum_generic(hw); in e1000_validate_nvm_checksum_82571()
783 * @hw: pointer to the HW structure
795 static s32 e1000_write_nvm_eewr_82571(struct e1000_hw *hw, u16 offset, in e1000_write_nvm_eewr_82571() argument
798 struct e1000_nvm_info *nvm = &hw->nvm; in e1000_write_nvm_eewr_82571()
818 ret_val = e1000_poll_eerd_eewr_done(hw, E1000_NVM_POLL_WRITE); in e1000_write_nvm_eewr_82571()
822 E1000_WRITE_REG(hw, E1000_EEWR, eewr); in e1000_write_nvm_eewr_82571()
824 ret_val = e1000_poll_eerd_eewr_done(hw, E1000_NVM_POLL_WRITE); in e1000_write_nvm_eewr_82571()
834 * @hw: pointer to the HW structure
838 static s32 e1000_get_cfg_done_82571(struct e1000_hw *hw) in e1000_get_cfg_done_82571() argument
845 if (E1000_READ_REG(hw, E1000_EEMNGCTL) & in e1000_get_cfg_done_82571()
861 * @hw: pointer to the HW structure
870 static s32 e1000_set_d0_lplu_state_82571(struct e1000_hw *hw, bool active) in e1000_set_d0_lplu_state_82571() argument
872 struct e1000_phy_info *phy = &hw->phy; in e1000_set_d0_lplu_state_82571()
881 ret_val = phy->ops.read_reg(hw, IGP02E1000_PHY_POWER_MGMT, &data); in e1000_set_d0_lplu_state_82571()
887 ret_val = phy->ops.write_reg(hw, IGP02E1000_PHY_POWER_MGMT, in e1000_set_d0_lplu_state_82571()
893 ret_val = phy->ops.read_reg(hw, IGP01E1000_PHY_PORT_CONFIG, in e1000_set_d0_lplu_state_82571()
898 ret_val = phy->ops.write_reg(hw, IGP01E1000_PHY_PORT_CONFIG, in e1000_set_d0_lplu_state_82571()
904 ret_val = phy->ops.write_reg(hw, IGP02E1000_PHY_POWER_MGMT, in e1000_set_d0_lplu_state_82571()
912 ret_val = phy->ops.read_reg(hw, in e1000_set_d0_lplu_state_82571()
919 ret_val = phy->ops.write_reg(hw, in e1000_set_d0_lplu_state_82571()
925 ret_val = phy->ops.read_reg(hw, in e1000_set_d0_lplu_state_82571()
932 ret_val = phy->ops.write_reg(hw, in e1000_set_d0_lplu_state_82571()
945 * @hw: pointer to the HW structure
949 static s32 e1000_reset_hw_82571(struct e1000_hw *hw) in e1000_reset_hw_82571() argument
959 ret_val = e1000_disable_pcie_master_generic(hw); in e1000_reset_hw_82571()
964 E1000_WRITE_REG(hw, E1000_IMC, 0xffffffff); in e1000_reset_hw_82571()
966 E1000_WRITE_REG(hw, E1000_RCTL, 0); in e1000_reset_hw_82571()
967 tctl = E1000_READ_REG(hw, E1000_TCTL); in e1000_reset_hw_82571()
969 E1000_WRITE_REG(hw, E1000_TCTL, tctl); in e1000_reset_hw_82571()
970 E1000_WRITE_FLUSH(hw); in e1000_reset_hw_82571()
977 switch (hw->mac.type) { in e1000_reset_hw_82571()
981 ret_val = e1000_get_hw_semaphore_82574(hw); in e1000_reset_hw_82571()
987 ctrl = E1000_READ_REG(hw, E1000_CTRL); in e1000_reset_hw_82571()
990 E1000_WRITE_REG(hw, E1000_CTRL, ctrl | E1000_CTRL_RST); in e1000_reset_hw_82571()
993 switch (hw->mac.type) { in e1000_reset_hw_82571()
997 /* Release mutex only if the hw semaphore is acquired */ in e1000_reset_hw_82571()
999 e1000_put_hw_semaphore_82574(hw); in e1000_reset_hw_82571()
1006 if (hw->nvm.type == e1000_nvm_flash_hw) { in e1000_reset_hw_82571()
1008 ctrl_ext = E1000_READ_REG(hw, E1000_CTRL_EXT); in e1000_reset_hw_82571()
1010 E1000_WRITE_REG(hw, E1000_CTRL_EXT, ctrl_ext); in e1000_reset_hw_82571()
1011 E1000_WRITE_FLUSH(hw); in e1000_reset_hw_82571()
1014 ret_val = e1000_get_auto_rd_done_generic(hw); in e1000_reset_hw_82571()
1024 switch (hw->mac.type) { in e1000_reset_hw_82571()
1030 eecd = E1000_READ_REG(hw, E1000_EECD); in e1000_reset_hw_82571()
1032 E1000_WRITE_REG(hw, E1000_EECD, eecd); in e1000_reset_hw_82571()
1044 E1000_WRITE_REG(hw, E1000_IMC, 0xffffffff); in e1000_reset_hw_82571()
1045 E1000_READ_REG(hw, E1000_ICR); in e1000_reset_hw_82571()
1047 if (hw->mac.type == e1000_82571) { in e1000_reset_hw_82571()
1049 ret_val = e1000_check_alt_mac_addr_generic(hw); in e1000_reset_hw_82571()
1053 e1000_set_laa_state_82571(hw, true); in e1000_reset_hw_82571()
1057 if (hw->phy.media_type == e1000_media_type_internal_serdes) in e1000_reset_hw_82571()
1058 hw->mac.serdes_link_state = e1000_serdes_link_down; in e1000_reset_hw_82571()
1065 * @hw: pointer to the HW structure
1069 static s32 e1000_init_hw_82571(struct e1000_hw *hw) in e1000_init_hw_82571() argument
1071 struct e1000_mac_info *mac = &hw->mac; in e1000_init_hw_82571()
1078 e1000_initialize_hw_bits_82571(hw); in e1000_init_hw_82571()
1081 ret_val = mac->ops.id_led_init(hw); in e1000_init_hw_82571()
1088 mac->ops.clear_vfta(hw); in e1000_init_hw_82571()
1095 if (e1000_get_laa_state_82571(hw)) in e1000_init_hw_82571()
1097 e1000_init_rx_addrs_generic(hw, rar_count); in e1000_init_hw_82571()
1102 E1000_WRITE_REG_ARRAY(hw, E1000_MTA, i, 0); in e1000_init_hw_82571()
1105 ret_val = mac->ops.setup_link(hw); in e1000_init_hw_82571()
1108 reg_data = E1000_READ_REG(hw, E1000_TXDCTL(0)); in e1000_init_hw_82571()
1111 E1000_WRITE_REG(hw, E1000_TXDCTL(0), reg_data); in e1000_init_hw_82571()
1116 e1000_enable_tx_pkt_filtering_generic(hw); in e1000_init_hw_82571()
1120 reg_data = E1000_READ_REG(hw, E1000_GCR); in e1000_init_hw_82571()
1122 E1000_WRITE_REG(hw, E1000_GCR, reg_data); in e1000_init_hw_82571()
1125 reg_data = E1000_READ_REG(hw, E1000_TXDCTL(1)); in e1000_init_hw_82571()
1129 E1000_WRITE_REG(hw, E1000_TXDCTL(1), reg_data); in e1000_init_hw_82571()
1138 e1000_clear_hw_cntrs_82571(hw); in e1000_init_hw_82571()
1145 * @hw: pointer to the HW structure
1149 static void e1000_initialize_hw_bits_82571(struct e1000_hw *hw) in e1000_initialize_hw_bits_82571() argument
1156 reg = E1000_READ_REG(hw, E1000_TXDCTL(0)); in e1000_initialize_hw_bits_82571()
1158 E1000_WRITE_REG(hw, E1000_TXDCTL(0), reg); in e1000_initialize_hw_bits_82571()
1161 reg = E1000_READ_REG(hw, E1000_TXDCTL(1)); in e1000_initialize_hw_bits_82571()
1163 E1000_WRITE_REG(hw, E1000_TXDCTL(1), reg); in e1000_initialize_hw_bits_82571()
1166 reg = E1000_READ_REG(hw, E1000_TARC(0)); in e1000_initialize_hw_bits_82571()
1168 switch (hw->mac.type) { in e1000_initialize_hw_bits_82571()
1180 E1000_WRITE_REG(hw, E1000_TARC(0), reg); in e1000_initialize_hw_bits_82571()
1183 reg = E1000_READ_REG(hw, E1000_TARC(1)); in e1000_initialize_hw_bits_82571()
1184 switch (hw->mac.type) { in e1000_initialize_hw_bits_82571()
1189 if (E1000_READ_REG(hw, E1000_TCTL) & E1000_TCTL_MULR) in e1000_initialize_hw_bits_82571()
1193 E1000_WRITE_REG(hw, E1000_TARC(1), reg); in e1000_initialize_hw_bits_82571()
1200 switch (hw->mac.type) { in e1000_initialize_hw_bits_82571()
1204 reg = E1000_READ_REG(hw, E1000_CTRL); in e1000_initialize_hw_bits_82571()
1206 E1000_WRITE_REG(hw, E1000_CTRL, reg); in e1000_initialize_hw_bits_82571()
1213 switch (hw->mac.type) { in e1000_initialize_hw_bits_82571()
1217 reg = E1000_READ_REG(hw, E1000_CTRL_EXT); in e1000_initialize_hw_bits_82571()
1220 E1000_WRITE_REG(hw, E1000_CTRL_EXT, reg); in e1000_initialize_hw_bits_82571()
1226 if (hw->mac.type == e1000_82571) { in e1000_initialize_hw_bits_82571()
1227 reg = E1000_READ_REG(hw, E1000_PBA_ECC); in e1000_initialize_hw_bits_82571()
1229 E1000_WRITE_REG(hw, E1000_PBA_ECC, reg); in e1000_initialize_hw_bits_82571()
1235 if ((hw->mac.type == e1000_82571) || in e1000_initialize_hw_bits_82571()
1236 (hw->mac.type == e1000_82572)) { in e1000_initialize_hw_bits_82571()
1237 reg = E1000_READ_REG(hw, E1000_CTRL_EXT); in e1000_initialize_hw_bits_82571()
1239 E1000_WRITE_REG(hw, E1000_CTRL_EXT, reg); in e1000_initialize_hw_bits_82571()
1245 if (hw->mac.type <= e1000_82573) { in e1000_initialize_hw_bits_82571()
1246 reg = E1000_READ_REG(hw, E1000_RFCTL); in e1000_initialize_hw_bits_82571()
1248 E1000_WRITE_REG(hw, E1000_RFCTL, reg); in e1000_initialize_hw_bits_82571()
1252 switch (hw->mac.type) { in e1000_initialize_hw_bits_82571()
1255 reg = E1000_READ_REG(hw, E1000_GCR); in e1000_initialize_hw_bits_82571()
1257 E1000_WRITE_REG(hw, E1000_GCR, reg); in e1000_initialize_hw_bits_82571()
1265 reg = E1000_READ_REG(hw, E1000_GCR2); in e1000_initialize_hw_bits_82571()
1267 E1000_WRITE_REG(hw, E1000_GCR2, reg); in e1000_initialize_hw_bits_82571()
1278 * @hw: pointer to the HW structure
1283 static void e1000_clear_vfta_82571(struct e1000_hw *hw) in e1000_clear_vfta_82571() argument
1292 switch (hw->mac.type) { in e1000_clear_vfta_82571()
1296 if (hw->mng_cookie.vlan_id != 0) { in e1000_clear_vfta_82571()
1303 vfta_offset = (hw->mng_cookie.vlan_id >> in e1000_clear_vfta_82571()
1307 1 << (hw->mng_cookie.vlan_id & in e1000_clear_vfta_82571()
1320 E1000_WRITE_REG_ARRAY(hw, E1000_VFTA, offset, vfta_value); in e1000_clear_vfta_82571()
1321 E1000_WRITE_FLUSH(hw); in e1000_clear_vfta_82571()
1327 * @hw: pointer to the HW structure
1332 static bool e1000_check_mng_mode_82574(struct e1000_hw *hw) in e1000_check_mng_mode_82574() argument
1339 ret_val = hw->nvm.ops.read(hw, NVM_INIT_CONTROL2_REG, 1, &data); in e1000_check_mng_mode_82574()
1348 * @hw: pointer to the HW structure
1352 static s32 e1000_led_on_82574(struct e1000_hw *hw) in e1000_led_on_82574() argument
1359 ctrl = hw->mac.ledctl_mode2; in e1000_led_on_82574()
1360 if (!(E1000_STATUS_LU & E1000_READ_REG(hw, E1000_STATUS))) { in e1000_led_on_82574()
1365 if (((hw->mac.ledctl_mode2 >> (i * 8)) & 0xFF) == in e1000_led_on_82574()
1369 E1000_WRITE_REG(hw, E1000_LEDCTL, ctrl); in e1000_led_on_82574()
1376 * @hw: pointer to the HW structure
1380 bool e1000_check_phy_82574(struct e1000_hw *hw) in e1000_check_phy_82574() argument
1391 ret_val = hw->phy.ops.read_reg(hw, E1000_RECEIVE_ERROR_COUNTER, in e1000_check_phy_82574()
1396 ret_val = hw->phy.ops.read_reg(hw, E1000_BASE1000T_STATUS, in e1000_check_phy_82574()
1411 * @hw: pointer to the HW structure
1419 static s32 e1000_setup_link_82571(struct e1000_hw *hw) in e1000_setup_link_82571() argument
1427 switch (hw->mac.type) { in e1000_setup_link_82571()
1431 if (hw->fc.requested_mode == e1000_fc_default) in e1000_setup_link_82571()
1432 hw->fc.requested_mode = e1000_fc_full; in e1000_setup_link_82571()
1438 return e1000_setup_link_generic(hw); in e1000_setup_link_82571()
1443 * @hw: pointer to the HW structure
1449 static s32 e1000_setup_copper_link_82571(struct e1000_hw *hw) in e1000_setup_copper_link_82571() argument
1456 ctrl = E1000_READ_REG(hw, E1000_CTRL); in e1000_setup_copper_link_82571()
1459 E1000_WRITE_REG(hw, E1000_CTRL, ctrl); in e1000_setup_copper_link_82571()
1461 switch (hw->phy.type) { in e1000_setup_copper_link_82571()
1464 ret_val = e1000_copper_link_setup_m88(hw); in e1000_setup_copper_link_82571()
1467 ret_val = e1000_copper_link_setup_igp(hw); in e1000_setup_copper_link_82571()
1477 return e1000_setup_copper_link_generic(hw); in e1000_setup_copper_link_82571()
1482 * @hw: pointer to the HW structure
1487 static s32 e1000_setup_fiber_serdes_link_82571(struct e1000_hw *hw) in e1000_setup_fiber_serdes_link_82571() argument
1491 switch (hw->mac.type) { in e1000_setup_fiber_serdes_link_82571()
1500 E1000_WRITE_REG(hw, E1000_SCTL, in e1000_setup_fiber_serdes_link_82571()
1507 return e1000_setup_fiber_serdes_link_generic(hw); in e1000_setup_fiber_serdes_link_82571()
1512 * @hw: pointer to the HW structure
1529 static s32 e1000_check_for_serdes_link_82571(struct e1000_hw *hw) in e1000_check_for_serdes_link_82571() argument
1531 struct e1000_mac_info *mac = &hw->mac; in e1000_check_for_serdes_link_82571()
1541 ctrl = E1000_READ_REG(hw, E1000_CTRL); in e1000_check_for_serdes_link_82571()
1542 status = E1000_READ_REG(hw, E1000_STATUS); in e1000_check_for_serdes_link_82571()
1543 E1000_READ_REG(hw, E1000_RXCW); in e1000_check_for_serdes_link_82571()
1546 rxcw = E1000_READ_REG(hw, E1000_RXCW); in e1000_check_for_serdes_link_82571()
1573 E1000_WRITE_REG(hw, E1000_TXCW, mac->txcw); in e1000_check_for_serdes_link_82571()
1574 E1000_WRITE_REG(hw, E1000_CTRL, in e1000_check_for_serdes_link_82571()
1607 E1000_WRITE_REG(hw, E1000_TXCW, in e1000_check_for_serdes_link_82571()
1610 E1000_WRITE_REG(hw, E1000_CTRL, ctrl); in e1000_check_for_serdes_link_82571()
1614 e1000_config_fc_after_link_up_generic(hw); in e1000_check_for_serdes_link_82571()
1632 E1000_WRITE_REG(hw, E1000_TXCW, mac->txcw); in e1000_check_for_serdes_link_82571()
1633 E1000_WRITE_REG(hw, E1000_CTRL, (ctrl & in e1000_check_for_serdes_link_82571()
1653 rxcw = E1000_READ_REG(hw, E1000_RXCW); in e1000_check_for_serdes_link_82571()
1668 txcw = E1000_READ_REG(hw, E1000_TXCW); in e1000_check_for_serdes_link_82571()
1670 E1000_WRITE_REG(hw, E1000_TXCW, txcw); in e1000_check_for_serdes_link_82571()
1684 * @hw: pointer to the HW structure
1690 static s32 e1000_valid_led_default_82571(struct e1000_hw *hw, u16 *data) in e1000_valid_led_default_82571() argument
1696 ret_val = hw->nvm.ops.read(hw, NVM_ID_LED_SETTINGS, 1, data); in e1000_valid_led_default_82571()
1702 switch (hw->mac.type) { in e1000_valid_led_default_82571()
1721 * @hw: pointer to the HW structure
1725 bool e1000_get_laa_state_82571(struct e1000_hw *hw) in e1000_get_laa_state_82571() argument
1729 if (hw->mac.type != e1000_82571) in e1000_get_laa_state_82571()
1732 return hw->dev_spec._82571.laa_is_present; in e1000_get_laa_state_82571()
1737 * @hw: pointer to the HW structure
1742 void e1000_set_laa_state_82571(struct e1000_hw *hw, bool state) in e1000_set_laa_state_82571() argument
1746 if (hw->mac.type != e1000_82571) in e1000_set_laa_state_82571()
1749 hw->dev_spec._82571.laa_is_present = state; in e1000_set_laa_state_82571()
1759 hw->mac.ops.rar_set(hw, hw->mac.addr, in e1000_set_laa_state_82571()
1760 hw->mac.rar_entry_count - 1); in e1000_set_laa_state_82571()
1766 * @hw: pointer to the HW structure
1774 static s32 e1000_fix_nvm_checksum_82571(struct e1000_hw *hw) in e1000_fix_nvm_checksum_82571() argument
1776 struct e1000_nvm_info *nvm = &hw->nvm; in e1000_fix_nvm_checksum_82571()
1788 ret_val = nvm->ops.read(hw, 0x10, 1, &data); in e1000_fix_nvm_checksum_82571()
1800 ret_val = nvm->ops.read(hw, 0x23, 1, &data); in e1000_fix_nvm_checksum_82571()
1806 ret_val = nvm->ops.write(hw, 0x23, 1, &data); in e1000_fix_nvm_checksum_82571()
1809 ret_val = nvm->ops.update(hw); in e1000_fix_nvm_checksum_82571()
1821 * @hw: pointer to the HW structure
1823 static s32 e1000_read_mac_addr_82571(struct e1000_hw *hw) in e1000_read_mac_addr_82571() argument
1827 if (hw->mac.type == e1000_82571) { in e1000_read_mac_addr_82571()
1834 ret_val = e1000_check_alt_mac_addr_generic(hw); in e1000_read_mac_addr_82571()
1839 return e1000_read_mac_addr_generic(hw); in e1000_read_mac_addr_82571()
1844 * @hw: pointer to the HW structure
1849 static void e1000_power_down_phy_copper_82571(struct e1000_hw *hw) in e1000_power_down_phy_copper_82571() argument
1851 struct e1000_phy_info *phy = &hw->phy; in e1000_power_down_phy_copper_82571()
1852 struct e1000_mac_info *mac = &hw->mac; in e1000_power_down_phy_copper_82571()
1858 if (!(mac->ops.check_mng_mode(hw) || phy->ops.check_reset_block(hw))) in e1000_power_down_phy_copper_82571()
1859 e1000_power_down_phy_copper(hw); in e1000_power_down_phy_copper_82571()
1866 * @hw: pointer to the HW structure
1870 static void e1000_clear_hw_cntrs_82571(struct e1000_hw *hw) in e1000_clear_hw_cntrs_82571() argument
1874 e1000_clear_hw_cntrs_base_generic(hw); in e1000_clear_hw_cntrs_82571()
1876 E1000_READ_REG(hw, E1000_PRC64); in e1000_clear_hw_cntrs_82571()
1877 E1000_READ_REG(hw, E1000_PRC127); in e1000_clear_hw_cntrs_82571()
1878 E1000_READ_REG(hw, E1000_PRC255); in e1000_clear_hw_cntrs_82571()
1879 E1000_READ_REG(hw, E1000_PRC511); in e1000_clear_hw_cntrs_82571()
1880 E1000_READ_REG(hw, E1000_PRC1023); in e1000_clear_hw_cntrs_82571()
1881 E1000_READ_REG(hw, E1000_PRC1522); in e1000_clear_hw_cntrs_82571()
1882 E1000_READ_REG(hw, E1000_PTC64); in e1000_clear_hw_cntrs_82571()
1883 E1000_READ_REG(hw, E1000_PTC127); in e1000_clear_hw_cntrs_82571()
1884 E1000_READ_REG(hw, E1000_PTC255); in e1000_clear_hw_cntrs_82571()
1885 E1000_READ_REG(hw, E1000_PTC511); in e1000_clear_hw_cntrs_82571()
1886 E1000_READ_REG(hw, E1000_PTC1023); in e1000_clear_hw_cntrs_82571()
1887 E1000_READ_REG(hw, E1000_PTC1522); in e1000_clear_hw_cntrs_82571()
1889 E1000_READ_REG(hw, E1000_ALGNERRC); in e1000_clear_hw_cntrs_82571()
1890 E1000_READ_REG(hw, E1000_RXERRC); in e1000_clear_hw_cntrs_82571()
1891 E1000_READ_REG(hw, E1000_TNCRS); in e1000_clear_hw_cntrs_82571()
1892 E1000_READ_REG(hw, E1000_CEXTERR); in e1000_clear_hw_cntrs_82571()
1893 E1000_READ_REG(hw, E1000_TSCTC); in e1000_clear_hw_cntrs_82571()
1894 E1000_READ_REG(hw, E1000_TSCTFC); in e1000_clear_hw_cntrs_82571()
1896 E1000_READ_REG(hw, E1000_MGTPRC); in e1000_clear_hw_cntrs_82571()
1897 E1000_READ_REG(hw, E1000_MGTPDC); in e1000_clear_hw_cntrs_82571()
1898 E1000_READ_REG(hw, E1000_MGTPTC); in e1000_clear_hw_cntrs_82571()
1900 E1000_READ_REG(hw, E1000_IAC); in e1000_clear_hw_cntrs_82571()
1901 E1000_READ_REG(hw, E1000_ICRXOC); in e1000_clear_hw_cntrs_82571()
1903 E1000_READ_REG(hw, E1000_ICRXPTC); in e1000_clear_hw_cntrs_82571()
1904 E1000_READ_REG(hw, E1000_ICRXATC); in e1000_clear_hw_cntrs_82571()
1905 E1000_READ_REG(hw, E1000_ICTXPTC); in e1000_clear_hw_cntrs_82571()
1906 E1000_READ_REG(hw, E1000_ICTXATC); in e1000_clear_hw_cntrs_82571()
1907 E1000_READ_REG(hw, E1000_ICTXQEC); in e1000_clear_hw_cntrs_82571()
1908 E1000_READ_REG(hw, E1000_ICTXQMTC); in e1000_clear_hw_cntrs_82571()
1909 E1000_READ_REG(hw, E1000_ICRXDMTC); in e1000_clear_hw_cntrs_82571()