Lines Matching +full:force +full:- +full:external +full:- +full:phy
2 SPDX-License-Identifier: BSD-3-Clause
4 Copyright (c) 2001-2020, Intel Corporation
81 * e1000_init_phy_params_82543 - Init PHY func ptrs.
86 struct e1000_phy_info *phy = &hw->phy; in e1000_init_phy_params_82543() local
91 if (hw->phy.media_type != e1000_media_type_copper) { in e1000_init_phy_params_82543()
92 phy->type = e1000_phy_none; in e1000_init_phy_params_82543()
95 phy->ops.power_up = e1000_power_up_phy_copper; in e1000_init_phy_params_82543()
96 phy->ops.power_down = e1000_power_down_phy_copper; in e1000_init_phy_params_82543()
99 phy->addr = 1; in e1000_init_phy_params_82543()
100 phy->autoneg_mask = AUTONEG_ADVERTISE_SPEED_DEFAULT; in e1000_init_phy_params_82543()
101 phy->reset_delay_us = 10000; in e1000_init_phy_params_82543()
102 phy->type = e1000_phy_m88; in e1000_init_phy_params_82543()
105 phy->ops.check_polarity = e1000_check_polarity_m88; in e1000_init_phy_params_82543()
106 phy->ops.commit = e1000_phy_sw_reset_generic; in e1000_init_phy_params_82543()
107 phy->ops.force_speed_duplex = e1000_phy_force_speed_duplex_82543; in e1000_init_phy_params_82543()
108 phy->ops.get_cable_length = e1000_get_cable_length_m88; in e1000_init_phy_params_82543()
109 phy->ops.get_cfg_done = e1000_get_cfg_done_generic; in e1000_init_phy_params_82543()
110 phy->ops.read_reg = (hw->mac.type == e1000_82543) in e1000_init_phy_params_82543()
113 phy->ops.reset = (hw->mac.type == e1000_82543) in e1000_init_phy_params_82543()
116 phy->ops.write_reg = (hw->mac.type == e1000_82543) in e1000_init_phy_params_82543()
119 phy->ops.get_info = e1000_get_phy_info_m88; in e1000_init_phy_params_82543()
122 * The external PHY of the 82543 can be in a funky state. in e1000_init_phy_params_82543()
123 * Resetting helps us read the PHY registers for acquiring in e1000_init_phy_params_82543()
124 * the PHY ID. in e1000_init_phy_params_82543()
127 ret_val = phy->ops.reset(hw); in e1000_init_phy_params_82543()
129 DEBUGOUT("Resetting PHY during init failed.\n"); in e1000_init_phy_params_82543()
139 /* Verify phy id */ in e1000_init_phy_params_82543()
140 switch (hw->mac.type) { in e1000_init_phy_params_82543()
142 if (phy->id != M88E1000_E_PHY_ID) { in e1000_init_phy_params_82543()
143 ret_val = -E1000_ERR_PHY; in e1000_init_phy_params_82543()
148 if (phy->id != M88E1000_I_PHY_ID) { in e1000_init_phy_params_82543()
149 ret_val = -E1000_ERR_PHY; in e1000_init_phy_params_82543()
154 ret_val = -E1000_ERR_PHY; in e1000_init_phy_params_82543()
164 * e1000_init_nvm_params_82543 - Init NVM func ptrs.
169 struct e1000_nvm_info *nvm = &hw->nvm; in e1000_init_nvm_params_82543()
173 nvm->type = e1000_nvm_eeprom_microwire; in e1000_init_nvm_params_82543()
174 nvm->word_size = 64; in e1000_init_nvm_params_82543()
175 nvm->delay_usec = 50; in e1000_init_nvm_params_82543()
176 nvm->address_bits = 6; in e1000_init_nvm_params_82543()
177 nvm->opcode_bits = 3; in e1000_init_nvm_params_82543()
180 nvm->ops.read = e1000_read_nvm_microwire; in e1000_init_nvm_params_82543()
181 nvm->ops.update = e1000_update_nvm_checksum_generic; in e1000_init_nvm_params_82543()
182 nvm->ops.valid_led_default = e1000_valid_led_default_generic; in e1000_init_nvm_params_82543()
183 nvm->ops.validate = e1000_validate_nvm_checksum_generic; in e1000_init_nvm_params_82543()
184 nvm->ops.write = e1000_write_nvm_microwire; in e1000_init_nvm_params_82543()
190 * e1000_init_mac_params_82543 - Init MAC func ptrs.
195 struct e1000_mac_info *mac = &hw->mac; in e1000_init_mac_params_82543()
200 switch (hw->device_id) { in e1000_init_mac_params_82543()
203 hw->phy.media_type = e1000_media_type_fiber; in e1000_init_mac_params_82543()
206 hw->phy.media_type = e1000_media_type_copper; in e1000_init_mac_params_82543()
211 mac->mta_reg_count = 128; in e1000_init_mac_params_82543()
213 mac->rar_entry_count = E1000_RAR_ENTRIES; in e1000_init_mac_params_82543()
218 mac->ops.get_bus_info = e1000_get_bus_info_pci_generic; in e1000_init_mac_params_82543()
220 mac->ops.set_lan_id = e1000_set_lan_id_multi_port_pci; in e1000_init_mac_params_82543()
222 mac->ops.reset_hw = e1000_reset_hw_82543; in e1000_init_mac_params_82543()
224 mac->ops.init_hw = e1000_init_hw_82543; in e1000_init_mac_params_82543()
226 mac->ops.setup_link = e1000_setup_link_82543; in e1000_init_mac_params_82543()
228 mac->ops.setup_physical_interface = in e1000_init_mac_params_82543()
229 (hw->phy.media_type == e1000_media_type_copper) in e1000_init_mac_params_82543()
232 mac->ops.check_for_link = in e1000_init_mac_params_82543()
233 (hw->phy.media_type == e1000_media_type_copper) in e1000_init_mac_params_82543()
237 mac->ops.get_link_up_info = in e1000_init_mac_params_82543()
238 (hw->phy.media_type == e1000_media_type_copper) in e1000_init_mac_params_82543()
242 mac->ops.update_mc_addr_list = e1000_update_mc_addr_list_generic; in e1000_init_mac_params_82543()
244 mac->ops.write_vfta = e1000_write_vfta_82543; in e1000_init_mac_params_82543()
246 mac->ops.clear_vfta = e1000_clear_vfta_generic; in e1000_init_mac_params_82543()
248 mac->ops.read_mac_addr = e1000_read_mac_addr_82543; in e1000_init_mac_params_82543()
250 mac->ops.led_on = e1000_led_on_82543; in e1000_init_mac_params_82543()
251 mac->ops.led_off = e1000_led_off_82543; in e1000_init_mac_params_82543()
253 mac->ops.clear_hw_cntrs = e1000_clear_hw_cntrs_82543; in e1000_init_mac_params_82543()
256 if ((hw->mac.type != e1000_82543) || in e1000_init_mac_params_82543()
257 (hw->phy.media_type == e1000_media_type_fiber)) in e1000_init_mac_params_82543()
264 * e1000_init_function_pointers_82543 - Init func ptrs.
273 hw->mac.ops.init_params = e1000_init_mac_params_82543; in e1000_init_function_pointers_82543()
274 hw->nvm.ops.init_params = e1000_init_nvm_params_82543; in e1000_init_function_pointers_82543()
275 hw->phy.ops.init_params = e1000_init_phy_params_82543; in e1000_init_function_pointers_82543()
279 * e1000_tbi_compatibility_enabled_82543 - Returns TBI compat status
282 * Returns the current status of 10-bit Interface (TBI) compatibility
287 struct e1000_dev_spec_82543 *dev_spec = &hw->dev_spec._82543; in e1000_tbi_compatibility_enabled_82543()
292 if (hw->mac.type != e1000_82543) { in e1000_tbi_compatibility_enabled_82543()
297 state = !!(dev_spec->tbi_compatibility & TBI_COMPAT_ENABLED); in e1000_tbi_compatibility_enabled_82543()
304 * e1000_set_tbi_compatibility_82543 - Set TBI compatibility
308 * Enables or disabled 10-bit Interface (TBI) compatibility.
312 struct e1000_dev_spec_82543 *dev_spec = &hw->dev_spec._82543; in e1000_set_tbi_compatibility_82543()
316 if (hw->mac.type != e1000_82543) { in e1000_set_tbi_compatibility_82543()
322 dev_spec->tbi_compatibility |= TBI_COMPAT_ENABLED; in e1000_set_tbi_compatibility_82543()
324 dev_spec->tbi_compatibility &= ~TBI_COMPAT_ENABLED; in e1000_set_tbi_compatibility_82543()
331 * e1000_tbi_sbp_enabled_82543 - Returns TBI SBP status
334 * Returns the current status of 10-bit Interface (TBI) store bad packet (SBP)
339 struct e1000_dev_spec_82543 *dev_spec = &hw->dev_spec._82543; in e1000_tbi_sbp_enabled_82543()
344 if (hw->mac.type != e1000_82543) { in e1000_tbi_sbp_enabled_82543()
349 state = !!(dev_spec->tbi_compatibility & TBI_SBP_ENABLED); in e1000_tbi_sbp_enabled_82543()
356 * e1000_set_tbi_sbp_82543 - Set TBI SBP
360 * Enables or disabled 10-bit Interface (TBI) store bad packet (SBP).
364 struct e1000_dev_spec_82543 *dev_spec = &hw->dev_spec._82543; in e1000_set_tbi_sbp_82543()
369 dev_spec->tbi_compatibility |= TBI_SBP_ENABLED; in e1000_set_tbi_sbp_82543()
371 dev_spec->tbi_compatibility &= ~TBI_SBP_ENABLED; in e1000_set_tbi_sbp_82543()
377 * e1000_init_phy_disabled_82543 - Returns init PHY status
380 * Returns the current status of whether PHY initialization is disabled.
381 * True if PHY initialization is disabled else false.
385 struct e1000_dev_spec_82543 *dev_spec = &hw->dev_spec._82543; in e1000_init_phy_disabled_82543()
390 if (hw->mac.type != e1000_82543) { in e1000_init_phy_disabled_82543()
395 ret_val = dev_spec->init_phy_disabled; in e1000_init_phy_disabled_82543()
402 * e1000_tbi_adjust_stats_82543 - Adjust stats when TBI enabled
419 frame_len--; in e1000_tbi_adjust_stats_82543()
426 stats->crcerrs--; in e1000_tbi_adjust_stats_82543()
428 stats->gprc++; in e1000_tbi_adjust_stats_82543()
431 stats->gorc += frame_len; in e1000_tbi_adjust_stats_82543()
440 stats->bprc++; in e1000_tbi_adjust_stats_82543()
443 stats->mprc++; in e1000_tbi_adjust_stats_82543()
449 if ((frame_len == max_frame_size) && (stats->roc > 0)) in e1000_tbi_adjust_stats_82543()
450 stats->roc--; in e1000_tbi_adjust_stats_82543()
457 stats->prc64++; in e1000_tbi_adjust_stats_82543()
458 stats->prc127--; in e1000_tbi_adjust_stats_82543()
460 stats->prc127++; in e1000_tbi_adjust_stats_82543()
461 stats->prc255--; in e1000_tbi_adjust_stats_82543()
463 stats->prc255++; in e1000_tbi_adjust_stats_82543()
464 stats->prc511--; in e1000_tbi_adjust_stats_82543()
466 stats->prc511++; in e1000_tbi_adjust_stats_82543()
467 stats->prc1023--; in e1000_tbi_adjust_stats_82543()
469 stats->prc1023++; in e1000_tbi_adjust_stats_82543()
470 stats->prc1522--; in e1000_tbi_adjust_stats_82543()
472 stats->prc1522++; in e1000_tbi_adjust_stats_82543()
480 * e1000_read_phy_reg_82543 - Read PHY register
485 * Reads the PHY at offset and stores the information read to data.
495 DEBUGOUT1("PHY Address %d is out of range\n", offset); in e1000_read_phy_reg_82543()
496 ret_val = -E1000_ERR_PARAM; in e1000_read_phy_reg_82543()
513 * <Preamble><SOF><Op Code><Phy Addr><Offset> in e1000_read_phy_reg_82543()
519 mdic = (offset | (hw->phy.addr << 5) | in e1000_read_phy_reg_82543()
526 * "shift in" the 16-bit value (18 total bits) of the requested PHY in e1000_read_phy_reg_82543()
536 * e1000_write_phy_reg_82543 - Write PHY register
541 * Writes data to the PHY at offset.
551 DEBUGOUT1("PHY Address %d is out of range\n", offset); in e1000_write_phy_reg_82543()
552 ret_val = -E1000_ERR_PARAM; in e1000_write_phy_reg_82543()
558 * out to the PHY. We first send a preamble to the PHY to signal the in e1000_write_phy_reg_82543()
569 * <Preamble><SOF><Op Code><Phy Addr><Reg Addr><Turnaround><Data>. in e1000_write_phy_reg_82543()
571 mdic = ((PHY_TURNAROUND) | (offset << 2) | (hw->phy.addr << 7) | in e1000_write_phy_reg_82543()
583 * e1000_raise_mdi_clk_82543 - Raise Management Data Input clock
602 * e1000_lower_mdi_clk_82543 - Lower Management Data Input clock
621 * e1000_shift_out_mdi_bits_82543 - Shift data bits our to the PHY
623 * @data: data to send to the PHY
626 * We need to shift 'count' bits out to the PHY. So, the value in the
627 * "data" parameter will be shifted out to the PHY one bit at a time.
636 * We need to shift "count" number of bits out to the PHY. So, the in e1000_shift_out_mdi_bits_82543()
637 * value in the "data" parameter will be shifted out to the PHY one in e1000_shift_out_mdi_bits_82543()
642 mask <<= (count - 1); in e1000_shift_out_mdi_bits_82543()
651 * A "1" is shifted out to the PHY by setting the MDIO bit to in e1000_shift_out_mdi_bits_82543()
653 * A "0" is shifted out to the PHY by setting the MDIO bit to in e1000_shift_out_mdi_bits_82543()
674 * e1000_shift_in_mdi_bits_82543 - Shift data bits in from the PHY
677 * In order to read a register from the PHY, we need to shift 18 bits
678 * in from the PHY. Bits are "shifted in" by raising the clock input to
679 * the PHY (setting the MDC bit), and then reading the value of the data out
689 * In order to read a register from the PHY, we need to shift in a in e1000_shift_in_mdi_bits_82543()
690 * total of 18 bits from the PHY. The first two bit (turnaround) in e1000_shift_in_mdi_bits_82543()
734 * e1000_phy_force_speed_duplex_82543 - Force speed/duplex for PHY
737 * Calls the function to force speed and duplex for the m88 PHY, and
738 * if the PHY is not auto-negotiating and the speed is forced to 10Mbit,
751 if (!hw->mac.autoneg && (hw->mac.forced_speed_duplex & in e1000_phy_force_speed_duplex_82543()
760 * e1000_polarity_reversal_workaround_82543 - Workaround polarity reversal
763 * When forcing link to 10 Full or 10 Half, the PHY can reverse the polarity
765 * the PHY until we have established the link partner's link parameters.
774 if (!(hw->phy.ops.write_reg)) in e1000_polarity_reversal_workaround_82543()
779 /* Disable the transmitter on the PHY */ in e1000_polarity_reversal_workaround_82543()
781 ret_val = hw->phy.ops.write_reg(hw, M88E1000_PHY_PAGE_SELECT, 0x0019); in e1000_polarity_reversal_workaround_82543()
784 ret_val = hw->phy.ops.write_reg(hw, M88E1000_PHY_GEN_CONTROL, 0xFFFF); in e1000_polarity_reversal_workaround_82543()
788 ret_val = hw->phy.ops.write_reg(hw, M88E1000_PHY_PAGE_SELECT, 0x0000); in e1000_polarity_reversal_workaround_82543()
793 * This loop will early-out if the NO link condition has been met. in e1000_polarity_reversal_workaround_82543()
796 for (i = PHY_FORCE_TIME; i > 0; i--) { in e1000_polarity_reversal_workaround_82543()
802 ret_val = hw->phy.ops.read_reg(hw, PHY_STATUS, &mii_status_reg); in e1000_polarity_reversal_workaround_82543()
806 ret_val = hw->phy.ops.read_reg(hw, PHY_STATUS, &mii_status_reg); in e1000_polarity_reversal_workaround_82543()
818 /* Now we will re-enable the transmitter on the PHY */ in e1000_polarity_reversal_workaround_82543()
820 ret_val = hw->phy.ops.write_reg(hw, M88E1000_PHY_PAGE_SELECT, 0x0019); in e1000_polarity_reversal_workaround_82543()
824 ret_val = hw->phy.ops.write_reg(hw, M88E1000_PHY_GEN_CONTROL, 0xFFF0); in e1000_polarity_reversal_workaround_82543()
828 ret_val = hw->phy.ops.write_reg(hw, M88E1000_PHY_GEN_CONTROL, 0xFF00); in e1000_polarity_reversal_workaround_82543()
832 ret_val = hw->phy.ops.write_reg(hw, M88E1000_PHY_GEN_CONTROL, 0x0000); in e1000_polarity_reversal_workaround_82543()
836 ret_val = hw->phy.ops.write_reg(hw, M88E1000_PHY_PAGE_SELECT, 0x0000); in e1000_polarity_reversal_workaround_82543()
853 * e1000_phy_hw_reset_82543 - PHY hardware reset
857 * to put the PHY into a reset and waits for completion. Once the reset
858 * has been accomplished, clear the PHY_RESET_DIR bit to take the PHY out
870 * bit to put the PHY into reset... in e1000_phy_hw_reset_82543()
887 if (!(hw->phy.ops.get_cfg_done)) in e1000_phy_hw_reset_82543()
890 ret_val = hw->phy.ops.get_cfg_done(hw); in e1000_phy_hw_reset_82543()
896 * e1000_reset_hw_82543 - Reset hardware
926 if (hw->mac.type == e1000_82543) { in e1000_reset_hw_82543()
930 * The 82544 can't ACK the 64-bit write when issuing the in e1000_reset_hw_82543()
931 * reset, so use IO-mapping as a workaround. in e1000_reset_hw_82543()
937 * After MAC reset, force reload of NVM to restore power-on in e1000_reset_hw_82543()
940 hw->nvm.ops.reload(hw); in e1000_reset_hw_82543()
951 * e1000_init_hw_82543 - Initialize hardware
958 struct e1000_mac_info *mac = &hw->mac; in e1000_init_hw_82543()
959 struct e1000_dev_spec_82543 *dev_spec = &hw->dev_spec._82543; in e1000_init_hw_82543()
968 mac->ops.clear_vfta(hw); in e1000_init_hw_82543()
971 e1000_init_rx_addrs_generic(hw, mac->rar_entry_count); in e1000_init_hw_82543()
975 for (i = 0; i < mac->mta_reg_count; i++) { in e1000_init_hw_82543()
985 if (hw->mac.type == e1000_82543 && dev_spec->dma_fairness) { in e1000_init_hw_82543()
993 ret_val = mac->ops.setup_link(hw); in e1000_init_hw_82543()
1007 * e1000_setup_link_82543 - Setup flow control and link settings
1014 * control. Calls the appropriate media-specific link configuration
1032 * signal detection. So this should be done before phy setup. in e1000_setup_link_82543()
1034 if (hw->mac.type == e1000_82543) { in e1000_setup_link_82543()
1035 ret_val = hw->nvm.ops.read(hw, NVM_INIT_CONTROL2_REG, 1, &data); in e1000_setup_link_82543()
1038 ret_val = -E1000_ERR_NVM; in e1000_setup_link_82543()
1053 * e1000_setup_copper_link_82543 - Configure copper link settings
1056 * Configures the link for auto-neg or forced speed and duplex. Then we check
1070 * With 82543, we need to force speed and duplex on the MAC in e1000_setup_copper_link_82543()
1071 * equal to what the PHY speed and duplex configuration is. in e1000_setup_copper_link_82543()
1073 * PHY to take it out of reset. in e1000_setup_copper_link_82543()
1075 if (hw->mac.type == e1000_82543) { in e1000_setup_copper_link_82543()
1078 ret_val = hw->phy.ops.reset(hw); in e1000_setup_copper_link_82543()
1086 /* Set MDI/MDI-X, Polarity Reversal, and downshift settings */ in e1000_setup_copper_link_82543()
1091 if (hw->mac.autoneg) { in e1000_setup_copper_link_82543()
1101 * PHY will be set to 10H, 10F, 100H or 100F in e1000_setup_copper_link_82543()
1124 /* Config the MAC and PHY after link is up */ in e1000_setup_copper_link_82543()
1125 if (hw->mac.type == e1000_82544) { in e1000_setup_copper_link_82543()
1126 hw->mac.ops.config_collision_dist(hw); in e1000_setup_copper_link_82543()
1142 * e1000_setup_fiber_link_82543 - Setup link for fiber
1160 hw->mac.ops.config_collision_dist(hw); in e1000_setup_fiber_link_82543()
1166 DEBUGOUT("Auto-negotiation enabled\n"); in e1000_setup_fiber_link_82543()
1175 * "Link-Up" indication. in e1000_setup_fiber_link_82543()
1187 * e1000_check_for_copper_link_82543 - Check for link (Copper)
1190 * Checks the phy for link, if link exists, do the following:
1191 * - check for downshift
1192 * - do polarity workaround (if necessary)
1193 * - configure collision distance
1194 * - configure flow control after link up
1195 * - configure tbi compatibility
1199 struct e1000_mac_info *mac = &hw->mac; in e1000_check_for_copper_link_82543()
1207 if (!mac->get_link_status) { in e1000_check_for_copper_link_82543()
1219 mac->get_link_status = false; in e1000_check_for_copper_link_82543()
1227 if (!mac->autoneg) { in e1000_check_for_copper_link_82543()
1236 if (mac->forced_speed_duplex & E1000_ALL_10_SPEED) { in e1000_check_for_copper_link_82543()
1244 ret_val = -E1000_ERR_CONFIG; in e1000_check_for_copper_link_82543()
1249 * We have a M88E1000 PHY and Auto-Neg is enabled. If we in e1000_check_for_copper_link_82543()
1253 * Distance in the MAC. Otherwise, we need to force in e1000_check_for_copper_link_82543()
1254 * speed/duplex on the MAC to the current PHY speed/duplex in e1000_check_for_copper_link_82543()
1257 if (mac->type == e1000_82544) in e1000_check_for_copper_link_82543()
1258 hw->mac.ops.config_collision_dist(hw); in e1000_check_for_copper_link_82543()
1262 DEBUGOUT("Error configuring MAC to PHY settings\n"); in e1000_check_for_copper_link_82543()
1268 * Configure Flow Control now that Auto-Neg has completed. in e1000_check_for_copper_link_82543()
1270 * settings because we may have had to re-autoneg with a in e1000_check_for_copper_link_82543()
1279 * auto-negotiated link. These are conditions for checking the link in e1000_check_for_copper_link_82543()
1286 ret_val = mac->ops.get_link_up_info(hw, &speed, &duplex); in e1000_check_for_copper_link_82543()
1327 * e1000_check_for_fiber_link_82543 - Check for link (Fiber)
1331 * a signal, then we need to force link up.
1335 struct e1000_mac_info *mac = &hw->mac; in e1000_check_for_fiber_link_82543()
1346 * If we don't have link (auto-negotiation failed or link partner in e1000_check_for_fiber_link_82543()
1347 * cannot auto-negotiate), the cable is plugged in (we have signal), in e1000_check_for_fiber_link_82543()
1348 * and our link partner is not trying to auto-negotiate with us (we in e1000_check_for_fiber_link_82543()
1349 * are receiving idles or data), we need to force link up. We also in e1000_check_for_fiber_link_82543()
1350 * need to give auto-negotiation time to complete, in case the cable in e1000_check_for_fiber_link_82543()
1357 if (!mac->autoneg_failed) { in e1000_check_for_fiber_link_82543()
1358 mac->autoneg_failed = true; in e1000_check_for_fiber_link_82543()
1362 DEBUGOUT("NOT RXing /C/, disable AutoNeg and force link.\n"); in e1000_check_for_fiber_link_82543()
1364 /* Disable auto-negotiation in the TXCW register */ in e1000_check_for_fiber_link_82543()
1365 E1000_WRITE_REG(hw, E1000_TXCW, (mac->txcw & ~E1000_TXCW_ANE)); in e1000_check_for_fiber_link_82543()
1367 /* Force link-up and also force full-duplex. */ in e1000_check_for_fiber_link_82543()
1381 * sets, re-enable auto-negotiation in the TXCW register in e1000_check_for_fiber_link_82543()
1383 * in an attempt to auto-negotiate with our link partner. in e1000_check_for_fiber_link_82543()
1386 E1000_WRITE_REG(hw, E1000_TXCW, mac->txcw); in e1000_check_for_fiber_link_82543()
1389 mac->serdes_has_link = true; in e1000_check_for_fiber_link_82543()
1397 * e1000_config_mac_to_phy_82543 - Configure MAC to PHY settings
1401 * of the PHY, even if the PHY is auto-negotiating.
1411 if (!(hw->phy.ops.read_reg)) in e1000_config_mac_to_phy_82543()
1414 /* Set the bits to force speed and duplex */ in e1000_config_mac_to_phy_82543()
1423 ret_val = hw->phy.ops.read_reg(hw, M88E1000_PHY_SPEC_STATUS, &phy_data); in e1000_config_mac_to_phy_82543()
1431 hw->mac.ops.config_collision_dist(hw); in e1000_config_mac_to_phy_82543()
1449 * e1000_write_vfta_82543 - Write value to VLAN filter table
1451 * @offset: the 32-bit offset in which to write the value to.
1452 * @value: the 32-bit value to write at location offset.
1454 * This writes a 32-bit value to a 32-bit offset in the VLAN filter
1463 if ((hw->mac.type == e1000_82544) && (offset & 1)) { in e1000_write_vfta_82543()
1464 temp = E1000_READ_REG_ARRAY(hw, E1000_VFTA, offset - 1); in e1000_write_vfta_82543()
1467 E1000_WRITE_REG_ARRAY(hw, E1000_VFTA, offset - 1, temp); in e1000_write_vfta_82543()
1475 * e1000_led_on_82543 - Turn on SW controllable LED
1486 if (hw->mac.type == e1000_82544 && in e1000_led_on_82543()
1487 hw->phy.media_type == e1000_media_type_copper) { in e1000_led_on_82543()
1488 /* Clear SW-definable Pin 0 to turn on the LED */ in e1000_led_on_82543()
1502 * e1000_led_off_82543 - Turn off SW controllable LED
1513 if (hw->mac.type == e1000_82544 && in e1000_led_off_82543()
1514 hw->phy.media_type == e1000_media_type_copper) { in e1000_led_off_82543()
1515 /* Set SW-definable Pin 0 to turn off the LED */ in e1000_led_off_82543()
1528 * e1000_clear_hw_cntrs_82543 - Clear device specific hardware counters
1561 * e1000_read_mac_addr_82543 - Read device MAC address
1578 ret_val = hw->nvm.ops.read(hw, offset, 1, &nvm_data); in e1000_read_mac_addr_82543()
1583 hw->mac.perm_addr[i] = (u8)(nvm_data & 0xFF); in e1000_read_mac_addr_82543()
1584 hw->mac.perm_addr[i+1] = (u8)(nvm_data >> 8); in e1000_read_mac_addr_82543()
1588 if (hw->bus.func == E1000_FUNC_1) in e1000_read_mac_addr_82543()
1589 hw->mac.perm_addr[5] ^= 1; in e1000_read_mac_addr_82543()
1592 hw->mac.addr[i] = hw->mac.perm_addr[i]; in e1000_read_mac_addr_82543()