Lines Matching +full:hw +full:- +full:flow +full:- +full:ctrl
2 SPDX-License-Identifier: BSD-3-Clause
4 Copyright (c) 2001-2020, Intel Corporation
41 static s32 e1000_init_phy_params_82542(struct e1000_hw *hw);
42 static s32 e1000_init_nvm_params_82542(struct e1000_hw *hw);
43 static s32 e1000_init_mac_params_82542(struct e1000_hw *hw);
44 static s32 e1000_get_bus_info_82542(struct e1000_hw *hw);
45 static s32 e1000_reset_hw_82542(struct e1000_hw *hw);
46 static s32 e1000_init_hw_82542(struct e1000_hw *hw);
47 static s32 e1000_setup_link_82542(struct e1000_hw *hw);
48 static s32 e1000_led_on_82542(struct e1000_hw *hw);
49 static s32 e1000_led_off_82542(struct e1000_hw *hw);
50 static int e1000_rar_set_82542(struct e1000_hw *hw, u8 *addr, u32 index);
51 static void e1000_clear_hw_cntrs_82542(struct e1000_hw *hw);
52 static s32 e1000_read_mac_addr_82542(struct e1000_hw *hw);
55 * e1000_init_phy_params_82542 - Init PHY func ptrs.
56 * @hw: pointer to the HW structure
58 static s32 e1000_init_phy_params_82542(struct e1000_hw *hw) in e1000_init_phy_params_82542() argument
60 struct e1000_phy_info *phy = &hw->phy; in e1000_init_phy_params_82542()
65 phy->type = e1000_phy_none; in e1000_init_phy_params_82542()
71 * e1000_init_nvm_params_82542 - Init NVM func ptrs.
72 * @hw: pointer to the HW structure
74 static s32 e1000_init_nvm_params_82542(struct e1000_hw *hw) in e1000_init_nvm_params_82542() argument
76 struct e1000_nvm_info *nvm = &hw->nvm; in e1000_init_nvm_params_82542()
80 nvm->address_bits = 6; in e1000_init_nvm_params_82542()
81 nvm->delay_usec = 50; in e1000_init_nvm_params_82542()
82 nvm->opcode_bits = 3; in e1000_init_nvm_params_82542()
83 nvm->type = e1000_nvm_eeprom_microwire; in e1000_init_nvm_params_82542()
84 nvm->word_size = 64; in e1000_init_nvm_params_82542()
87 nvm->ops.read = e1000_read_nvm_microwire; in e1000_init_nvm_params_82542()
88 nvm->ops.release = e1000_stop_nvm; in e1000_init_nvm_params_82542()
89 nvm->ops.write = e1000_write_nvm_microwire; in e1000_init_nvm_params_82542()
90 nvm->ops.update = e1000_update_nvm_checksum_generic; in e1000_init_nvm_params_82542()
91 nvm->ops.validate = e1000_validate_nvm_checksum_generic; in e1000_init_nvm_params_82542()
97 * e1000_init_mac_params_82542 - Init MAC func ptrs.
98 * @hw: pointer to the HW structure
100 static s32 e1000_init_mac_params_82542(struct e1000_hw *hw) in e1000_init_mac_params_82542() argument
102 struct e1000_mac_info *mac = &hw->mac; in e1000_init_mac_params_82542()
107 hw->phy.media_type = e1000_media_type_fiber; in e1000_init_mac_params_82542()
110 mac->mta_reg_count = 128; in e1000_init_mac_params_82542()
112 mac->rar_entry_count = E1000_RAR_ENTRIES; in e1000_init_mac_params_82542()
117 mac->ops.get_bus_info = e1000_get_bus_info_82542; in e1000_init_mac_params_82542()
119 mac->ops.set_lan_id = e1000_set_lan_id_multi_port_pci; in e1000_init_mac_params_82542()
121 mac->ops.reset_hw = e1000_reset_hw_82542; in e1000_init_mac_params_82542()
122 /* hw initialization */ in e1000_init_mac_params_82542()
123 mac->ops.init_hw = e1000_init_hw_82542; in e1000_init_mac_params_82542()
125 mac->ops.setup_link = e1000_setup_link_82542; in e1000_init_mac_params_82542()
127 mac->ops.setup_physical_interface = in e1000_init_mac_params_82542()
130 mac->ops.check_for_link = e1000_check_for_fiber_link_generic; in e1000_init_mac_params_82542()
132 mac->ops.update_mc_addr_list = e1000_update_mc_addr_list_generic; in e1000_init_mac_params_82542()
134 mac->ops.write_vfta = e1000_write_vfta_generic; in e1000_init_mac_params_82542()
136 mac->ops.clear_vfta = e1000_clear_vfta_generic; in e1000_init_mac_params_82542()
138 mac->ops.read_mac_addr = e1000_read_mac_addr_82542; in e1000_init_mac_params_82542()
140 mac->ops.rar_set = e1000_rar_set_82542; in e1000_init_mac_params_82542()
142 mac->ops.led_on = e1000_led_on_82542; in e1000_init_mac_params_82542()
143 mac->ops.led_off = e1000_led_off_82542; in e1000_init_mac_params_82542()
145 mac->ops.clear_hw_cntrs = e1000_clear_hw_cntrs_82542; in e1000_init_mac_params_82542()
147 mac->ops.get_link_up_info = in e1000_init_mac_params_82542()
154 * e1000_init_function_pointers_82542 - Init func ptrs.
155 * @hw: pointer to the HW structure
159 void e1000_init_function_pointers_82542(struct e1000_hw *hw) in e1000_init_function_pointers_82542() argument
163 hw->mac.ops.init_params = e1000_init_mac_params_82542; in e1000_init_function_pointers_82542()
164 hw->nvm.ops.init_params = e1000_init_nvm_params_82542; in e1000_init_function_pointers_82542()
165 hw->phy.ops.init_params = e1000_init_phy_params_82542; in e1000_init_function_pointers_82542()
169 * e1000_get_bus_info_82542 - Obtain bus information for adapter
170 * @hw: pointer to the HW structure
172 * This will obtain information about the HW bus for which the
173 * adapter is attached and stores it in the hw structure.
175 static s32 e1000_get_bus_info_82542(struct e1000_hw *hw) in e1000_get_bus_info_82542() argument
179 hw->bus.type = e1000_bus_type_pci; in e1000_get_bus_info_82542()
180 hw->bus.speed = e1000_bus_speed_unknown; in e1000_get_bus_info_82542()
181 hw->bus.width = e1000_bus_width_unknown; in e1000_get_bus_info_82542()
187 * e1000_reset_hw_82542 - Reset hardware
188 * @hw: pointer to the HW structure
192 static s32 e1000_reset_hw_82542(struct e1000_hw *hw) in e1000_reset_hw_82542() argument
194 struct e1000_bus_info *bus = &hw->bus; in e1000_reset_hw_82542()
196 u32 ctrl; in e1000_reset_hw_82542() local
200 if (hw->revision_id == E1000_REVISION_2) { in e1000_reset_hw_82542()
202 e1000_pci_clear_mwi(hw); in e1000_reset_hw_82542()
206 E1000_WRITE_REG(hw, E1000_IMC, 0xffffffff); in e1000_reset_hw_82542()
208 E1000_WRITE_REG(hw, E1000_RCTL, 0); in e1000_reset_hw_82542()
209 E1000_WRITE_REG(hw, E1000_TCTL, E1000_TCTL_PSP); in e1000_reset_hw_82542()
210 E1000_WRITE_FLUSH(hw); in e1000_reset_hw_82542()
218 ctrl = E1000_READ_REG(hw, E1000_CTRL); in e1000_reset_hw_82542()
221 E1000_WRITE_REG(hw, E1000_CTRL, ctrl | E1000_CTRL_RST); in e1000_reset_hw_82542()
223 hw->nvm.ops.reload(hw); in e1000_reset_hw_82542()
226 E1000_WRITE_REG(hw, E1000_IMC, 0xffffffff); in e1000_reset_hw_82542()
227 E1000_READ_REG(hw, E1000_ICR); in e1000_reset_hw_82542()
229 if (hw->revision_id == E1000_REVISION_2) { in e1000_reset_hw_82542()
230 if (bus->pci_cmd_word & CMD_MEM_WRT_INVALIDATE) in e1000_reset_hw_82542()
231 e1000_pci_set_mwi(hw); in e1000_reset_hw_82542()
238 * e1000_init_hw_82542 - Initialize hardware
239 * @hw: pointer to the HW structure
243 static s32 e1000_init_hw_82542(struct e1000_hw *hw) in e1000_init_hw_82542() argument
245 struct e1000_mac_info *mac = &hw->mac; in e1000_init_hw_82542()
246 struct e1000_dev_spec_82542 *dev_spec = &hw->dev_spec._82542; in e1000_init_hw_82542()
248 u32 ctrl; in e1000_init_hw_82542() local
254 E1000_WRITE_REG(hw, E1000_VET, 0); in e1000_init_hw_82542()
255 mac->ops.clear_vfta(hw); in e1000_init_hw_82542()
258 if (hw->revision_id == E1000_REVISION_2) { in e1000_init_hw_82542()
260 e1000_pci_clear_mwi(hw); in e1000_init_hw_82542()
261 E1000_WRITE_REG(hw, E1000_RCTL, E1000_RCTL_RST); in e1000_init_hw_82542()
262 E1000_WRITE_FLUSH(hw); in e1000_init_hw_82542()
267 e1000_init_rx_addrs_generic(hw, mac->rar_entry_count); in e1000_init_hw_82542()
270 if (hw->revision_id == E1000_REVISION_2) { in e1000_init_hw_82542()
271 E1000_WRITE_REG(hw, E1000_RCTL, 0); in e1000_init_hw_82542()
272 E1000_WRITE_FLUSH(hw); in e1000_init_hw_82542()
274 if (hw->bus.pci_cmd_word & CMD_MEM_WRT_INVALIDATE) in e1000_init_hw_82542()
275 e1000_pci_set_mwi(hw); in e1000_init_hw_82542()
280 for (i = 0; i < mac->mta_reg_count; i++) in e1000_init_hw_82542()
281 E1000_WRITE_REG_ARRAY(hw, E1000_MTA, i, 0); in e1000_init_hw_82542()
284 * Set the PCI priority bit correctly in the CTRL register. This in e1000_init_hw_82542()
288 if (dev_spec->dma_fairness) { in e1000_init_hw_82542()
289 ctrl = E1000_READ_REG(hw, E1000_CTRL); in e1000_init_hw_82542()
290 E1000_WRITE_REG(hw, E1000_CTRL, ctrl | E1000_CTRL_PRIOR); in e1000_init_hw_82542()
293 /* Setup link and flow control */ in e1000_init_hw_82542()
294 ret_val = e1000_setup_link_82542(hw); in e1000_init_hw_82542()
302 e1000_clear_hw_cntrs_82542(hw); in e1000_init_hw_82542()
308 * e1000_setup_link_82542 - Setup flow control and link settings
309 * @hw: pointer to the HW structure
311 * Determines which flow control settings to use, then configures flow
312 * control. Calls the appropriate media-specific link configuration
317 static s32 e1000_setup_link_82542(struct e1000_hw *hw) in e1000_setup_link_82542() argument
319 struct e1000_mac_info *mac = &hw->mac; in e1000_setup_link_82542()
324 ret_val = e1000_set_default_fc_generic(hw); in e1000_setup_link_82542()
328 hw->fc.requested_mode &= ~e1000_fc_tx_pause; in e1000_setup_link_82542()
330 if (mac->report_tx_early) in e1000_setup_link_82542()
331 hw->fc.requested_mode &= ~e1000_fc_rx_pause; in e1000_setup_link_82542()
334 * Save off the requested flow control mode for use later. Depending in e1000_setup_link_82542()
337 hw->fc.current_mode = hw->fc.requested_mode; in e1000_setup_link_82542()
339 DEBUGOUT1("After fix-ups FlowControl is now = %x\n", in e1000_setup_link_82542()
340 hw->fc.current_mode); in e1000_setup_link_82542()
343 ret_val = mac->ops.setup_physical_interface(hw); in e1000_setup_link_82542()
348 * Initialize the flow control address, type, and PAUSE timer in e1000_setup_link_82542()
349 * registers to their default values. This is done even if flow in e1000_setup_link_82542()
353 DEBUGOUT("Initializing Flow Control address, type and timer regs\n"); in e1000_setup_link_82542()
355 E1000_WRITE_REG(hw, E1000_FCAL, FLOW_CONTROL_ADDRESS_LOW); in e1000_setup_link_82542()
356 E1000_WRITE_REG(hw, E1000_FCAH, FLOW_CONTROL_ADDRESS_HIGH); in e1000_setup_link_82542()
357 E1000_WRITE_REG(hw, E1000_FCT, FLOW_CONTROL_TYPE); in e1000_setup_link_82542()
359 E1000_WRITE_REG(hw, E1000_FCTTV, hw->fc.pause_time); in e1000_setup_link_82542()
361 ret_val = e1000_set_fc_watermarks_generic(hw); in e1000_setup_link_82542()
368 * e1000_led_on_82542 - Turn on SW controllable LED
369 * @hw: pointer to the HW structure
373 static s32 e1000_led_on_82542(struct e1000_hw *hw) in e1000_led_on_82542() argument
375 u32 ctrl = E1000_READ_REG(hw, E1000_CTRL); in e1000_led_on_82542() local
379 ctrl |= E1000_CTRL_SWDPIN0; in e1000_led_on_82542()
380 ctrl |= E1000_CTRL_SWDPIO0; in e1000_led_on_82542()
381 E1000_WRITE_REG(hw, E1000_CTRL, ctrl); in e1000_led_on_82542()
387 * e1000_led_off_82542 - Turn off SW controllable LED
388 * @hw: pointer to the HW structure
392 static s32 e1000_led_off_82542(struct e1000_hw *hw) in e1000_led_off_82542() argument
394 u32 ctrl = E1000_READ_REG(hw, E1000_CTRL); in e1000_led_off_82542() local
398 ctrl &= ~E1000_CTRL_SWDPIN0; in e1000_led_off_82542()
399 ctrl |= E1000_CTRL_SWDPIO0; in e1000_led_off_82542()
400 E1000_WRITE_REG(hw, E1000_CTRL, ctrl); in e1000_led_off_82542()
406 * e1000_rar_set_82542 - Set receive address register
407 * @hw: pointer to the HW structure
414 static int e1000_rar_set_82542(struct e1000_hw *hw, u8 *addr, u32 index) in e1000_rar_set_82542() argument
421 * HW expects these in little endian so we reverse the byte order in e1000_rar_set_82542()
433 E1000_WRITE_REG_ARRAY(hw, E1000_RA, (index << 1), rar_low); in e1000_rar_set_82542()
434 E1000_WRITE_REG_ARRAY(hw, E1000_RA, ((index << 1) + 1), rar_high); in e1000_rar_set_82542()
440 * e1000_translate_register_82542 - Translate the proper register offset
537 * e1000_clear_hw_cntrs_82542 - Clear device specific hardware counters
538 * @hw: pointer to the HW structure
542 static void e1000_clear_hw_cntrs_82542(struct e1000_hw *hw) in e1000_clear_hw_cntrs_82542() argument
546 e1000_clear_hw_cntrs_base_generic(hw); in e1000_clear_hw_cntrs_82542()
548 E1000_READ_REG(hw, E1000_PRC64); in e1000_clear_hw_cntrs_82542()
549 E1000_READ_REG(hw, E1000_PRC127); in e1000_clear_hw_cntrs_82542()
550 E1000_READ_REG(hw, E1000_PRC255); in e1000_clear_hw_cntrs_82542()
551 E1000_READ_REG(hw, E1000_PRC511); in e1000_clear_hw_cntrs_82542()
552 E1000_READ_REG(hw, E1000_PRC1023); in e1000_clear_hw_cntrs_82542()
553 E1000_READ_REG(hw, E1000_PRC1522); in e1000_clear_hw_cntrs_82542()
554 E1000_READ_REG(hw, E1000_PTC64); in e1000_clear_hw_cntrs_82542()
555 E1000_READ_REG(hw, E1000_PTC127); in e1000_clear_hw_cntrs_82542()
556 E1000_READ_REG(hw, E1000_PTC255); in e1000_clear_hw_cntrs_82542()
557 E1000_READ_REG(hw, E1000_PTC511); in e1000_clear_hw_cntrs_82542()
558 E1000_READ_REG(hw, E1000_PTC1023); in e1000_clear_hw_cntrs_82542()
559 E1000_READ_REG(hw, E1000_PTC1522); in e1000_clear_hw_cntrs_82542()
563 * e1000_read_mac_addr_82542 - Read device MAC address
564 * @hw: pointer to the HW structure
568 s32 e1000_read_mac_addr_82542(struct e1000_hw *hw) in e1000_read_mac_addr_82542() argument
577 ret_val = hw->nvm.ops.read(hw, offset, 1, &nvm_data); in e1000_read_mac_addr_82542()
582 hw->mac.perm_addr[i] = (u8)(nvm_data & 0xFF); in e1000_read_mac_addr_82542()
583 hw->mac.perm_addr[i+1] = (u8)(nvm_data >> 8); in e1000_read_mac_addr_82542()
587 hw->mac.addr[i] = hw->mac.perm_addr[i]; in e1000_read_mac_addr_82542()