Lines Matching +full:save +full:- +full:mac +full:- +full:address
2 SPDX-License-Identifier: BSD-3-Clause
4 Copyright (c) 2001-2020, Intel Corporation
82 * e1000_init_phy_params_82541 - Init PHY func ptrs.
87 struct e1000_phy_info *phy = &hw->phy; in e1000_init_phy_params_82541()
92 phy->addr = 1; in e1000_init_phy_params_82541()
93 phy->autoneg_mask = AUTONEG_ADVERTISE_SPEED_DEFAULT; in e1000_init_phy_params_82541()
94 phy->reset_delay_us = 10000; in e1000_init_phy_params_82541()
95 phy->type = e1000_phy_igp; in e1000_init_phy_params_82541()
98 phy->ops.check_polarity = e1000_check_polarity_igp; in e1000_init_phy_params_82541()
99 phy->ops.force_speed_duplex = e1000_phy_force_speed_duplex_igp; in e1000_init_phy_params_82541()
100 phy->ops.get_cable_length = e1000_get_cable_length_igp_82541; in e1000_init_phy_params_82541()
101 phy->ops.get_cfg_done = e1000_get_cfg_done_generic; in e1000_init_phy_params_82541()
102 phy->ops.get_info = e1000_get_phy_info_igp; in e1000_init_phy_params_82541()
103 phy->ops.read_reg = e1000_read_phy_reg_igp; in e1000_init_phy_params_82541()
104 phy->ops.reset = e1000_phy_hw_reset_82541; in e1000_init_phy_params_82541()
105 phy->ops.set_d3_lplu_state = e1000_set_d3_lplu_state_82541; in e1000_init_phy_params_82541()
106 phy->ops.write_reg = e1000_write_phy_reg_igp; in e1000_init_phy_params_82541()
107 phy->ops.power_up = e1000_power_up_phy_copper; in e1000_init_phy_params_82541()
108 phy->ops.power_down = e1000_power_down_phy_copper_82541; in e1000_init_phy_params_82541()
115 if (phy->id != IGP01E1000_I_PHY_ID) { in e1000_init_phy_params_82541()
116 ret_val = -E1000_ERR_PHY; in e1000_init_phy_params_82541()
125 * e1000_init_nvm_params_82541 - Init NVM func ptrs.
130 struct e1000_nvm_info *nvm = &hw->nvm; in e1000_init_nvm_params_82541()
137 switch (nvm->override) { in e1000_init_nvm_params_82541()
139 nvm->type = e1000_nvm_eeprom_spi; in e1000_init_nvm_params_82541()
143 nvm->type = e1000_nvm_eeprom_spi; in e1000_init_nvm_params_82541()
147 nvm->type = e1000_nvm_eeprom_microwire; in e1000_init_nvm_params_82541()
151 nvm->type = e1000_nvm_eeprom_microwire; in e1000_init_nvm_params_82541()
155 nvm->type = eecd & E1000_EECD_TYPE ? e1000_nvm_eeprom_spi in e1000_init_nvm_params_82541()
160 if (nvm->type == e1000_nvm_eeprom_spi) { in e1000_init_nvm_params_82541()
161 nvm->address_bits = (eecd & E1000_EECD_ADDR_BITS) ? 16 : 8; in e1000_init_nvm_params_82541()
162 nvm->delay_usec = 1; in e1000_init_nvm_params_82541()
163 nvm->opcode_bits = 8; in e1000_init_nvm_params_82541()
164 nvm->page_size = (eecd & E1000_EECD_ADDR_BITS) ? 32 : 8; in e1000_init_nvm_params_82541()
167 nvm->ops.acquire = e1000_acquire_nvm_generic; in e1000_init_nvm_params_82541()
168 nvm->ops.read = e1000_read_nvm_spi; in e1000_init_nvm_params_82541()
169 nvm->ops.release = e1000_release_nvm_generic; in e1000_init_nvm_params_82541()
170 nvm->ops.update = e1000_update_nvm_checksum_generic; in e1000_init_nvm_params_82541()
171 nvm->ops.valid_led_default = e1000_valid_led_default_generic; in e1000_init_nvm_params_82541()
172 nvm->ops.validate = e1000_validate_nvm_checksum_generic; in e1000_init_nvm_params_82541()
173 nvm->ops.write = e1000_write_nvm_spi; in e1000_init_nvm_params_82541()
176 * nvm->word_size must be discovered after the pointers in e1000_init_nvm_params_82541()
181 nvm->word_size = 64; in e1000_init_nvm_params_82541()
182 ret_val = nvm->ops.read(hw, NVM_CFG, 1, &size); in e1000_init_nvm_params_82541()
188 * the left-shift value to set the word_size. Otherwise, in e1000_init_nvm_params_82541()
193 nvm->word_size = 1 << size; in e1000_init_nvm_params_82541()
196 nvm->address_bits = (eecd & E1000_EECD_ADDR_BITS) ? 8 : 6; in e1000_init_nvm_params_82541()
197 nvm->delay_usec = 50; in e1000_init_nvm_params_82541()
198 nvm->opcode_bits = 3; in e1000_init_nvm_params_82541()
199 nvm->word_size = (eecd & E1000_EECD_ADDR_BITS) ? 256 : 64; in e1000_init_nvm_params_82541()
202 nvm->ops.acquire = e1000_acquire_nvm_generic; in e1000_init_nvm_params_82541()
203 nvm->ops.read = e1000_read_nvm_microwire; in e1000_init_nvm_params_82541()
204 nvm->ops.release = e1000_release_nvm_generic; in e1000_init_nvm_params_82541()
205 nvm->ops.update = e1000_update_nvm_checksum_generic; in e1000_init_nvm_params_82541()
206 nvm->ops.valid_led_default = e1000_valid_led_default_generic; in e1000_init_nvm_params_82541()
207 nvm->ops.validate = e1000_validate_nvm_checksum_generic; in e1000_init_nvm_params_82541()
208 nvm->ops.write = e1000_write_nvm_microwire; in e1000_init_nvm_params_82541()
216 * e1000_init_mac_params_82541 - Init MAC func ptrs.
221 struct e1000_mac_info *mac = &hw->mac; in e1000_init_mac_params_82541() local
226 hw->phy.media_type = e1000_media_type_copper; in e1000_init_mac_params_82541()
228 mac->mta_reg_count = 128; in e1000_init_mac_params_82541()
230 mac->rar_entry_count = E1000_RAR_ENTRIES; in e1000_init_mac_params_82541()
232 mac->asf_firmware_present = true; in e1000_init_mac_params_82541()
237 mac->ops.get_bus_info = e1000_get_bus_info_pci_generic; in e1000_init_mac_params_82541()
239 mac->ops.set_lan_id = e1000_set_lan_id_single_port; in e1000_init_mac_params_82541()
241 mac->ops.reset_hw = e1000_reset_hw_82541; in e1000_init_mac_params_82541()
243 mac->ops.init_hw = e1000_init_hw_82541; in e1000_init_mac_params_82541()
245 mac->ops.setup_link = e1000_setup_link_generic; in e1000_init_mac_params_82541()
247 mac->ops.setup_physical_interface = e1000_setup_copper_link_82541; in e1000_init_mac_params_82541()
249 mac->ops.check_for_link = e1000_check_for_link_82541; in e1000_init_mac_params_82541()
251 mac->ops.get_link_up_info = e1000_get_link_up_info_82541; in e1000_init_mac_params_82541()
252 /* multicast address update */ in e1000_init_mac_params_82541()
253 mac->ops.update_mc_addr_list = e1000_update_mc_addr_list_generic; in e1000_init_mac_params_82541()
255 mac->ops.write_vfta = e1000_write_vfta_generic; in e1000_init_mac_params_82541()
257 mac->ops.clear_vfta = e1000_clear_vfta_generic; in e1000_init_mac_params_82541()
258 /* read mac address */ in e1000_init_mac_params_82541()
259 mac->ops.read_mac_addr = e1000_read_mac_addr_82541; in e1000_init_mac_params_82541()
261 mac->ops.id_led_init = e1000_id_led_init_generic; in e1000_init_mac_params_82541()
263 mac->ops.setup_led = e1000_setup_led_82541; in e1000_init_mac_params_82541()
265 mac->ops.cleanup_led = e1000_cleanup_led_82541; in e1000_init_mac_params_82541()
267 mac->ops.led_on = e1000_led_on_generic; in e1000_init_mac_params_82541()
268 mac->ops.led_off = e1000_led_off_generic; in e1000_init_mac_params_82541()
270 mac->ops.clear_hw_cntrs = e1000_clear_hw_cntrs_82541; in e1000_init_mac_params_82541()
276 * e1000_init_function_pointers_82541 - Init func ptrs.
285 hw->mac.ops.init_params = e1000_init_mac_params_82541; in e1000_init_function_pointers_82541()
286 hw->nvm.ops.init_params = e1000_init_nvm_params_82541; in e1000_init_function_pointers_82541()
287 hw->phy.ops.init_params = e1000_init_phy_params_82541; in e1000_init_function_pointers_82541()
291 * e1000_reset_hw_82541 - Reset hardware
317 /* Must reset the Phy before resetting the MAC */ in e1000_reset_hw_82541()
318 if ((hw->mac.type == e1000_82541) || (hw->mac.type == e1000_82547)) { in e1000_reset_hw_82541()
324 DEBUGOUT("Issuing a global reset to 82541/82547 MAC\n"); in e1000_reset_hw_82541()
325 switch (hw->mac.type) { in e1000_reset_hw_82541()
329 * These controllers can't ack the 64-bit write when in e1000_reset_hw_82541()
330 * issuing the reset, so we use IO-mapping as a in e1000_reset_hw_82541()
348 if ((hw->mac.type == e1000_82541) || (hw->mac.type == e1000_82547)) { in e1000_reset_hw_82541()
369 * e1000_init_hw_82541 - Initialize hardware
376 struct e1000_mac_info *mac = &hw->mac; in e1000_init_hw_82541() local
377 struct e1000_dev_spec_82541 *dev_spec = &hw->dev_spec._82541; in e1000_init_hw_82541()
384 ret_val = mac->ops.id_led_init(hw); in e1000_init_hw_82541()
391 ret_val = hw->phy.ops.read_reg(hw, IGP01E1000_GMII_FIFO, in e1000_init_hw_82541()
392 &dev_spec->spd_default); in e1000_init_hw_82541()
398 mac->ops.clear_vfta(hw); in e1000_init_hw_82541()
400 /* Setup the receive address. */ in e1000_init_hw_82541()
401 e1000_init_rx_addrs_generic(hw, mac->rar_entry_count); in e1000_init_hw_82541()
405 for (i = 0; i < mac->mta_reg_count; i++) { in e1000_init_hw_82541()
417 ret_val = mac->ops.setup_link(hw); in e1000_init_hw_82541()
437 * e1000_get_link_up_info_82541 - Report speed and duplex
447 struct e1000_phy_info *phy = &hw->phy; in e1000_get_link_up_info_82541()
457 if (!phy->speed_downgraded) in e1000_get_link_up_info_82541()
466 ret_val = phy->ops.read_reg(hw, PHY_AUTONEG_EXP, &data); in e1000_get_link_up_info_82541()
473 ret_val = phy->ops.read_reg(hw, PHY_LP_ABILITY, &data); in e1000_get_link_up_info_82541()
491 * e1000_phy_hw_reset_82541 - PHY hardware reset
512 if ((hw->mac.type == e1000_82541) || (hw->mac.type == e1000_82547)) { in e1000_phy_hw_reset_82541()
525 * e1000_setup_copper_link_82541 - Configure copper link settings
528 * Calls the appropriate function to configure the link for auto-neg or forced
531 * not established, we return -E1000_ERR_PHY (-2).
535 struct e1000_phy_info *phy = &hw->phy; in e1000_setup_copper_link_82541()
536 struct e1000_dev_spec_82541 *dev_spec = &hw->dev_spec._82541; in e1000_setup_copper_link_82541()
549 if (hw->mac.type == e1000_82541 || hw->mac.type == e1000_82547) { in e1000_setup_copper_link_82541()
550 dev_spec->dsp_config = e1000_dsp_config_disabled; in e1000_setup_copper_link_82541()
551 phy->mdix = 1; in e1000_setup_copper_link_82541()
553 dev_spec->dsp_config = e1000_dsp_config_enabled; in e1000_setup_copper_link_82541()
560 if (hw->mac.autoneg) { in e1000_setup_copper_link_82541()
561 if (dev_spec->ffe_config == e1000_ffe_config_active) in e1000_setup_copper_link_82541()
562 dev_spec->ffe_config = e1000_ffe_config_enabled; in e1000_setup_copper_link_82541()
578 * e1000_check_for_link_82541 - Check/Store link connection
582 * results in the hw->mac structure.
586 struct e1000_mac_info *mac = &hw->mac; in e1000_check_for_link_82541() local
593 * We only want to go out to the PHY registers to see if Auto-Neg in e1000_check_for_link_82541()
598 if (!mac->get_link_status) { in e1000_check_for_link_82541()
617 mac->get_link_status = false; in e1000_check_for_link_82541()
621 * immediately after link-up in e1000_check_for_link_82541()
629 if (!mac->autoneg) { in e1000_check_for_link_82541()
630 ret_val = -E1000_ERR_CONFIG; in e1000_check_for_link_82541()
637 * Auto-Neg is enabled. Auto Speed Detection takes care in e1000_check_for_link_82541()
638 * of MAC speed/duplex configuration. So we only need to in e1000_check_for_link_82541()
639 * configure Collision Distance in the MAC. in e1000_check_for_link_82541()
641 mac->ops.config_collision_dist(hw); in e1000_check_for_link_82541()
644 * Configure Flow Control now that Auto-Neg has completed. in e1000_check_for_link_82541()
646 * settings because we may have had to re-autoneg with a in e1000_check_for_link_82541()
658 * e1000_config_dsp_after_link_change_82541 - Config DSP after link
671 struct e1000_phy_info *phy = &hw->phy; in e1000_config_dsp_after_link_change_82541()
672 struct e1000_dev_spec_82541 *dev_spec = &hw->dev_spec._82541; in e1000_config_dsp_after_link_change_82541()
686 ret_val = hw->mac.ops.get_link_up_info(hw, &speed, &duplex); in e1000_config_dsp_after_link_change_82541()
697 ret_val = phy->ops.get_cable_length(hw); in e1000_config_dsp_after_link_change_82541()
701 if ((dev_spec->dsp_config == e1000_dsp_config_enabled) && in e1000_config_dsp_after_link_change_82541()
702 phy->min_cable_length >= 50) { in e1000_config_dsp_after_link_change_82541()
705 ret_val = phy->ops.read_reg(hw, in e1000_config_dsp_after_link_change_82541()
713 ret_val = phy->ops.write_reg(hw, in e1000_config_dsp_after_link_change_82541()
719 dev_spec->dsp_config = e1000_dsp_config_activated; in e1000_config_dsp_after_link_change_82541()
722 if ((dev_spec->ffe_config != e1000_ffe_config_enabled) || in e1000_config_dsp_after_link_change_82541()
723 (phy->min_cable_length >= 50)) { in e1000_config_dsp_after_link_change_82541()
729 ret_val = phy->ops.read_reg(hw, PHY_1000T_STATUS, &phy_data); in e1000_config_dsp_after_link_change_82541()
735 ret_val = phy->ops.read_reg(hw, PHY_1000T_STATUS, in e1000_config_dsp_after_link_change_82541()
742 dev_spec->ffe_config = e1000_ffe_config_active; in e1000_config_dsp_after_link_change_82541()
744 ret_val = phy->ops.write_reg(hw, in e1000_config_dsp_after_link_change_82541()
757 if (dev_spec->dsp_config == e1000_dsp_config_activated) { in e1000_config_dsp_after_link_change_82541()
759 * Save off the current value of register 0x2F5B in e1000_config_dsp_after_link_change_82541()
762 ret_val = phy->ops.read_reg(hw, 0x2F5B, in e1000_config_dsp_after_link_change_82541()
768 ret_val = phy->ops.write_reg(hw, 0x2F5B, 0x0003); in e1000_config_dsp_after_link_change_82541()
774 ret_val = phy->ops.write_reg(hw, 0x0000, in e1000_config_dsp_after_link_change_82541()
779 ret_val = phy->ops.read_reg(hw, in e1000_config_dsp_after_link_change_82541()
788 ret_val = phy->ops.write_reg(hw, in e1000_config_dsp_after_link_change_82541()
795 ret_val = phy->ops.write_reg(hw, 0x0000, in e1000_config_dsp_after_link_change_82541()
803 ret_val = phy->ops.write_reg(hw, 0x2F5B, in e1000_config_dsp_after_link_change_82541()
808 dev_spec->dsp_config = e1000_dsp_config_enabled; in e1000_config_dsp_after_link_change_82541()
811 if (dev_spec->ffe_config != e1000_ffe_config_active) { in e1000_config_dsp_after_link_change_82541()
817 * Save off the current value of register 0x2F5B in e1000_config_dsp_after_link_change_82541()
820 ret_val = phy->ops.read_reg(hw, 0x2F5B, &phy_saved_data); in e1000_config_dsp_after_link_change_82541()
825 ret_val = phy->ops.write_reg(hw, 0x2F5B, 0x0003); in e1000_config_dsp_after_link_change_82541()
831 ret_val = phy->ops.write_reg(hw, 0x0000, in e1000_config_dsp_after_link_change_82541()
836 ret_val = phy->ops.write_reg(hw, IGP01E1000_PHY_DSP_FFE, in e1000_config_dsp_after_link_change_82541()
841 ret_val = phy->ops.write_reg(hw, 0x0000, in e1000_config_dsp_after_link_change_82541()
849 ret_val = phy->ops.write_reg(hw, 0x2F5B, phy_saved_data); in e1000_config_dsp_after_link_change_82541()
854 dev_spec->ffe_config = e1000_ffe_config_enabled; in e1000_config_dsp_after_link_change_82541()
862 * e1000_get_cable_length_igp_82541 - Determine cable length for igp PHY
874 struct e1000_phy_info *phy = &hw->phy; in e1000_get_cable_length_igp_82541()
888 ret_val = phy->ops.read_reg(hw, agc_reg_array[i], &data); in e1000_get_cable_length_igp_82541()
895 if ((cur_agc_value >= IGP01E1000_AGC_LENGTH_TABLE_SIZE - 1) || in e1000_get_cable_length_igp_82541()
897 ret_val = -E1000_ERR_PHY; in e1000_get_cable_length_igp_82541()
909 agc_value -= min_agc_value; in e1000_get_cable_length_igp_82541()
911 agc_value /= (IGP01E1000_PHY_CHANNEL_NUM - 1); in e1000_get_cable_length_igp_82541()
917 phy->min_cable_length = (e1000_igp_cable_length_table[agc_value] > in e1000_get_cable_length_igp_82541()
919 ? (e1000_igp_cable_length_table[agc_value] - in e1000_get_cable_length_igp_82541()
922 phy->max_cable_length = e1000_igp_cable_length_table[agc_value] + in e1000_get_cable_length_igp_82541()
925 phy->cable_length = (phy->min_cable_length + phy->max_cable_length) / 2; in e1000_get_cable_length_igp_82541()
932 * e1000_set_d3_lplu_state_82541 - Sets low power link up state for D3
947 struct e1000_phy_info *phy = &hw->phy; in e1000_set_d3_lplu_state_82541()
953 switch (hw->mac.type) { in e1000_set_d3_lplu_state_82541()
963 ret_val = phy->ops.read_reg(hw, IGP01E1000_GMII_FIFO, &data); in e1000_set_d3_lplu_state_82541()
969 ret_val = phy->ops.write_reg(hw, IGP01E1000_GMII_FIFO, data); in e1000_set_d3_lplu_state_82541()
979 if (phy->smart_speed == e1000_smart_speed_on) { in e1000_set_d3_lplu_state_82541()
980 ret_val = phy->ops.read_reg(hw, in e1000_set_d3_lplu_state_82541()
987 ret_val = phy->ops.write_reg(hw, in e1000_set_d3_lplu_state_82541()
992 } else if (phy->smart_speed == e1000_smart_speed_off) { in e1000_set_d3_lplu_state_82541()
993 ret_val = phy->ops.read_reg(hw, in e1000_set_d3_lplu_state_82541()
1000 ret_val = phy->ops.write_reg(hw, in e1000_set_d3_lplu_state_82541()
1006 } else if ((phy->autoneg_advertised == E1000_ALL_SPEED_DUPLEX) || in e1000_set_d3_lplu_state_82541()
1007 (phy->autoneg_advertised == E1000_ALL_NOT_GIG) || in e1000_set_d3_lplu_state_82541()
1008 (phy->autoneg_advertised == E1000_ALL_10_SPEED)) { in e1000_set_d3_lplu_state_82541()
1010 ret_val = phy->ops.write_reg(hw, IGP01E1000_GMII_FIFO, data); in e1000_set_d3_lplu_state_82541()
1015 ret_val = phy->ops.read_reg(hw, IGP01E1000_PHY_PORT_CONFIG, in e1000_set_d3_lplu_state_82541()
1021 ret_val = phy->ops.write_reg(hw, IGP01E1000_PHY_PORT_CONFIG, in e1000_set_d3_lplu_state_82541()
1030 * e1000_setup_led_82541 - Configures SW controllable LED
1038 struct e1000_dev_spec_82541 *dev_spec = &hw->dev_spec._82541; in e1000_setup_led_82541()
1043 ret_val = hw->phy.ops.read_reg(hw, IGP01E1000_GMII_FIFO, in e1000_setup_led_82541()
1044 &dev_spec->spd_default); in e1000_setup_led_82541()
1048 ret_val = hw->phy.ops.write_reg(hw, IGP01E1000_GMII_FIFO, in e1000_setup_led_82541()
1049 (u16)(dev_spec->spd_default & in e1000_setup_led_82541()
1054 E1000_WRITE_REG(hw, E1000_LEDCTL, hw->mac.ledctl_mode1); in e1000_setup_led_82541()
1061 * e1000_cleanup_led_82541 - Set LED config to default operation
1069 struct e1000_dev_spec_82541 *dev_spec = &hw->dev_spec._82541; in e1000_cleanup_led_82541()
1074 ret_val = hw->phy.ops.write_reg(hw, IGP01E1000_GMII_FIFO, in e1000_cleanup_led_82541()
1075 dev_spec->spd_default); in e1000_cleanup_led_82541()
1079 E1000_WRITE_REG(hw, E1000_LEDCTL, hw->mac.ledctl_default); in e1000_cleanup_led_82541()
1086 * e1000_phy_init_script_82541 - Initialize GbE PHY
1093 struct e1000_dev_spec_82541 *dev_spec = &hw->dev_spec._82541; in e1000_phy_init_script_82541()
1099 if (!dev_spec->phy_init_script) { in e1000_phy_init_script_82541()
1108 * Save off the current value of register 0x2F5B to be restored at in e1000_phy_init_script_82541()
1111 ret_val = hw->phy.ops.read_reg(hw, 0x2F5B, &phy_saved_data); in e1000_phy_init_script_82541()
1114 hw->phy.ops.write_reg(hw, 0x2F5B, 0x0003); in e1000_phy_init_script_82541()
1118 hw->phy.ops.write_reg(hw, 0x0000, 0x0140); in e1000_phy_init_script_82541()
1122 switch (hw->mac.type) { in e1000_phy_init_script_82541()
1125 hw->phy.ops.write_reg(hw, 0x1F95, 0x0001); in e1000_phy_init_script_82541()
1127 hw->phy.ops.write_reg(hw, 0x1F71, 0xBD21); in e1000_phy_init_script_82541()
1129 hw->phy.ops.write_reg(hw, 0x1F79, 0x0018); in e1000_phy_init_script_82541()
1131 hw->phy.ops.write_reg(hw, 0x1F30, 0x1600); in e1000_phy_init_script_82541()
1133 hw->phy.ops.write_reg(hw, 0x1F31, 0x0014); in e1000_phy_init_script_82541()
1135 hw->phy.ops.write_reg(hw, 0x1F32, 0x161C); in e1000_phy_init_script_82541()
1137 hw->phy.ops.write_reg(hw, 0x1F94, 0x0003); in e1000_phy_init_script_82541()
1139 hw->phy.ops.write_reg(hw, 0x1F96, 0x003F); in e1000_phy_init_script_82541()
1141 hw->phy.ops.write_reg(hw, 0x2010, 0x0008); in e1000_phy_init_script_82541()
1145 hw->phy.ops.write_reg(hw, 0x1F73, 0x0099); in e1000_phy_init_script_82541()
1151 hw->phy.ops.write_reg(hw, 0x0000, 0x3300); in e1000_phy_init_script_82541()
1156 hw->phy.ops.write_reg(hw, 0x2F5B, phy_saved_data); in e1000_phy_init_script_82541()
1158 if (hw->mac.type == e1000_82547) { in e1000_phy_init_script_82541()
1162 hw->phy.ops.read_reg(hw, IGP01E1000_ANALOG_SPARE_FUSE_STATUS, in e1000_phy_init_script_82541()
1166 hw->phy.ops.read_reg(hw, IGP01E1000_ANALOG_FUSE_STATUS, in e1000_phy_init_script_82541()
1173 coarse -= IGP01E1000_ANALOG_FUSE_COARSE_10; in e1000_phy_init_script_82541()
1174 fine -= IGP01E1000_ANALOG_FUSE_FINE_1; in e1000_phy_init_script_82541()
1177 fine -= IGP01E1000_ANALOG_FUSE_FINE_10; in e1000_phy_init_script_82541()
1183 hw->phy.ops.write_reg(hw, in e1000_phy_init_script_82541()
1186 hw->phy.ops.write_reg(hw, in e1000_phy_init_script_82541()
1197 * e1000_init_script_state_82541 - Enable/Disable PHY init script
1206 struct e1000_dev_spec_82541 *dev_spec = &hw->dev_spec._82541; in e1000_init_script_state_82541()
1210 if (hw->phy.type != e1000_phy_igp) { in e1000_init_script_state_82541()
1215 dev_spec->phy_init_script = state; in e1000_init_script_state_82541()
1222 * e1000_power_down_phy_copper_82541 - Remove link in case of PHY power down
1225 * In the case of a PHY power down to save power, or to turn off link during a
1238 * e1000_clear_hw_cntrs_82541 - Clear device specific hardware counters
1275 * e1000_read_mac_addr_82541 - Read device MAC address
1278 * Reads the device MAC address from the EEPROM and stores the value.
1289 ret_val = hw->nvm.ops.read(hw, offset, 1, &nvm_data); in e1000_read_mac_addr_82541()
1294 hw->mac.perm_addr[i] = (u8)(nvm_data & 0xFF); in e1000_read_mac_addr_82541()
1295 hw->mac.perm_addr[i+1] = (u8)(nvm_data >> 8); in e1000_read_mac_addr_82541()
1299 hw->mac.addr[i] = hw->mac.perm_addr[i]; in e1000_read_mac_addr_82541()