2  * Copyright © 1997-2003 by The XFree86 Project, Inc.
4  * Copyright © 2007-2008 Intel Corporation
6  * Copyright 2005-2006 Luc Verhaegen
38  * drm_mode_debug_printmodeline - debug print a mode
51 		mode->base.id, mode->name, mode->vrefresh, mode->clock,  in drm_mode_debug_printmodeline()
52 		mode->hdisplay, mode->hsync_start,  in drm_mode_debug_printmodeline()
53 		mode->hsync_end, mode->htotal,  in drm_mode_debug_printmodeline()
54 		mode->vdisplay, mode->vsync_start,  in drm_mode_debug_printmodeline()
55 		mode->vsync_end, mode->vtotal, mode->type, mode->flags);  in drm_mode_debug_printmodeline()
60  * drm_cvt_mode -create a modeline based on CVT algorithm
87 	/* 1) top/bottom margin size (% of height) - default: 1.8, */  in drm_cvt_mode()
89 	/* 2) character cell horizontal granularity (pixels) - default 8 */  in drm_cvt_mode()
91 	/* 3) Minimum vertical porch (lines) - default 3 */  in drm_cvt_mode()
93 	/* 4) Minimum number of vertical back porch lines - default 6 */  in drm_cvt_mode()
120 	hdisplay_rnd = hdisplay - (hdisplay % CVT_H_GRANULARITY);  in drm_cvt_mode()
126 		hmargin -= hmargin % CVT_H_GRANULARITY;  in drm_cvt_mode()
129 	drm_mode->hdisplay = hdisplay_rnd + 2 * hmargin;  in drm_cvt_mode()
142 	drm_mode->vdisplay = vdisplay + 2 * vmargin;  in drm_cvt_mode()
171 		/* 3) Nominal HSync width (% of line period) - default 8 */  in drm_cvt_mode()
177 		tmp1 = HV_FACTOR * 1000000  -  in drm_cvt_mode()
189 		drm_mode->vtotal = vdisplay_rnd + 2 * vmargin +  in drm_cvt_mode()
191 		/* 5) Definition of Horizontal blanking time limitation */  in drm_cvt_mode()
192 		/* Gradient (%/kHz) - default 600 */  in drm_cvt_mode()
194 		/* Offset (%) - default 40 */  in drm_cvt_mode()
196 		/* Blanking time scaling factor - default 128 */  in drm_cvt_mode()
198 		/* Scaling factor weighting - default 20 */  in drm_cvt_mode()
201 #define CVT_C_PRIME	((CVT_C_FACTOR - CVT_J_FACTOR) * CVT_K_FACTOR / 256 + \  in drm_cvt_mode()
203 		/* 12. Find ideal blanking duty cycle from formula */  in drm_cvt_mode()
204 		hblank_percentage = CVT_C_PRIME * HV_FACTOR - CVT_M_PRIME *  in drm_cvt_mode()
206 		/* 13. Blanking time */  in drm_cvt_mode()
209 		hblank = drm_mode->hdisplay * hblank_percentage /  in drm_cvt_mode()
210 			 (100 * HV_FACTOR - hblank_percentage);  in drm_cvt_mode()
211 		hblank -= hblank % (2 * CVT_H_GRANULARITY);  in drm_cvt_mode()
213 		drm_mode->htotal = drm_mode->hdisplay + hblank;  in drm_cvt_mode()
214 		drm_mode->hsync_end = drm_mode->hdisplay + hblank / 2;  in drm_cvt_mode()
215 		drm_mode->hsync_start = drm_mode->hsync_end -  in drm_cvt_mode()
216 			(drm_mode->htotal * CVT_HSYNC_PERCENTAGE) / 100;  in drm_cvt_mode()
217 		drm_mode->hsync_start += CVT_H_GRANULARITY -  in drm_cvt_mode()
218 			drm_mode->hsync_start % CVT_H_GRANULARITY;  in drm_cvt_mode()
220 		drm_mode->vsync_start = drm_mode->vdisplay + CVT_MIN_V_PORCH;  in drm_cvt_mode()
221 		drm_mode->vsync_end = drm_mode->vsync_start + vsync;  in drm_cvt_mode()
223 		/* Reduced blanking */  in drm_cvt_mode()
224 		/* Minimum vertical blanking interval time (µs)- default 460 */  in drm_cvt_mode()
228 		/* Fixed number of clocks for horizontal blanking */  in drm_cvt_mode()
230 		/* Fixed number of lines for vertical front porch - default 3*/  in drm_cvt_mode()
235 		tmp1 = HV_FACTOR * 1000000 -  in drm_cvt_mode()
239 		/* 9. Find number of lines in vertical blanking */  in drm_cvt_mode()
241 		/* 10. Check if vertical blanking is sufficient */  in drm_cvt_mode()
245 		drm_mode->vtotal = vdisplay_rnd + 2 * vmargin + vbilines;  in drm_cvt_mode()
247 		drm_mode->htotal = drm_mode->hdisplay + CVT_RB_H_BLANK;  in drm_cvt_mode()
249 		drm_mode->hsync_end = drm_mode->hdisplay + CVT_RB_H_BLANK / 2;  in drm_cvt_mode()
250 		drm_mode->hsync_start = drm_mode->hsync_end - CVT_RB_H_SYNC;  in drm_cvt_mode()
252 		drm_mode->vsync_start = drm_mode->vdisplay + CVT_RB_VFPORCH;  in drm_cvt_mode()
253 		drm_mode->vsync_end = drm_mode->vsync_start + vsync;  in drm_cvt_mode()
256 	drm_mode->clock = drm_mode->htotal * HV_FACTOR * 1000 / hperiod;  in drm_cvt_mode()
257 	drm_mode->clock -= drm_mode->clock % CVT_CLOCK_STEP;  in drm_cvt_mode()
259 	/* ignore - just set the mode flag for interlaced */  in drm_cvt_mode()
261 		drm_mode->vtotal *= 2;  in drm_cvt_mode()
262 		drm_mode->flags |= DRM_MODE_FLAG_INTERLACE;  in drm_cvt_mode()
267 		drm_mode->flags |= (DRM_MODE_FLAG_PHSYNC |  in drm_cvt_mode()
270 		drm_mode->flags |= (DRM_MODE_FLAG_PVSYNC |  in drm_cvt_mode()
278  * drm_gtf_mode_complex - create the modeline based on full GTF algorithm
300 {	/* 1) top/bottom margin size (% of height) - default: 1.8, */  in drm_gtf_mode_complex()
302 	/* 2) character cell horizontal granularity (pixels) - default 8 */  in drm_gtf_mode_complex()
304 	/* 3) Minimum vertical porch (lines) - default 3 */  in drm_gtf_mode_complex()
312 	/* C' and M' are part of the Blanking Duty Cycle computation */  in drm_gtf_mode_complex()
313 #define GTF_C_PRIME	((((GTF_2C - GTF_2J) * GTF_K / 256) + GTF_2J) / 2)  in drm_gtf_mode_complex()
371 		tmp1 = (1000000  - MIN_VSYNC_PLUS_BP * vfieldrate_rqd) / 500;  in drm_gtf_mode_complex()
377 	/* 8. Find the number of lines in V sync + back porch */  in drm_gtf_mode_complex()
378 	/* [V SYNC+BP] = RINT(([MIN VSYNC+BP] * hfreq_est / 1000000)) */  in drm_gtf_mode_complex()
396 	/* 18.Find the ideal blanking duty cycle from blanking duty cycle */  in drm_gtf_mode_complex()
397 	ideal_duty_cycle = GTF_C_PRIME * 1000 -  in drm_gtf_mode_complex()
399 	/* 19.Find the number of pixels in the blanking time to the nearest  in drm_gtf_mode_complex()
402 			(100000 - ideal_duty_cycle);  in drm_gtf_mode_complex()
418 	hfront_porch = hblank / 2 - hsync;  in drm_gtf_mode_complex()
423 	drm_mode->hdisplay = hdisplay_rnd;  in drm_gtf_mode_complex()
424 	drm_mode->hsync_start = hdisplay_rnd + hfront_porch;  in drm_gtf_mode_complex()
425 	drm_mode->hsync_end = drm_mode->hsync_start + hsync;  in drm_gtf_mode_complex()
426 	drm_mode->htotal = total_pixels;  in drm_gtf_mode_complex()
427 	drm_mode->vdisplay = vdisplay_rnd;  in drm_gtf_mode_complex()
428 	drm_mode->vsync_start = vdisplay_rnd + vodd_front_porch_lines;  in drm_gtf_mode_complex()
429 	drm_mode->vsync_end = drm_mode->vsync_start + V_SYNC_RQD;  in drm_gtf_mode_complex()
430 	drm_mode->vtotal = vtotal_lines;  in drm_gtf_mode_complex()
432 	drm_mode->clock = pixel_freq;  in drm_gtf_mode_complex()
435 		drm_mode->vtotal *= 2;  in drm_gtf_mode_complex()
436 		drm_mode->flags |= DRM_MODE_FLAG_INTERLACE;  in drm_gtf_mode_complex()
441 		drm_mode->flags = DRM_MODE_FLAG_NHSYNC | DRM_MODE_FLAG_PVSYNC;  in drm_gtf_mode_complex()
443 		drm_mode->flags = DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_NVSYNC;  in drm_gtf_mode_complex()
450  * drm_gtf_mode - create the modeline based on GTF algorithm
490  * drm_mode_set_name - set the name on a mode
500 	bool interlaced = !!(mode->flags & DRM_MODE_FLAG_INTERLACE);  in drm_mode_set_name()
502 	snprintf(mode->name, DRM_DISPLAY_MODE_LEN, "%dx%d%s",  in drm_mode_set_name()
503 		 mode->hdisplay, mode->vdisplay,  in drm_mode_set_name()
509  * drm_mode_list_concat - move modes from one list to another
530  * drm_mode_width - get the width of a mode
541  * @mode->hdisplay
545 	return mode->hdisplay;  in drm_mode_width()
551  * drm_mode_height - get the height of a mode
562  * @mode->vdisplay
566 	return mode->vdisplay;  in drm_mode_height()
570 /** drm_mode_hsync - get the hsync of a mode
582 	if (mode->hsync)  in drm_mode_hsync()
583 		return mode->hsync;  in drm_mode_hsync()
585 	if (mode->htotal < 0)  in drm_mode_hsync()
588 	calc_val = (mode->clock * 1000) / mode->htotal; /* hsync in Hz */  in drm_mode_hsync()
597  * drm_mode_vrefresh - get the vrefresh of a mode
617 	if (mode->vrefresh > 0)  in drm_mode_vrefresh()
618 		refresh = mode->vrefresh;  in drm_mode_vrefresh()
619 	else if (mode->htotal > 0 && mode->vtotal > 0) {  in drm_mode_vrefresh()
621 		vtotal = mode->vtotal;  in drm_mode_vrefresh()
623 		calc_val = (mode->clock * 1000);  in drm_mode_vrefresh()
624 		calc_val /= mode->htotal;  in drm_mode_vrefresh()
627 		if (mode->flags & DRM_MODE_FLAG_INTERLACE)  in drm_mode_vrefresh()
629 		if (mode->flags & DRM_MODE_FLAG_DBLSCAN)  in drm_mode_vrefresh()
631 		if (mode->vscan > 1)  in drm_mode_vrefresh()
632 			refresh /= mode->vscan;  in drm_mode_vrefresh()
639  * drm_mode_set_crtcinfo - set CRTC modesetting parameters
650 	if ((p == NULL) || ((p->type & DRM_MODE_TYPE_CRTC_C) == DRM_MODE_TYPE_BUILTIN))  in drm_mode_set_crtcinfo()
653 	p->crtc_hdisplay = p->hdisplay;  in drm_mode_set_crtcinfo()
654 	p->crtc_hsync_start = p->hsync_start;  in drm_mode_set_crtcinfo()
655 	p->crtc_hsync_end = p->hsync_end;  in drm_mode_set_crtcinfo()
656 	p->crtc_htotal = p->htotal;  in drm_mode_set_crtcinfo()
657 	p->crtc_hskew = p->hskew;  in drm_mode_set_crtcinfo()
658 	p->crtc_vdisplay = p->vdisplay;  in drm_mode_set_crtcinfo()
659 	p->crtc_vsync_start = p->vsync_start;  in drm_mode_set_crtcinfo()
660 	p->crtc_vsync_end = p->vsync_end;  in drm_mode_set_crtcinfo()
661 	p->crtc_vtotal = p->vtotal;  in drm_mode_set_crtcinfo()
663 	if (p->flags & DRM_MODE_FLAG_INTERLACE) {  in drm_mode_set_crtcinfo()
665 			p->crtc_vdisplay /= 2;  in drm_mode_set_crtcinfo()
666 			p->crtc_vsync_start /= 2;  in drm_mode_set_crtcinfo()
667 			p->crtc_vsync_end /= 2;  in drm_mode_set_crtcinfo()
668 			p->crtc_vtotal /= 2;  in drm_mode_set_crtcinfo()
672 	if (p->flags & DRM_MODE_FLAG_DBLSCAN) {  in drm_mode_set_crtcinfo()
673 		p->crtc_vdisplay *= 2;  in drm_mode_set_crtcinfo()
674 		p->crtc_vsync_start *= 2;  in drm_mode_set_crtcinfo()
675 		p->crtc_vsync_end *= 2;  in drm_mode_set_crtcinfo()
676 		p->crtc_vtotal *= 2;  in drm_mode_set_crtcinfo()
679 	if (p->vscan > 1) {  in drm_mode_set_crtcinfo()
680 		p->crtc_vdisplay *= p->vscan;  in drm_mode_set_crtcinfo()
681 		p->crtc_vsync_start *= p->vscan;  in drm_mode_set_crtcinfo()
682 		p->crtc_vsync_end *= p->vscan;  in drm_mode_set_crtcinfo()
683 		p->crtc_vtotal *= p->vscan;  in drm_mode_set_crtcinfo()
686 	p->crtc_vblank_start = min(p->crtc_vsync_start, p->crtc_vdisplay);  in drm_mode_set_crtcinfo()
687 	p->crtc_vblank_end = max(p->crtc_vsync_end, p->crtc_vtotal);  in drm_mode_set_crtcinfo()
688 	p->crtc_hblank_start = min(p->crtc_hsync_start, p->crtc_hdisplay);  in drm_mode_set_crtcinfo()
689 	p->crtc_hblank_end = max(p->crtc_hsync_end, p->crtc_htotal);  in drm_mode_set_crtcinfo()
695  * drm_mode_copy - copy the mode
707 	int id = dst->base.id;  in drm_mode_copy()
710 	dst->base.id = id;  in drm_mode_copy()
711 	INIT_LIST_HEAD(&dst->head);  in drm_mode_copy()
716  * drm_mode_duplicate - allocate and duplicate an existing mode
741  * drm_mode_equal - test modes for equality
757 	if (mode1->clock && mode2->clock) {  in drm_mode_equal()
758 		if (KHZ2PICOS(mode1->clock) != KHZ2PICOS(mode2->clock))  in drm_mode_equal()
760 	} else if (mode1->clock != mode2->clock)  in drm_mode_equal()
763 	if (mode1->hdisplay == mode2->hdisplay &&  in drm_mode_equal()
764 	    mode1->hsync_start == mode2->hsync_start &&  in drm_mode_equal()
765 	    mode1->hsync_end == mode2->hsync_end &&  in drm_mode_equal()
766 	    mode1->htotal == mode2->htotal &&  in drm_mode_equal()
767 	    mode1->hskew == mode2->hskew &&  in drm_mode_equal()
768 	    mode1->vdisplay == mode2->vdisplay &&  in drm_mode_equal()
769 	    mode1->vsync_start == mode2->vsync_start &&  in drm_mode_equal()
770 	    mode1->vsync_end == mode2->vsync_end &&  in drm_mode_equal()
771 	    mode1->vtotal == mode2->vtotal &&  in drm_mode_equal()
772 	    mode1->vscan == mode2->vscan &&  in drm_mode_equal()
773 	    mode1->flags == mode2->flags)  in drm_mode_equal()
781  * drm_mode_validate_size - make sure modes adhere to size constraints
802 		if (maxPitch > 0 && mode->hdisplay > maxPitch)  in drm_mode_validate_size()
803 			mode->status = MODE_BAD_WIDTH;  in drm_mode_validate_size()
805 		if (maxX > 0 && mode->hdisplay > maxX)  in drm_mode_validate_size()
806 			mode->status = MODE_VIRTUAL_X;  in drm_mode_validate_size()
808 		if (maxY > 0 && mode->vdisplay > maxY)  in drm_mode_validate_size()
809 			mode->status = MODE_VIRTUAL_Y;  in drm_mode_validate_size()
815  * drm_mode_validate_clocks - validate modes against clock limits
828  * arrays) and sets @mode->status as needed.
840 			if (mode->clock >= min[i] && mode->clock <= max[i]) {  in drm_mode_validate_clocks()
846 			mode->status = MODE_CLOCK_RANGE;  in drm_mode_validate_clocks()
852  * drm_mode_prune_invalid - remove invalid modes from mode list
870 		if (mode->status != MODE_OK) {  in drm_mode_prune_invalid()
871 			list_del(&mode->head);  in drm_mode_prune_invalid()
875 					mode->name, mode->status);  in drm_mode_prune_invalid()
884  * drm_mode_compare - compare modes for favorability
905 	diff = ((b->type & DRM_MODE_TYPE_PREFERRED) != 0) -  in drm_mode_compare()
906 		((a->type & DRM_MODE_TYPE_PREFERRED) != 0);  in drm_mode_compare()
909 	diff = b->hdisplay * b->vdisplay - a->hdisplay * a->vdisplay;  in drm_mode_compare()
913 	diff = b->vrefresh - a->vrefresh;  in drm_mode_compare()
917 	diff = b->clock - a->clock;  in drm_mode_compare()
922  * drm_mode_sort - sort mode list
937  * drm_mode_connector_list_update - update the mode list for the connector
954 	list_for_each_entry_safe(pmode, pt, &connector->probed_modes,  in drm_mode_connector_list_update()
958 		list_for_each_entry(mode, &connector->modes, head) {  in drm_mode_connector_list_update()
962 				mode->status = pmode->status;  in drm_mode_connector_list_update()
964 				mode->type |= pmode->type;  in drm_mode_connector_list_update()
965 				list_del(&pmode->head);  in drm_mode_connector_list_update()
966 				drm_mode_destroy(connector->dev, pmode);  in drm_mode_connector_list_update()
972 			list_move_tail(&pmode->head, &connector->modes);  in drm_mode_connector_list_update()
979  * drm_mode_parse_command_line_for_connector - parse command line for connector
980  * @mode_option - per connector mode option
981  * @connector - connector to parse line for
987  *	<xres>x<yres>[M][R][-<bpp>][@<refresh>][i][m][eDd]
1010 		mode->specified = false;  in drm_mode_parse_command_line_for_connector()
1016 	for (i = namelen-1; i >= 0; i--) {  in drm_mode_parse_command_line_for_connector()
1027 		case '-':  in drm_mode_parse_command_line_for_connector()
1078 			if ((connector->connector_type != DRM_MODE_CONNECTOR_DVII) &&  in drm_mode_parse_command_line_for_connector()
1079 			    (connector->connector_type != DRM_MODE_CONNECTOR_HDMIB))  in drm_mode_parse_command_line_for_connector()
1102 			i = ch - name;  in drm_mode_parse_command_line_for_connector()
1112 		mode->specified = false;  in drm_mode_parse_command_line_for_connector()
1117 		mode->specified = true;  in drm_mode_parse_command_line_for_connector()
1118 		mode->xres = xres;  in drm_mode_parse_command_line_for_connector()
1119 		mode->yres = yres;  in drm_mode_parse_command_line_for_connector()
1123 		mode->refresh_specified = true;  in drm_mode_parse_command_line_for_connector()
1124 		mode->refresh = refresh;  in drm_mode_parse_command_line_for_connector()
1128 		mode->bpp_specified = true;  in drm_mode_parse_command_line_for_connector()
1129 		mode->bpp = bpp;  in drm_mode_parse_command_line_for_connector()
1131 	mode->rb = rb;  in drm_mode_parse_command_line_for_connector()
1132 	mode->cvt = cvt;  in drm_mode_parse_command_line_for_connector()
1133 	mode->interlace = interlace;  in drm_mode_parse_command_line_for_connector()
1134 	mode->margins = margins;  in drm_mode_parse_command_line_for_connector()
1135 	mode->force = force;  in drm_mode_parse_command_line_for_connector()
1147 	if (cmd->cvt)  in drm_mode_create_from_cmdline_mode()
1149 				    cmd->xres, cmd->yres,  in drm_mode_create_from_cmdline_mode()
1150 				    cmd->refresh_specified ? cmd->refresh : 60,  in drm_mode_create_from_cmdline_mode()
1151 				    cmd->rb, cmd->interlace,  in drm_mode_create_from_cmdline_mode()
1152 				    cmd->margins);  in drm_mode_create_from_cmdline_mode()
1155 				    cmd->xres, cmd->yres,  in drm_mode_create_from_cmdline_mode()
1156 				    cmd->refresh_specified ? cmd->refresh : 60,  in drm_mode_create_from_cmdline_mode()
1157 				    cmd->interlace,  in drm_mode_create_from_cmdline_mode()
1158 				    cmd->margins);  in drm_mode_create_from_cmdline_mode()