Lines Matching +full:atomic +full:- +full:threshold +full:- +full:us
1 /*-
2 * SPDX-License-Identifier: BSD-2-Clause
4 * Copyright © 2021-2023 Dmitry Salychev
46 #define DPAA2_SWP_TIMEOUT 100000 /* in us */
74 /* Registers in the cache-inhibited area of the software portal. */
96 /* Registers in the cache-enabled area of the software portal. */
105 /* Registers in the cache-enabled area of the software portal (memory-backed). */
218 mtx_assert(&(__swp)->lock, MA_NOTOWNED); \
219 mtx_lock(&(__swp)->lock); \
220 *(__flags) = (__swp)->flags; \
221 (__swp)->flags |= DPAA2_SWP_LOCKED; \
225 mtx_assert(&(__swp)->lock, MA_OWNED); \
226 (__swp)->flags &= ~DPAA2_SWP_LOCKED; \
227 mtx_unlock(&(__swp)->lock); \
295 * offset_fmt_sl: Frame data offset, frame format and short-length fields.
297 * to communicate some out-of-band information to the
373 * cena_res: Unmapped cache-enabled part of the portal's I/O memory.
374 * cena_map: Mapped cache-enabled part of the portal's I/O memory.
375 * cinh_res: Unmapped cache-inhibited part of the portal's I/O memory.
376 * cinh_map: Mapped cache-inhibited part of the portal's I/O memory.
424 * res: Unmapped cache-enabled and cache-inhibited parts of the portal.
425 * map: Mapped cache-enabled and cache-inhibited parts of the portal.
458 bool atomic; member
513 int dpaa2_swp_set_irq_coalescing(struct dpaa2_swp *swp, uint32_t threshold,