Lines Matching +full:0 +full:x10
37 /* Page 0 */
39 #define DA9063_PAGE_CON 0x00
40 #define DA9063_PAGE_CON_REG_PAGE_SHIFT 0
41 #define DA9063_PAGE_CON_REG_PAGE_MASK 0x07
42 #define DA9063_PAGE_CON_WRITE_MODE 0x40
43 #define DA9063_PAGE_CON_REVERT 0x80
47 #define DA9063_STATUS_A 0x01
48 #define DA9063_STATUS_A_NONKEY 0x01
49 #define DA9063_STATUS_A_WAKE 0x02
50 #define DA9063_STATUS_A_DVC_BUSY 0x04
51 #define DA9063_STATUS_A_COMP1V2 0x08
52 #define DA9063_STATUS_B 0x02
53 #define DA9063_STATUS_B_GPI0 0x01
54 #define DA9063_STATUS_B_GPI1 0x02
55 #define DA9063_STATUS_B_GPI2 0x04
56 #define DA9063_STATUS_B_GPI3 0x08
57 #define DA9063_STATUS_B_GPI4 0x10
58 #define DA9063_STATUS_B_GPI5 0x20
59 #define DA9063_STATUS_B_GPI6 0x40
60 #define DA9063_STATUS_B_GPI7 0x80
61 #define DA9063_STATUS_C 0x03
62 #define DA9063_STATUS_C_GPI8 0x01
63 #define DA9063_STATUS_C_GPI9 0x02
64 #define DA9063_STATUS_C_GPI10 0x04
65 #define DA9063_STATUS_C_GPI11 0x08
66 #define DA9063_STATUS_C_GPI12 0x10
67 #define DA9063_STATUS_C_GPI13 0x20
68 #define DA9063_STATUS_C_GPI14 0x40
69 #define DA9063_STATUS_C_GPI15 0x80
70 #define DA9063_STATUS_D 0x04
71 #define DA9063_STATUS_D_LDO3_LIM 0x08
72 #define DA9063_STATUS_D_LDO4_LIM 0x10
73 #define DA9063_STATUS_D_LDO7_LIM 0x20
74 #define DA9063_STATUS_D_LDO8_LIM 0x40
75 #define DA9063_STATUS_D_LDO11_LIM 0x80
76 #define DA9063_FAULT_LOG 0x05
77 #define DA9063_FAULT_LOG_TWD_ERROR 0x01
78 #define DA9063_FAULT_LOG_POR 0x02
79 #define DA9063_FAULT_LOG_VDD_FAULT 0x04
80 #define DA9063_FAULT_LOG_VDD_START 0x08
81 #define DA9063_FAULT_LOG_TEMP_CRIT 0x10
82 #define DA9063_FAULT_LOG_KEY_RESET 0x20
83 #define DA9063_FAULT_LOG_NSHUTDOWN 0x40
84 #define DA9063_FAULT_LOG_WAIT_SHUT 0x80
85 #define DA9063_EVENT_A 0x06
86 #define DA9063_EVENT_A_E_NONKEY 0x01
87 #define DA9063_EVENT_A_E_ALARM 0x02
88 #define DA9063_EVENT_A_E_TICK 0x04
89 #define DA9063_EVENT_A_E_ADC_RDY 0x08
90 #define DA9063_EVENT_A_E_SEQ_RDY 0x10
91 #define DA9063_EVENT_A_EVENTS_B 0x20
92 #define DA9063_EVENT_A_EVENTS_C 0x40
93 #define DA9063_EVENT_A_EVENTS_D 0x80
94 #define DA9063_EVENT_B 0x07
95 #define DA9063_EVENT_B_E_WAKE 0x01
96 #define DA9063_EVENT_B_E_TEMP 0x02
97 #define DA9063_EVENT_B_E_COMP_1V2 0x04
98 #define DA9063_EVENT_B_E_LDO_LIM 0x08
99 #define DA9063_EVENT_B_E_REG_UVOV 0x10
100 #define DA9063_EVENT_B_E_DVC_RDY 0x20
101 #define DA9063_EVENT_B_E_VDD_MON 0x40
102 #define DA9063_EVENT_B_E_VDD_WARN 0x80
103 #define DA9063_EVENT_C 0x08
104 #define DA9063_EVENT_C_E_GPI0 0x01
105 #define DA9063_EVENT_C_E_GPI1 0x02
106 #define DA9063_EVENT_C_E_GPI2 0x04
107 #define DA9063_EVENT_C_E_GPI3 0x08
108 #define DA9063_EVENT_C_E_GPI4 0x10
109 #define DA9063_EVENT_C_E_GPI5 0x20
110 #define DA9063_EVENT_C_E_GPI6 0x40
111 #define DA9063_EVENT_C_E_GPI7 0x80
112 #define DA9063_EVENT_D 0x09
113 #define DA9063_EVENT_D_E_GPI8 0x01
114 #define DA9063_EVENT_D_E_GPI9 0x02
115 #define DA9063_EVENT_D_E_GPI10 0x04
116 #define DA9063_EVENT_D_E_GPI11 0x08
117 #define DA9063_EVENT_D_E_GPI12 0x10
118 #define DA9063_EVENT_D_E_GPI13 0x20
119 #define DA9063_EVENT_D_E_GPI14 0x40
120 #define DA9063_EVENT_D_E_GPI15 0x80
121 #define DA9063_IRQ_MASK_A 0x0a
122 #define DA9063_IRQ_MASK_A_M_NONKEY 0x01
123 #define DA9063_IRQ_MASK_A_M_ALARM 0x02
124 #define DA9063_IRQ_MASK_A_M_TICK 0x04
125 #define DA9063_IRQ_MASK_A_M_ADC_RDY 0x08
126 #define DA9063_IRQ_MASK_A_M_SEQ_RDY 0x10
127 #define DA9063_IRQ_MASK_B 0x0b
128 #define DA9063_IRQ_MASK_B_M_WAKE 0x01
129 #define DA9063_IRQ_MASK_B_M_TEMP 0x02
130 #define DA9063_IRQ_MASK_B_M_COMP_1V2 0x04
131 #define DA9063_IRQ_MASK_B_M_LDO_LIM 0x08
132 #define DA9063_IRQ_MASK_B_M_REG_UVOV 0x10
133 #define DA9063_IRQ_MASK_B_M_DVC_RDY 0x20
134 #define DA9063_IRQ_MASK_B_M_VDD_MON 0x40
135 #define DA9063_IRQ_MASK_B_M_VDD_WARN 0x80
136 #define DA9063_IRQ_MASK_C 0x0c
137 #define DA9063_IRQ_MASK_C_M_GPI0 0x01
138 #define DA9063_IRQ_MASK_C_M_GPI1 0x02
139 #define DA9063_IRQ_MASK_C_M_GPI2 0x04
140 #define DA9063_IRQ_MASK_C_M_GPI3 0x08
141 #define DA9063_IRQ_MASK_C_M_GPI4 0x10
142 #define DA9063_IRQ_MASK_C_M_GPI5 0x20
143 #define DA9063_IRQ_MASK_C_M_GPI6 0x40
144 #define DA9063_IRQ_MASK_C_M_GPI7 0x80
145 #define DA9063_IRQ_MASK_D 0x0d
146 #define DA9063_IRQ_MASK_D_M_GPI8 0x01
147 #define DA9063_IRQ_MASK_D_M_GPI9 0x02
148 #define DA9063_IRQ_MASK_D_M_GPI10 0x04
149 #define DA9063_IRQ_MASK_D_M_GPI11 0x08
150 #define DA9063_IRQ_MASK_D_M_GPI12 0x10
151 #define DA9063_IRQ_MASK_D_M_GPI13 0x20
152 #define DA9063_IRQ_MASK_D_M_GPI14 0x40
153 #define DA9063_IRQ_MASK_D_M_GPI15 0x80
154 #define DA9063_CONTROL_A 0x0e
155 #define DA9063_CONTROL_A_SYSTEM_EN 0x01
156 #define DA9063_CONTROL_A_POWER_EN 0x02
157 #define DA9063_CONTROL_A_POWER1_EN 0x04
158 #define DA9063_CONTROL_A_STANDBY 0x08
159 #define DA9063_CONTROL_A_M_SYSTEM_EN 0x10
160 #define DA9063_CONTROL_A_M_POWER_EN 0x20
161 #define DA9063_CONTROL_A_M_POWER1_EN 0x40
162 #define DA9063_CONTROL_A_CP_EN 0x80
163 #define DA9063_CONTROL_B 0x0f
164 #define DA9063_CONTROL_B_CHG_SEL 0x01
165 #define DA9063_CONTROL_B_WATCHDOG_DIS 0x02
166 #define DA9063_CONTROL_B_RESET_GLINKING 0x04
167 #define DA9063_CONTROL_B_NRES_MODE 0x08
168 #define DA9063_CONTROL_B_NONKEY_LOCK 0x10
169 #define DA9063_CONTROL_B_BUCK_SLOWSTART 0x80
170 #define DA9063_CONTROL_C 0x10
171 #define DA9063_CONTROL_C_DEBOUNCING_SHIFT 0
172 #define DA9063_CONTROL_C_DEBOUNCING_MASK 0x07
173 #define DA9063_CONTROL_C_AUTO_BOOT 0x08
174 #define DA9063_CONTROL_C_OTPREAD_EN 0x10
176 #define DA9063_CONTROL_C_SLEW_RATE_MASK 0x03
177 #define DA9063_CONTROL_C_DEF_SUPPLY 0x80
178 #define DA9063_CONTROL_D 0x11
179 #define DA9063_CONTROL_D_TWDSCALE_SHIFT 0
180 #define DA9063_CONTROL_D_TWDSCALE_MASK 0x07
182 #define DA9063_CONTROL_D_BLINK_FRQ_MASK 0x07
184 #define DA9063_CONTROL_D_BLINK_DUR_MASK 0x03
185 #define DA9063_CONTROL_E 0x12
186 #define DA9063_CONTROL_E_RTC_MODE_PD 0x01
187 #define DA9063_CONTROL_E_RTC_MODE_SD 0x02
188 #define DA9063_CONTROL_E_RTC_EN 0x04
189 #define DA9063_CONTROL_E_ECO_MODE 0x08
190 #define DA9063_CONTROL_E_PM_FB1_PIN 0x10
191 #define DA9063_CONTROL_E_PM_FB2_PIN 0x20
192 #define DA9063_CONTROL_E_PM_FB3_PIN 0x40
193 #define DA9063_CONTROL_E_V_LOCK 0x80
194 #define DA9063_CONTROL_F 0x13
195 #define DA9063_CONTROL_F_WATCHDOG 0x01
196 #define DA9063_CONTROL_F_SHUTDOWN 0x02
197 #define DA9063_CONTROL_F_WAKE_UP 0x04
198 #define DA9063_PD_DIS 0x14
199 #define DA9063_PD_DIS_GPI_DIS 0x01
200 #define DA9063_PD_DIS_GPADC_PAUSE 0x02
201 #define DA9063_PD_DIS_PMIF_DIS 0x04
202 #define DA9063_PD_DIS_HS2IF_DIS 0x08
203 #define DA9063_PD_DIS_BBAT_DIS 0x20
204 #define DA9063_PD_DIS_OUT32K_PAUSE 0x40
205 #define DA9063_PD_DIS_PMCONT_DIS 0x80
209 #define DA9063_GPIO0_1 0x15
210 #define DA9063_GPIO0_1_GPIO0_PIN_SHIFT 0
211 #define DA9063_GPIO0_1_GPIO0_PIN_MASK 0x03
212 #define DA9063_GPIO0_1_GPIO0_TYPE 0x04
213 #define DA9063_GPIO0_1_GPIO0_WEN 0x08
215 #define DA9063_GPIO0_1_GPIO1_PIN_MASK 0x03
216 #define DA9063_GPIO0_1_GPIO1_TYPE 0x40
217 #define DA9063_GPIO0_1_GPIO1_WEN 0x80
218 #define DA9063_GPIO2_3 0x16
219 #define DA9063_GPIO2_3_GPIO2_PIN_SHIFT 0
220 #define DA9063_GPIO2_3_GPIO2_PIN_MASK 0x03
221 #define DA9063_GPIO2_3_GPIO2_TYPE 0x04
222 #define DA9063_GPIO2_3_GPIO2_WEN 0x08
224 #define DA9063_GPIO2_3_GPIO3_PIN_MASK 0x03
225 #define DA9063_GPIO2_3_GPIO3_TYPE 0x40
226 #define DA9063_GPIO2_3_GPIO3_WEN 0x80
227 #define DA9063_GPIO4_5 0x17
228 #define DA9063_GPIO4_5_GPIO4_PIN_SHIFT 0
229 #define DA9063_GPIO4_5_GPIO4_PIN_MASK 0x03
230 #define DA9063_GPIO4_5_GPIO4_TYPE 0x04
231 #define DA9063_GPIO4_5_GPIO4_WEN 0x08
233 #define DA9063_GPIO4_5_GPIO5_PIN_MASK 0x03
234 #define DA9063_GPIO4_5_GPIO5_TYPE 0x04
235 #define DA9063_GPIO4_5_GPIO5_WEN 0x08
236 #define DA9063_GPIO6_7 0x18
237 #define DA9063_GPIO6_7_GPIO6_PIN_SHIFT 0
238 #define DA9063_GPIO6_7_GPIO6_PIN_MASK 0x03
239 #define DA9063_GPIO6_7_GPIO6_TYPE 0x04
240 #define DA9063_GPIO6_7_GPIO6_WEN 0x08
242 #define DA9063_GPIO6_7_GPIO7_PIN_MASK 0x03
243 #define DA9063_GPIO6_7_GPIO7_TYPE 0x04
244 #define DA9063_GPIO6_7_GPIO7_WEN 0x08
245 #define DA9063_GPIO8_9 0x19
246 #define DA9063_GPIO8_9_GPIO8_PIN_SHIFT 0
247 #define DA9063_GPIO8_9_GPIO8_PIN_MASK 0x03
248 #define DA9063_GPIO8_9_GPIO8_TYPE 0x04
249 #define DA9063_GPIO8_9_GPIO8_WEN 0x08
251 #define DA9063_GPIO8_9_GPIO9_PIN_MASK 0x03
252 #define DA9063_GPIO8_9_GPIO9_TYPE 0x04
253 #define DA9063_GPIO8_9_GPIO9_WEN 0x08
254 #define DA9063_GPIO10_11 0x1a
255 #define DA9063_GPIO10_11_GPIO10_PIN_SHIFT 0
256 #define DA9063_GPIO10_11_GPIO10_PIN_MASK 0x03
257 #define DA9063_GPIO10_11_GPIO10_TYPE 0x04
258 #define DA9063_GPIO10_11_GPIO10_WEN 0x08
260 #define DA9063_GPIO10_11_GPIO11_PIN_MASK 0x03
261 #define DA9063_GPIO10_11_GPIO11_TYPE 0x04
262 #define DA9063_GPIO10_11_GPIO11_WEN 0x08
263 #define DA9063_GPIO12_13 0x1b
264 #define DA9063_GPIO12_13_GPIO12_PIN_SHIFT 0
265 #define DA9063_GPIO12_13_GPIO12_PIN_MASK 0x03
266 #define DA9063_GPIO12_13_GPIO12_TYPE 0x04
267 #define DA9063_GPIO12_13_GPIO12_WEN 0x08
269 #define DA9063_GPIO12_13_GPIO13_PIN_MASK 0x03
270 #define DA9063_GPIO12_13_GPIO13_TYPE 0x04
271 #define DA9063_GPIO12_13_GPIO13_WEN 0x08
272 #define DA9063_GPIO14_15 0x1c
273 #define DA9063_GPIO14_15_GPIO14_PIN_SHIFT 0
274 #define DA9063_GPIO14_15_GPIO14_PIN_MASK 0x03
275 #define DA9063_GPIO14_15_GPIO14_TYPE 0x04
276 #define DA9063_GPIO14_15_GPIO14_WEN 0x08
278 #define DA9063_GPIO14_15_GPIO15_PIN_MASK 0x03
279 #define DA9063_GPIO14_15_GPIO15_TYPE 0x04
280 #define DA9063_GPIO14_15_GPIO15_WEN 0x08
281 #define DA9063_GPIO_MODE0_7 0x1d
282 #define DA9063_GPIO_MODE0_7_GPIO0_MASK 0x01
283 #define DA9063_GPIO_MODE0_7_GPIO1_MASK 0x02
284 #define DA9063_GPIO_MODE0_7_GPIO2_MASK 0x04
285 #define DA9063_GPIO_MODE0_7_GPIO3_MASK 0x08
286 #define DA9063_GPIO_MODE0_7_GPIO4_MASK 0x10
287 #define DA9063_GPIO_MODE0_7_GPIO5_MASK 0x20
288 #define DA9063_GPIO_MODE0_7_GPIO6_MASK 0x40
289 #define DA9063_GPIO_MODE0_7_GPIO7_MASK 0x80
290 #define DA9063_GPIO_MODE8_15 0x1e
291 #define DA9063_GPIO_MODE8_15_GPIO8_MASK 0x01
292 #define DA9063_GPIO_MODE8_15_GPIO9_MASK 0x02
293 #define DA9063_GPIO_MODE8_15_GPIO10_MASK 0x04
294 #define DA9063_GPIO_MODE8_15_GPIO11_MASK 0x08
295 #define DA9063_GPIO_MODE8_15_GPIO12_MASK 0x10
296 #define DA9063_GPIO_MODE8_15_GPIO13_MASK 0x20
297 #define DA9063_GPIO_MODE8_15_GPIO14_MASK 0x40
298 #define DA9063_GPIO_MODE8_15_GPIO15_MASK 0x80
299 #define DA9063_SWITCH_CONT 0x1f
300 #define DA9063_SWITCH_CONT_CORE_SW_GPI_SHIFT 0
301 #define DA9063_SWITCH_CONT_CORE_SW_GPI_MASK 0x03
303 #define DA9063_SWITCH_CONT_PERI_SW_GPI_MASK 0x03
305 #define DA9063_SWITCH_CONT_SWITCH_SR_MASK 0x03
306 #define DA9063_SWITCH_CONT_CORE_SW_INT 0x40
307 #define DA9063_SWITCH_CONT_CP_EN_MODE 0x80
311 #define DA9063_BCORE2_CONT 0x20
312 #define DA9063_BCORE2_CONT_BCORE2_EN 0x01
314 #define DA9063_BCORE2_CONT_BCORE2_GPI_MASK 0x03
315 #define DA9063_BCORE2_CONT_BCORE2_CONF 0x08
317 #define DA9063_BCORE2_CONT_VBCORE2_GPI_MASK 0x03
318 #define DA9063_BCORE1_CONT 0x21
319 #define DA9063_BCORE1_CONT_BCORE1_EN 0x01
321 #define DA9063_BCORE1_CONT_BCORE1_GPI_MASK 0x03
322 #define DA9063_BCORE1_CONT_BCORE1_CONF 0x08
323 #define DA9063_BCORE1_CONT_CORE_SW_EN 0x10
325 #define DA9063_BCORE1_CONT_VBCORE1_GPI_MASK 0x03
326 #define DA9063_BCORE1_CONT_CORE_SW_CONF 0x80
327 #define DA9063_BPRO_CONT 0x22
328 #define DA9063_BPRO_CONT_BPRO_EN 0x01
330 #define DA9063_BPRO_CONT_BPRO_GPI_MASK 0x03
331 #define DA9063_BPRO_CONT_BPRO_CONF 0x08
333 #define DA9063_BPRO_CONT_VBPRO_GPI_MASK 0x03
334 #define DA9063_BMEM_CONT 0x23
335 #define DA9063_BMEM_CONT_BMEM_EN 0x01
337 #define DA9063_BMEM_CONT_BMEM_GPI_MASK 0x03
338 #define DA9063_BMEM_CONT_BMEM_CONF 0x08
340 #define DA9063_BMEM_CONT_VBMEM_GPI_MASK 0x03
341 #define DA9063_BIO_CONT 0x24
342 #define DA9063_BIO_CONT_BIO_EN 0x01
344 #define DA9063_BIO_CONT_BIO_GPI_MASK 0x03
345 #define DA9063_BIO_CONT_BIO_CONF 0x08
347 #define DA9063_BIO_CONT_VBIO_GPI_MASK 0x03
348 #define DA9063_BPERI_CONT 0x25
349 #define DA9063_BPERI_CONT_BPERI_EN 0x01
351 #define DA9063_BPERI_CONT_BPERI_GPI_MASK 0x03
352 #define DA9063_BPERI_CONT_BPERI_CONF 0x08
353 #define DA9063_BPERI_CONT_PERI_SW_EN 0x10
355 #define DA9063_BPERI_CONT_VBPERI_GPI_MASK 0x03
356 #define DA9063_BPERI_CONT_PERI_SW_CONF 0x80
357 #define DA9063_LDO1_CONT 0x26
358 #define DA9063_LDO1_CONT_LDO1_EN 0x01
360 #define DA9063_LDO1_CONT_LDO1_GPI_MASK 0x03
361 #define DA9063_LDO1_CONT_LDO1_PD_DIS 0x08
363 #define DA9063_LDO1_CONT_VLDO1_GPI_MASK 0x03
364 #define DA9063_LDO1_CONT_VLDO1_CONF 0x80
365 #define DA9063_LDO2_CONT 0x27
366 #define DA9063_LDO2_CONT_LDO2_EN 0x01
368 #define DA9063_LDO2_CONT_LDO2_GPI_MASK 0x03
369 #define DA9063_LDO2_CONT_LDO2_PD_DIS 0x08
371 #define DA9063_LDO2_CONT_VLDO2_GPI_MASK 0x03
372 #define DA9063_LDO2_CONT_VLDO2_CONF 0x80
373 #define DA9063_LDO3_CONT 0x28
374 #define DA9063_LDO3_CONT_LDO3_EN 0x01
376 #define DA9063_LDO3_CONT_LDO3_GPI_MASK 0x03
377 #define DA9063_LDO3_CONT_LDO3_PD_DIS 0x08
379 #define DA9063_LDO3_CONT_VLDO3_GPI_MASK 0x03
380 #define DA9063_LDO3_CONT_VLDO3_CONF 0x80
381 #define DA9063_LDO4_CONT 0x29
382 #define DA9063_LDO4_CONT_LDO4_EN 0x01
384 #define DA9063_LDO4_CONT_LDO4_GPI_MASK 0x03
385 #define DA9063_LDO4_CONT_LDO4_PD_DIS 0x08
386 #define DA9063_LDO4_CONT_VLDO4_SEL 0x10
388 #define DA9063_LDO4_CONT_VLDO4_GPI_MASK 0x03
389 #define DA9063_LDO4_CONT_VLDO4_CONF 0x80
390 #define DA9063_LDO5_CONT 0x2a
391 #define DA9063_LDO5_CONT_LDO5_EN 0x01
393 #define DA9063_LDO5_CONT_LDO5_GPI_MASK 0x03
394 #define DA9063_LDO5_CONT_LDO5_PD_DIS 0x08
395 #define DA9063_LDO5_CONT_VLDO5_SEL 0x10
397 #define DA9063_LDO5_CONT_VLDO5_GPI_MASK 0x03
398 #define DA9063_LDO5_CONT_VLDO5_CONF 0x80
399 #define DA9063_LDO6_CONT 0x2b
400 #define DA9063_LDO6_CONT_LDO6_EN 0x01
402 #define DA9063_LDO6_CONT_LDO6_GPI_MASK 0x03
403 #define DA9063_LDO6_CONT_LDO6_PD_DIS 0x08
404 #define DA9063_LDO6_CONT_VLDO6_SEL 0x10
406 #define DA9063_LDO6_CONT_VLDO6_GPI_MASK 0x03
407 #define DA9063_LDO6_CONT_VLDO6_CONF 0x80
408 #define DA9063_LDO7_CONT 0x2c
409 #define DA9063_LDO7_CONT_LDO7_EN 0x01
411 #define DA9063_LDO7_CONT_LDO7_GPI_MASK 0x03
412 #define DA9063_LDO7_CONT_LDO7_PD_DIS 0x08
413 #define DA9063_LDO7_CONT_VLDO7_SEL 0x10
415 #define DA9063_LDO7_CONT_VLDO7_GPI_MASK 0x03
416 #define DA9063_LDO7_CONT_VLDO7_CONF 0x80
417 #define DA9063_LDO8_CONT 0x2d
418 #define DA9063_LDO8_CONT_LDO8_EN 0x01
420 #define DA9063_LDO8_CONT_LDO8_GPI_MASK 0x03
421 #define DA9063_LDO8_CONT_LDO8_PD_DIS 0x08
422 #define DA9063_LDO8_CONT_VLDO8_SEL 0x10
424 #define DA9063_LDO8_CONT_VLDO8_GPI_MASK 0x03
425 #define DA9063_LDO8_CONT_VLDO8_CONF 0x80
426 #define DA9063_LDO9_CONT 0x2e
427 #define DA9063_LDO9_CONT_LDO9_EN 0x01
429 #define DA9063_LDO9_CONT_LDO9_GPI_MASK 0x03
430 #define DA9063_LDO9_CONT_LDO9_PD_DIS 0x08
431 #define DA9063_LDO9_CONT_VLDO9_SEL 0x10
433 #define DA9063_LDO9_CONT_VLDO9_GPI_MASK 0x03
434 #define DA9063_LDO9_CONT_VLDO9_CONF 0x80
435 #define DA9063_LDO10_CONT 0x2f
436 #define DA9063_LDO10_CONT_LDO10_EN 0x01
438 #define DA9063_LDO10_CONT_LDO10_GPI_MASK 0x03
439 #define DA9063_LDO10_CONT_LDO10_PD_DIS 0x08
440 #define DA9063_LDO10_CONT_VLDO10_SEL 0x10
442 #define DA9063_LDO10_CONT_VLDO10_GPI_MASK 0x03
443 #define DA9063_LDO10_CONT_VLDO10_CONF 0x80
444 #define DA9063_LDO11_CONT 0x30
445 #define DA9063_LDO11_CONT_LDO11_EN 0x01
447 #define DA9063_LDO11_CONT_LDO11_GPI_MASK 0x03
448 #define DA9063_LDO11_CONT_LDO11_PD_DIS 0x08
449 #define DA9063_LDO11_CONT_VLDO11_SEL 0x10
451 #define DA9063_LDO11_CONT_VLDO11_GPI_MASK 0x03
452 #define DA9063_LDO11_CONT_VLDO11_CONF 0x80
453 #define DA9063_VIB 0x31
454 #define DA9063_VIB_VIB_SET_SHIFT 0
455 #define DA9063_VIB_VIB_SET_MASK 0x3f
456 #define DA9063_DVC_1 0x32
457 #define DA9063_DVC_1_VBCORE1_SEL 0x01
458 #define DA9063_DVC_1_VBCORE2_SEL 0x02
459 #define DA9063_DVC_1_VBPRO_SEL 0x04
460 #define DA9063_DVC_1_VBMEM_SEL 0x08
461 #define DA9063_DVC_1_VBPERI_SEL 0x10
462 #define DA9063_DVC_1_VLDO1_SEL 0x20
463 #define DA9063_DVC_1_VLDO2_SEL 0x40
464 #define DA9063_DVC_1_VLDO3_SEL 0x80
465 #define DA9063_DVC_2 0x33
466 #define DA9063_DVC_2_VBIO_SEL 0x01
467 #define DA9063_DVC_2_VLDO4_SEL 0x80
471 #define DA9063_ADC_MAN 0x34
472 #define DA9063_ADC_MAN_ADC_MUX_SHIFT 0
473 #define DA9063_ADC_MAN_ADC_MUX_MASK 0x0f
474 #define DA9063_ADC_MAN_ADC_MAN 0x10
475 #define DA9063_ADC_MAN_ADC_MODE 0x20
476 #define DA9063_ADC_CONT 0x35
477 #define DA9063_ADC_CONT_AUTO_VSYS_EN 0x01
478 #define DA9063_ADC_CONT_AUTO_AD1_EN 0x02
479 #define DA9063_ADC_CONT_AUTO_AD2_EN 0x04
480 #define DA9063_ADC_CONT_AUTO_AD3_EN 0x08
481 #define DA9063_ADC_CONT_AD1_ISRC_EN 0x10
482 #define DA9063_ADC_CONT_AD2_ISRC_EN 0x20
483 #define DA9063_ADC_CONT_AD3_ISRC_EN 0x40
484 #define DA9063_ADC_CONT_COMP1V2_EN 0x80
485 #define DA9063_VSYS_MON 0x36
486 #define DA9063_VSYS_MON_VSYS_MON_SHIFT 0
487 #define DA9063_VSYS_MON_VSYS_MON_MASK 0xff
488 #define DA9063_ADC_RES_L 0x37
490 #define DA9063_ADC_RES_L_ACD_RES_LSB_MASK 0x03
491 #define DA9063_ADC_RES_H 0x38
492 #define DA9063_ADC_RES_H_ADC_RES_H_SHIFT 0
493 #define DA9063_ADC_RES_H_ADC_RES_H_MASK 0xff
494 #define DA9063_VSYS_RES 0x39
495 #define DA9063_VSYS_RES_VSYS_RES_SHIFT 0
496 #define DA9063_VSYS_RES_VSYS_RES_MASK 0xff
497 #define DA9063_ADCIN1_RES 0x3a
498 #define DA9063_ADCIN1_RES_ADCIN1_RES_SHIFT 0
499 #define DA9063_ADCIN1_RES_ADCIN1_RES_MASK 0xff
500 #define DA9063_ADCIN2_RES 0x3b
501 #define DA9063_ADCIN2_RES_ADCIN2_RES_SHIFT 0
502 #define DA9063_ADCIN2_RES_ADCIN2_RES_MASK 0xff
503 #define DA9063_ADCIN3_RES 0x3c
504 #define DA9063_ADCIN3_RES_ADCIN3_RES_SHIFT 0
505 #define DA9063_ADCIN3_RES_ADCIN3_RES_MASK 0xff
506 #define DA9063_MON_A8_RES 0x3d
507 #define DA9063_MON_A8_RES_MON_A8_RES_SHIFT 0
508 #define DA9063_MON_A8_RES_MON_A8_RES_MASK 0xff
509 #define DA9063_MON_A9_RES 0x3e
510 #define DA9063_MON_A9_RES_MON_A9_RES_SHIFT 0
511 #define DA9063_MON_A9_RES_MON_A9_RES_MASK 0xff
512 #define DA9063_MON_A10_RES 0x3f
513 #define DA9063_MON_A10_RES_MON_A10_RES_SHIFT 0
514 #define DA9063_MON_A10_RES_MON_A10_RES_MASK 0xff
518 #define DA9063_COUNT_S 0x40
519 #define DA9063_COUNT_S_COUNT_SEC_SHIFT 0
520 #define DA9063_COUNT_S_COUNT_SEC_MASK 0x3f
521 #define DA9063_COUNT_S_RTC_READ 0x80
522 #define DA9063_COUNT_MI 0x41
523 #define DA9063_COUNT_MI_COUNT_MIN_SHIFT 0
524 #define DA9063_COUNT_MI_COUNT_MIN_MASK 0x3f
525 #define DA9063_COUNT_H 0x42
526 #define DA9063_COUNT_H_COUNT_HOUR_SHIFT 0
527 #define DA9063_COUNT_H_COUNT_HOUR_MASK 0x1f
528 #define DA9063_COUNT_D 0x43
529 #define DA9063_COUNT_D_COUNT_DAY_SHIFT 0
530 #define DA9063_COUNT_D_COUNT_DAY_MASK 0x1f
531 #define DA9063_COUNT_MO 0x44
532 #define DA9063_COUNT_MO_COUNT_MONTH_SHIFT 0
533 #define DA9063_COUNT_MO_COUNT_MONTH_MASK 0x0f
534 #define DA9063_COUNT_Y 0x45
535 #define DA9063_COUNT_Y_COUNT_YEAR_SHIFT 0
536 #define DA9063_COUNT_Y_COUNT_YEAR_MASK 0x3f
537 #define DA9063_COUNT_Y_MONITOR 0x40
538 #define DA9063_ALARM_S 0x46
539 #define DA9063_ALARM_S_ALARM_SEC_SHIFT 0
540 #define DA9063_ALARM_S_ALARM_SEC_MASK 0x3f
542 #define DA9063_ALARM_S_ALARM_TYPE_MASK 0x03
543 #define DA9063_ALARM_MI 0x47
544 #define DA9063_ALARM_MI_ALARM_MIN_SHIFT 0
545 #define DA9063_ALARM_MI_ALARM_MIN_MASK 0x3f
546 #define DA9063_ALARM_H 0x48
547 #define DA9063_ALARM_H_ALARM_HOUR_SHIFT 0
548 #define DA9063_ALARM_H_ALARM_HOUR_MASK 0x1f
549 #define DA9063_ALARM_D 0x49
550 #define DA9063_ALARM_D_ALARM_DAY_SHIFT 0
551 #define DA9063_ALARM_D_ALARM_DAY_MASK 0x1f
552 #define DA9063_ALARM_MO 0x4a
553 #define DA9063_ALARM_MO_ALARM_MONTH_SHIFT 0
554 #define DA9063_ALARM_MO_ALARM_MONTH_MASK 0x0f
555 #define DA9063_ALARM_MO_TICK_TYPE 0x10
556 #define DA9063_ALARM_MO_TICK_WAKE 0x20
557 #define DA9063_ALARM_Y 0x4b
558 #define DA9063_ALARM_Y_ALARM_YEAR_SHIFT 0
559 #define DA9063_ALARM_Y_ALARM_YEAR_MASK 0x3f
560 #define DA9063_ALARM_Y_ALARM_ON 0x40
561 #define DA9063_ALARM_Y_TICK_ON 0x80
565 #define DA9063_SECOND_A 0x4c
566 #define DA9063_SECOND_A_SECONDS_A_SHIFT 0
567 #define DA9063_SECOND_A_SECONDS_A_MASK 0xff
568 #define DA9063_SECOND_B 0x4d
569 #define DA9063_SECOND_B_SECONDS_B_SHIFT 0
570 #define DA9063_SECOND_B_SECONDS_B_MASK 0xff
571 #define DA9063_SECOND_C 0x4e
572 #define DA9063_SECOND_C_SECONDS_C_SHIFT 0
573 #define DA9063_SECOND_C_SECONDS_C_MASK 0xff
574 #define DA9063_SECOND_D 0x4f
575 #define DA9063_SECOND_D_SECONDS_D_SHIFT 0
576 #define DA9063_SECOND_D_SECONDS_D_MASK 0xff
580 /* 0x80 is PAGE_CON */
584 #define DA9063_SEQ 0x81
585 #define DA9063_SEQ_SEQ_POINTER_SHIFT 0
586 #define DA9063_SEQ_SEQ_POINTER_MASK 0x0f
588 #define DA9063_SEQ_NXT_SEQ_START_MASK 0x0f
589 #define DA9063_SEQ_TIMER 0x82
590 #define DA9063_SEQ_TIMER_SEQ_TIME_SHIFT 0
591 #define DA9063_SEQ_TIMER_SEQ_TIME_MASK 0x0f
593 #define DA9063_SEQ_TIMER_SEQ_DUMM_MASK 0x0f
594 #define DA9063_ID_2_1 0x83
595 #define DA9063_ID_2_1_LDO1_STEP_SHIFT 0
596 #define DA9063_ID_2_1_LDO1_STEP_MASK 0x0f
598 #define DA9063_ID_2_1_LDO2_STEP_MASK 0x0f
599 #define DA9063_ID_4_3 0x84
600 #define DA9063_ID_4_3_LDO3_STEP_SHIFT 0
601 #define DA9063_ID_4_3_LDO3_STEP_MASK 0x0f
603 #define DA9063_ID_4_3_LDO4_STEP_MASK 0x0f
604 #define DA9063_ID_6_5 0x85
605 #define DA9063_ID_6_5_LDO5_STEP_SHIFT 0
606 #define DA9063_ID_6_5_LDO5_STEP_MASK 0x0f
608 #define DA9063_ID_6_5_LDO6_STEP_MASK 0x0f
609 #define DA9063_ID_8_7 0x86
610 #define DA9063_ID_8_7_LDO7_STEP_SHIFT 0
611 #define DA9063_ID_8_7_LDO7_STEP_MASK 0x0f
613 #define DA9063_ID_8_7_LDO8_STEP_MASK 0x0f
614 #define DA9063_ID_10_9 0x87
615 #define DA9063_ID_10_9_LDO9_STEP_SHIFT 0
616 #define DA9063_ID_10_9_LDO9_STEP_MASK 0x0f
618 #define DA9063_ID_10_9_LDO10_STEP_MASK 0x0f
619 #define DA9063_ID_12_11 0x88
620 #define DA9063_ID_12_11_LDO11_STEP_SHIFT 0
621 #define DA9063_ID_12_11_LDO11_STEP_MASK 0x0f
623 #define DA9063_ID_12_11_PD_DIS_STEP_MASK 0x0f
624 #define DA9063_ID_14_13 0x89
625 #define DA9063_ID_14_13_BUCKCORE1_STEP_SHIFT 0
626 #define DA9063_ID_14_13_BUCKCORE1_STEP_MASK 0x0f
628 #define DA9063_ID_14_13_BUCKCORE2_STEP_MASK 0x0f
629 #define DA9063_ID_16_15 0x8a
630 #define DA9063_ID_16_15_BUCKPRO_STEP_SHIFT 0
631 #define DA9063_ID_16_15_BUCKPRO_STEP_MASK 0x0f
633 #define DA9063_ID_16_15_BUCKIO_STEP_MASK 0x0f
634 #define DA9063_ID_18_17 0x8b
635 #define DA9063_ID_18_17_BUCKMEM_STEP_SHIFT 0
636 #define DA9063_ID_18_17_BUCKMEM_STEP_MASK 0x0f
638 #define DA9063_ID_18_17_BUCKPERI_STEP_MASK 0x0f
639 #define DA9063_ID_20_19 0x8c
640 #define DA9063_ID_20_19_CORE_SW_STEP_SHIFT 0
641 #define DA9063_ID_20_19_CORE_SW_STEP_MASK 0x0f
643 #define DA9063_ID_20_19_PERI_SW_STEP_MASK 0x0f
644 #define DA9063_ID_22_21 0x8d
645 #define DA9063_ID_22_21_GP_RISE1_STEP_SHIFT 0
646 #define DA9063_ID_22_21_GP_RISE1_STEP_MASK 0x0f
648 #define DA9063_ID_22_21_GP_FALL1_STEP_MASK 0x0f
649 #define DA9063_ID_24_23 0x8e
650 #define DA9063_ID_24_23_GP_RISE2_STEP_SHIFT 0
651 #define DA9063_ID_24_23_GP_RISE2_STEP_MASK 0x0f
653 #define DA9063_ID_24_23_GP_FALL2_STEP_MASK 0x0f
654 #define DA9063_ID_26_25 0x8f
655 #define DA9063_ID_26_25_GP_RISE3_STEP_SHIFT 0
656 #define DA9063_ID_26_25_GP_RISE3_STEP_MASK 0x0f
658 #define DA9063_ID_26_25_GP_FALL3_STEP_MASK 0x0f
659 #define DA9063_ID_28_27 0x90
660 #define DA9063_ID_28_27_GP_RISE4_STEP_SHIFT 0
661 #define DA9063_ID_28_27_GP_RISE4_STEP_MASK 0x0f
663 #define DA9063_ID_28_27_GP_FALL4_STEP_MASK 0x0f
664 #define DA9063_ID_30_29 0x91
665 #define DA9063_ID_30_29_GP_RISE5_STEP_SHIFT 0
666 #define DA9063_ID_30_29_GP_RISE5_STEP_MASK 0x0f
668 #define DA9063_ID_30_29_GP_FALL5_STEP_MASK 0x0f
669 #define DA9063_ID_32_31 0x92
670 #define DA9063_ID_32_31_WAIT_STEP_SHIFT 0
671 #define DA9063_ID_32_31_WAIT_STEP_MASK 0x0f
673 #define DA9063_ID_32_31_EN32K_STEP_MASK 0x0f
674 /* 0x93 - 0x94 reserved */
675 #define DA9063_SEQ_A 0x95
676 #define DA9063_SEQ_A_SYSTEM_END_SHIFT 0
677 #define DA9063_SEQ_A_SYSTEM_END_MASK 0x0f
679 #define DA9063_SEQ_A_POWER_END_MASK 0x0f
680 #define DA9063_SEQ_B 0x96
681 #define DA9063_SEQ_B_MAX_COUNT_SHIFT 0
682 #define DA9063_SEQ_B_MAX_COUNT_MASK 0x0f
684 #define DA9063_SEQ_B_PART_DOWN_MASK 0x0f
685 #define DA9063_WAIT 0x97
686 #define DA9063_WAIT_WAIT_TIME_SHIFT 0
687 #define DA9063_WAIT_WAIT_TIME_MASK 0x0f
688 #define DA9063_WAIT_WAIT_MODE 0x10
689 #define DA9063_WAIT_TIME_OUT 0x20
691 #define DA9063_WAIT_WAIT_DIR_MASK 0x03
692 #define DA9063_EN_32K 0x98
693 #define DA9063_EN_32K_STABILIZATION_TIME_SHIFT 0
694 #define DA9063_EN_32K_STABILIZATION_TIME_MASK 0x07
695 #define DA9063_EN_32K_CRYSTAL 0x04
696 #define DA9063_EN_32K_DELAY_MODE 0x10
697 #define DA9063_EN_32K_OUT_CLOCK 0x20
698 #define DA9063_EN_32K_RTC_CLOCK 0x40
699 #define DA9063_EN_32K_OUT_32K_EN 0x80
700 #define DA9063_RESET 0x99
701 #define DA9063_RESET_RESET_TIMER_SHIFT 0
702 #define DA9063_RESET_RESET_TIMER_MASK 0x3f
704 #define DA9063_RESET_RESET_EVENT_MASK 0x03
708 #define DA9063_BUCK_ILIM_A 0x9a
709 #define DA9063_BUCK_ILIM_A_BIO_ILIM_SHIFT 0
710 #define DA9063_BUCK_ILIM_A_BIO_ILIM_MASK 0x0f
712 #define DA9063_BUCK_ILIM_A_BMEM_ILIM_MASK 0x0f
713 #define DA9063_BUCK_ILIM_B 0x9b
714 #define DA9063_BUCK_ILIM_B_BPRO_ILIM_SHIFT 0
715 #define DA9063_BUCK_ILIM_B_BPRO_ILIM_MASK 0x0f
717 #define DA9063_BUCK_ILIM_B_BPERI_ILIM_MASK 0x0f
718 #define DA9063_BUCK_ILIM_C 0x9c
719 #define DA9063_BUCK_ILIM_C_BCORE1_ILIM_SHIFT 0
720 #define DA9063_BUCK_ILIM_C_BCORE1_ILIM_MASK 0x0f
722 #define DA9063_BUCK_ILIM_C_BCORE2_ILIM_MASK 0x0f
723 #define DA9063_BCORE2_CONF 0x9d
724 #define DA9063_BCORE2_CONF_BCORE2_FB_SHIFT 0
725 #define DA9063_BCORE2_CONF_BCORE2_FB_MASK 0x07
726 #define DA9063_BCORE2_CONF_BCORE2_PD_DIS 0x20
728 #define DA9063_BCORE2_CONF_BCORE2_MODE_MASK 0x03
729 #define DA9063_BCORE1_CONF 0x9e
730 #define DA9063_BCORE1_CONF_BCORE1_FB_SHIFT 0
731 #define DA9063_BCORE1_CONF_BCORE1_FB_MASK 0x07
732 #define DA9063_BCORE1_CONF_BCORE1_PD_DIS 0x20
734 #define DA9063_BCORE1_CONF_BCORE1_MODE_MASK 0x03
735 #define DA9063_BPRO_CONF 0x9f
736 #define DA9063_BPRO_CONF_BPRO_FB_SHIFT 0
737 #define DA9063_BPRO_CONF_BPRO_FB_MASK 0x07
738 #define DA9063_BPRO_CONF_BPRO_PD_DIS 0x20
740 #define DA9063_BPRO_CONF_BPRO_MODE_MASK 0x03
741 #define DA9063_BIO_CONF 0xa0
742 #define DA9063_BIO_CONF_BIO_FB_SHIFT 0
743 #define DA9063_BIO_CONF_BIO_FB_MASK 0x07
744 #define DA9063_BIO_CONF_BPRO_VTTR_EN 0x08
745 #define DA9063_BIO_CONF_BPRO_VTT_EN 0x10
746 #define DA9063_BIO_CONF_BIO_PD_DIS 0x20
748 #define DA9063_BIO_CONF_BIO_MODE_MASK 0x03
749 #define DA9063_BMEM_CONF 0xa1
750 #define DA9063_BMEM_CONF_BMEM_FB_SHIFT 0
751 #define DA9063_BMEM_CONF_BMEM_FB_MASK 0x07
752 #define DA9063_BMEM_CONF_BMEM_PD_DIS 0x20
754 #define DA9063_BMEM_CONF_BMEM_MODE_MASK 0x03
755 #define DA9063_BPERI_CONF 0xa2
756 #define DA9063_BPERI_CONF_BPERI_FB_SHIFT 0
757 #define DA9063_BPERI_CONF_BPERI_FB_MASK 0x07
758 #define DA9063_BPERI_CONF_BPERI_PD_DIS 0x20
760 #define DA9063_BPERI_CONF_BPERI_MODE_MASK 0x03
761 #define DA9063_VBCORE2_A 0xa3
762 #define DA9063_VBCORE2_A_VBCORE2_A_SHIFT 0
763 #define DA9063_VBCORE2_A_VBCORE2_A_MASK 0x7f
764 #define DA9063_VBCORE2_A_BCORE2_SL_A 0x80
765 #define DA9063_VBCORE1_A 0xa4
766 #define DA9063_VBCORE1_A_VBCORE1_A_SHIFT 0
767 #define DA9063_VBCORE1_A_VBCORE1_A_MASK 0x7f
768 #define DA9063_VBCORE1_A_BCORE1_SL_A 0x80
769 #define DA9063_VBPRO_A 0xa5
770 #define DA9063_VBPRO_A_VBPRO_A_SHIFT 0
771 #define DA9063_VBPRO_A_VBPRO_A_MASK 0x7f
772 #define DA9063_VBPRO_A_BPRO_SL_A 0x80
773 #define DA9063_VBMEM_A 0xa6
774 #define DA9063_VBMEM_A_VBMEM_A_SHIFT 0
775 #define DA9063_VBMEM_A_VBMEM_A_MASK 0x7f
776 #define DA9063_VBMEM_A_BMEM_SL_A 0x80
777 #define DA9063_VBIO_A 0xa7
778 #define DA9063_VBIO_A_VBIO_A_SHIFT 0
779 #define DA9063_VBIO_A_VBIO_A_MASK 0x7f
780 #define DA9063_VBIO_A_BIO_SL_A 0x80
781 #define DA9063_VBPERI_A 0xa8
782 #define DA9063_VBPERI_A_VBPERI_A_SHIFT 0
783 #define DA9063_VBPERI_A_VBPERI_A_MASK 0x7f
784 #define DA9063_VBPERI_A_BPERI_SL_A 0x80
785 #define DA9063_VLDO1_A 0xa9
786 #define DA9063_VLDO1_A_VLDO1_A_SHIFT 0
787 #define DA9063_VLDO1_A_VLDO1_A_MASK 0x3f
788 #define DA9063_VLDO1_A_LDO1_SL_A 0x80
789 #define DA9063_VLDO2_A 0xaa
790 #define DA9063_VLDO2_A_VLDO2_A_SHIFT 0
791 #define DA9063_VLDO2_A_VLDO2_A_MASK 0x3f
792 #define DA9063_VLDO2_A_LDO2_SL_A 0x80
793 #define DA9063_VLDO3_A 0xab
794 #define DA9063_VLDO3_A_VLDO3_A_SHIFT 0
795 #define DA9063_VLDO3_A_VLDO3_A_MASK 0x7f
796 #define DA9063_VLDO3_A_LDO3_SL_A 0x80
797 #define DA9063_VLDO4_A 0xac
798 #define DA9063_VLDO4_A_VLDO4_A_SHIFT 0
799 #define DA9063_VLDO4_A_VLDO4_A_MASK 0x7f
800 #define DA9063_VLDO4_A_LDO4_SL_A 0x80
801 #define DA9063_VLDO5_A 0xad
802 #define DA9063_VLDO5_A_VLDO5_A_SHIFT 0
803 #define DA9063_VLDO5_A_VLDO5_A_MASK 0x3f
804 #define DA9063_VLDO5_A_LDO5_SL_A 0x80
805 #define DA9063_VLDO6_A 0xae
806 #define DA9063_VLDO6_A_VLDO6_A_SHIFT 0
807 #define DA9063_VLDO6_A_VLDO6_A_MASK 0x3f
808 #define DA9063_VLDO6_A_LDO6_SL_A 0x80
809 #define DA9063_VLDO7_A 0xaf
810 #define DA9063_VLDO7_A_VLDO7_A_SHIFT 0
811 #define DA9063_VLDO7_A_VLDO7_A_MASK 0x3f
812 #define DA9063_VLDO7_A_LDO7_SL_A 0x80
813 #define DA9063_VLDO8_A 0xb0
814 #define DA9063_VLDO8_A_VLDO8_A_SHIFT 0
815 #define DA9063_VLDO8_A_VLDO8_A_MASK 0x3f
816 #define DA9063_VLDO8_A_LDO8_SL_A 0x80
817 #define DA9063_VLDO9_A 0xb1
818 #define DA9063_VLDO9_A_VLDO9_A_SHIFT 0
819 #define DA9063_VLDO9_A_VLDO9_A_MASK 0x3f
820 #define DA9063_VLDO9_A_LDO9_SL_A 0x80
821 #define DA9063_VLDO10_A 0xb2
822 #define DA9063_VLDO10_A_VLDO10_A_SHIFT 0
823 #define DA9063_VLDO10_A_VLDO10_A_MASK 0x3f
824 #define DA9063_VLDO10_A_LDO10_SL_A 0x80
825 #define DA9063_VLDO11_A 0xb3
826 #define DA9063_VLDO11_A_VLDO11_A_SHIFT 0
827 #define DA9063_VLDO11_A_VLDO11_A_MASK 0x3f
828 #define DA9063_VLDO11_A_LDO11_SL_A 0x80
829 #define DA9063_VBCORE2_B 0xb4
830 #define DA9063_VBCORE2_B_VBCORE2_B_SHIFT 0
831 #define DA9063_VBCORE2_B_VBCORE2_B_MASK 0x7f
832 #define DA9063_VBCORE2_B_BCORE2_SL_B 0x80
833 #define DA9063_VBCORE1_B 0xb5
834 #define DA9063_VBCORE1_B_VBCORE1_B_SHIFT 0
835 #define DA9063_VBCORE1_B_VBCORE1_B_MASK 0x7f
836 #define DA9063_VBCORE1_B_BCORE1_SL_B 0x80
837 #define DA9063_VBPRO_B 0xb6
838 #define DA9063_VBPRO_B_VBPRO_B_SHIFT 0
839 #define DA9063_VBPRO_B_VBPRO_B_MASK 0x7f
840 #define DA9063_VBPRO_B_BPRO_SL_B 0x80
841 #define DA9063_VBMEM_B 0xb7
842 #define DA9063_VBMEM_B_VBMEM_B_SHIFT 0
843 #define DA9063_VBMEM_B_VBMEM_B_MASK 0x7f
844 #define DA9063_VBMEM_B_BMEM_SL_B 0x80
845 #define DA9063_VBIO_B 0xb8
846 #define DA9063_VBIO_B_VBIO_B_SHIFT 0
847 #define DA9063_VBIO_B_VBIO_B_MASK 0x7f
848 #define DA9063_VBIO_B_BIO_SL_B 0x80
849 #define DA9063_VBPERI_B 0xb9
850 #define DA9063_VBPERI_B_VBPERI_B_SHIFT 0
851 #define DA9063_VBPERI_B_VBPERI_B_MASK 0x7f
852 #define DA9063_VBPERI_B_BPERI_SL_B 0x80
853 #define DA9063_VLDO1_B 0xba
854 #define DA9063_VLDO1_B_VLDO1_B_SHIFT 0
855 #define DA9063_VLDO1_B_VLDO1_B_MASK 0x3f
856 #define DA9063_VLDO1_B_LDO1_SL_B 0x80
857 #define DA9063_VLDO2_B 0xbb
858 #define DA9063_VLDO2_B_VLDO2_B_SHIFT 0
859 #define DA9063_VLDO2_B_VLDO2_B_MASK 0x3f
860 #define DA9063_VLDO2_B_LDO2_SL_B 0x80
861 #define DA9063_VLDO3_B 0xbc
862 #define DA9063_VLDO3_B_VLDO3_B_SHIFT 0
863 #define DA9063_VLDO3_B_VLDO3_B_MASK 0x7f
864 #define DA9063_VLDO3_B_LDO3_SL_B 0x80
865 #define DA9063_VLDO4_B 0xbd
866 #define DA9063_VLDO4_B_VLDO4_B_SHIFT 0
867 #define DA9063_VLDO4_B_VLDO4_B_MASK 0x7f
868 #define DA9063_VLDO4_B_LDO4_SL_B 0x80
869 #define DA9063_VLDO5_B 0xbe
870 #define DA9063_VLDO5_B_VLDO5_B_SHIFT 0
871 #define DA9063_VLDO5_B_VLDO5_B_MASK 0x7f
872 #define DA9063_VLDO5_B_LDO5_SL_B 0x80
873 #define DA9063_VLDO6_B 0xbf
874 #define DA9063_VLDO6_B_VLDO6_B_SHIFT 0
875 #define DA9063_VLDO6_B_VLDO6_B_MASK 0x7f
876 #define DA9063_VLDO6_B_LDO6_SL_B 0x80
877 #define DA9063_VLDO7_B 0xc0
878 #define DA9063_VLDO7_B_VLDO7_B_SHIFT 0
879 #define DA9063_VLDO7_B_VLDO7_B_MASK 0x7f
880 #define DA9063_VLDO7_B_LDO7_SL_B 0x80
881 #define DA9063_VLDO8_B 0xc1
882 #define DA9063_VLDO8_B_VLDO8_B_SHIFT 0
883 #define DA9063_VLDO8_B_VLDO8_B_MASK 0x7f
884 #define DA9063_VLDO8_B_LDO8_SL_B 0x80
885 #define DA9063_VLDO9_B 0xc2
886 #define DA9063_VLDO9_B_VLDO9_B_SHIFT 0
887 #define DA9063_VLDO9_B_VLDO9_B_MASK 0x7f
888 #define DA9063_VLDO9_B_LDO9_SL_B 0x80
889 #define DA9063_VLDO10_B 0xc3
890 #define DA9063_VLDO10_B_VLDO10_B_SHIFT 0
891 #define DA9063_VLDO10_B_VLDO10_B_MASK 0x7f
892 #define DA9063_VLDO10_B_LDO10_SL_B 0x80
893 #define DA9063_VLDO11_B 0xc4
894 #define DA9063_VLDO11_B_VLDO11_B_SHIFT 0
895 #define DA9063_VLDO11_B_VLDO11_B_MASK 0x7f
896 #define DA9063_VLDO11_B_LDO11_SL_B 0x80
900 #define DA9063_BBAT_CONT 0xc5
901 #define DA9063_BBAT_CONT_BCHG_VSET_SHIFT 0
902 #define DA9063_BBAT_CONT_BCHG_VSET_MASK 0x0f
904 #define DA9063_BBAT_CONT_BCHG_ISET_MASK 0x0f
908 #define DA9063_GPO11_LED 0xc6
909 #define DA9063_GPO11_LED_GPO11_PWM_SHIFT 0
910 #define DA9063_GPO11_LED_GPO11_PWM_MASK 0x7f
911 #define DA9063_GPO11_LED_GPO11_DIM 0x80
912 #define DA9063_GPO14_LED 0xc7
913 #define DA9063_GPO14_LED_GPO14_PWM_SHIFT 0
914 #define DA9063_GPO14_LED_GPO14_PWM_MASK 0x7f
915 #define DA9063_GPO14_LED_GPO14_DIM 0x80
916 #define DA9063_GPO15_LED 0xc8
917 #define DA9063_GPO15_LED_GPO15_PWM_SHIFT 0
918 #define DA9063_GPO15_LED_GPO15_PWM_MASK 0x7f
919 #define DA9063_GPO15_LED_GPO15_DIM 0x80
923 #define DA9063_ADC_CFG 0xc9
924 #define DA9063_ADC_CFG_ADCIN1_CUR_SHIFT 0
925 #define DA9063_ADC_CFG_ADCIN1_CUR_MASK 0x03
927 #define DA9063_ADC_CFG_ADCIN2_CUR_MASK 0x03
928 #define DA9063_ADC_CFG_ADCIN3_CUR 0x10
929 #define DA9063_ADC_CFG_ADCIN1_DEB 0x20
930 #define DA9063_ADC_CFG_ADCIN2_DEB 0x40
931 #define DA9063_ADC_CFG_ADCIN3_DEB 0x80
932 #define DA9063_AUTO1_HIGH 0xca
933 #define DA9063_AUTO1_HIGH_AUTO1_HIGH_SHIFT 0
934 #define DA9063_AUTO1_HIGH_AUTO1_HIGH_MASK 0xff
935 #define DA9063_AUTO1_LOW 0xcb
936 #define DA9063_AUTO1_LOW_AUTO1_LOW_SHIFT 0
937 #define DA9063_AUTO1_LOW_AUTO1_LOW_MASK 0xff
938 #define DA9063_AUTO2_HIGH 0xcc
939 #define DA9063_AUTO2_HIGH_AUTO2_HIGH_SHIFT 0
940 #define DA9063_AUTO2_HIGH_AUTO2_HIGH_MASK 0xff
941 #define DA9063_AUTO2_LOW 0xcd
942 #define DA9063_AUTO2_LOW_AUTO2_LOW_SHIFT 0
943 #define DA9063_AUTO2_LOW_AUTO2_LOW_MASK 0xff
944 #define DA9063_AUTO3_HIGH 0xce
945 #define DA9063_AUTO3_HIGH_AUTO3_HIGH_SHIFT 0
946 #define DA9063_AUTO3_HIGH_AUTO3_HIGH_MASK 0xff
947 #define DA9063_AUTO3_LOW 0xcf
948 #define DA9063_AUTO3_LOW_AUTO3_LOW_SHIFT 0
949 #define DA9063_AUTO3_LOW_AUTO3_LOW_MASK 0xff
953 /* 0x100 is PAGE_CON */
957 #define DA9063_OTP_CONT 0x101
958 #define DA9063_OTP_CONT_OTP_TIM 0x01
959 #define DA9063_OTP_CONT_OTP_GP_RD 0x02
960 #define DA9063_OTP_CONT_OTP_APPS_RD 0x04
961 #define DA9063_OTP_CONT_PC_DONE 0x08
962 #define DA9063_OTP_CONT_OTP_GP_LOCK 0x10
963 #define DA9063_OTP_CONT_OTP_APPS_LOCK 0x20
964 #define DA9063_OTP_CONT_OTP_CONF_LOCK 0x40
965 #define DA9063_OTP_CONT_GP_WRITE_DIS 0x80
966 #define DA9063_OTP_ADDR 0x102
967 #define DA9063_OTP_ADDR_OTP_ADDR_SHIFT 0
968 #define DA9063_OTP_ADDR_OTP_ADDR_MASK 0xff
969 #define DA9063_OTP_DATA 0x103
970 #define DA9063_OTP_DATA_OTP_DATA_SHIFT 0
971 #define DA9063_OTP_DATA_OTP_DATA_MASK 0xff
975 #define DA9063_T_OFFSET 0x104
976 #define DA9063_T_OFFSET_T_OFFSET_SHIFT 0
977 #define DA9063_T_OFFSET_T_OFFSET_MASK 0xff
978 #define DA9063_INTERFACE 0x105
979 #define DA9063_INTERFACE_NCS_POL 0x01
980 #define DA9063_INTERFACE_CPOL 0x02
981 #define DA9063_INTERFACE_CPHA 0x04
982 #define DA9063_INTERFACE_RW_POL 0x08
984 #define DA9063_INTERFACE_IF_BASE_ADDR_MASK 0x0f
985 #define DA9063_CONFIG_A 0x106
986 #define DA9063_CONFIG_A_PM_I_V 0x01
987 #define DA9063_CONFIG_A_PM_O_V 0x02
988 #define DA9063_CONFIG_A_PM_O_TYPE 0x04
989 #define DA9063_CONFIG_A_IRQ_TYPE 0x08
990 #define DA9063_CONFIG_A_PM_IF_V 0x10
991 #define DA9063_CONFIG_A_PM_IF_FMP 0x20
992 #define DA9063_CONFIG_A_PM_IF_HSM 0x40
993 #define DA9063_CONFIG_A_IF_TYPE 0x80
994 #define DA9063_CONFIG_B 0x107
995 #define DA9063_CONFIG_B_VDD_FAULT_ADJ_SHIFT 0
996 #define DA9063_CONFIG_B_VDD_FAULT_ADJ_MASK 0x0f
998 #define DA9063_CONFIG_B_VDD_HYST_ADJ_MASK 0x07
999 #define DA9063_CONFIG_B_CHG_CLK_MODE 0x80
1000 #define DA9063_CONFIG_C 0x108
1001 #define DA9063_CONFIG_C_LDO1_TRACK_SHIFT 0
1002 #define DA9063_CONFIG_C_LDO1_TRACK_MASK 0x03
1003 #define DA9063_CONFIG_C_BUCK_ACTV_DISCH 0x04
1004 #define DA9063_CONFIG_C_BCORE1_CLK_INV 0x08
1005 #define DA9063_CONFIG_C_BPRO_CLK_INV 0x10
1006 #define DA9063_CONFIG_C_BMEM_CLK_INV 0x20
1007 #define DA9063_CONFIG_C_BIO_CLK_INV 0x40
1008 #define DA9063_CONFIG_C_BPERI_CLK_INV 0x80
1009 #define DA9063_CONFIG_D 0x109
1010 #define DA9063_CONFIG_D_GPI_V 0x01
1011 #define DA9063_CONFIG_D_NIRQ_MODE 0x02
1012 #define DA9063_CONFIG_D_SYSTEM_EN_RD 0x04
1013 #define DA9063_CONFIG_D_HS_IF_FMP 0x08
1014 #define DA9063_CONFIG_D_HS_IF_HSM 0x10
1015 #define DA9063_CONFIG_D_FORCE_RESET 0x20
1016 #define DA9063_CONFIG_D_GP_FB2_TYPE 0x40
1017 #define DA9063_CONFIG_D_GP_FB3_TYPE 0x80
1018 #define DA9063_CONFIG_E 0x10a
1019 #define DA9063_CONFIG_E_BCORE1_AUTO 0x01
1020 #define DA9063_CONFIG_E_BCORE2_AUTO 0x02
1021 #define DA9063_CONFIG_E_BPRO_AUTO 0x04
1022 #define DA9063_CONFIG_E_BMEM_AUTO 0x08
1023 #define DA9063_CONFIG_E_BIO_AUTO 0x10
1024 #define DA9063_CONFIG_E_BPERI_AUTO 0x20
1025 #define DA9063_CONFIG_E_CORE_SW_AUTO 0x40
1026 #define DA9063_CONFIG_E_PERI_SW_AUTO 0x80
1027 #define DA9063_CONFIG_F 0x10b
1028 #define DA9063_CONFIG_F_LDO9_AUTO 0x01
1029 #define DA9063_CONFIG_F_LDO10_AUTO 0x02
1030 #define DA9063_CONFIG_F_LDO11_AUTO 0x04
1031 #define DA9063_CONFIG_F_LDO3_BYP 0x08
1032 #define DA9063_CONFIG_F_LDO4_BYP 0x10
1033 #define DA9063_CONFIG_F_LDO7_BYP 0x20
1034 #define DA9063_CONFIG_F_LDO8_BYP 0x40
1035 #define DA9063_CONFIG_F_LDO11_BYP 0x80
1036 #define DA9063_CONFIG_G 0x10c
1037 #define DA9063_CONFIG_G_LDO1_AUTO 0x01
1038 #define DA9063_CONFIG_G_LDO2_AUTO 0x02
1039 #define DA9063_CONFIG_G_LDO3_AUTO 0x04
1040 #define DA9063_CONFIG_G_LDO4_AUTO 0x08
1041 #define DA9063_CONFIG_G_LDO5_AUTO 0x10
1042 #define DA9063_CONFIG_G_LDO6_AUTO 0x20
1043 #define DA9063_CONFIG_G_LDO7_AUTO 0x40
1044 #define DA9063_CONFIG_G_LDO8_AUTO 0x80
1045 #define DA9063_CONFIG_H 0x10d
1046 #define DA9063_CONFIG_H_PWM_CLK 0x01
1047 #define DA9063_CONFIG_H_LDO8_MODE 0x02
1048 #define DA9063_CONFIG_H_MERGE_SENSE 0x04
1049 #define DA9063_CONFIG_H_BCORE_MERGE 0x08
1050 #define DA9063_CONFIG_H_BPRO_OD 0x10
1051 #define DA9063_CONFIG_H_BCORE2_OD 0x20
1052 #define DA9063_CONFIG_H_BCORE1_OD 0x40
1053 #define DA9063_CONFIG_H_BUCK_MERGE 0x80
1054 #define DA9063_CONFIG_I 0x10e
1055 #define DA9063_CONFIG_I_NONKEY_PIN_SHIFT 0
1056 #define DA9063_CONFIG_I_NONKEY_PIN_MASK 0x03
1057 #define DA9063_CONFIG_I_NONKEY_SD 0x04
1058 #define DA9063_CONFIG_I_GPI14_15_SD 0x08
1059 #define DA9063_CONFIG_I_KEY_SD_MODE 0x10
1060 #define DA9063_CONFIG_I_HOST_SD_MODE 0x20
1061 #define DA9063_CONFIG_I_INT_SD_MODE 0x40
1062 #define DA9063_CONFIG_I_LDO_SD 0x80
1063 #define DA9063_CONFIG_J 0x10f
1064 #define DA9063_CONFIG_J_KEY_DELAY_SHIFT 0
1065 #define DA9063_CONFIG_J_KEY_DELAY_MASK 0x03
1067 #define DA9063_CONFIG_J_SHUT_DELAY_MASK 0x03
1069 #define DA9063_CONFIG_J_RESET_DURATION_MASK 0x03
1070 #define DA9063_CONFIG_J_TWOWIRE_TO 0x40
1071 #define DA9063_CONFIG_J_IF_RESET 0x80
1072 #define DA9063_CONFIG_K 0x110
1073 #define DA9063_CONFIG_K_GPIO0_PUD 0x01
1074 #define DA9063_CONFIG_K_GPIO1_PUD 0x02
1075 #define DA9063_CONFIG_K_GPIO2_PUD 0x04
1076 #define DA9063_CONFIG_K_GPIO3_PUD 0x08
1077 #define DA9063_CONFIG_K_GPIO4_PUD 0x10
1078 #define DA9063_CONFIG_K_GPIO5_PUD 0x20
1079 #define DA9063_CONFIG_K_GPIO6_PUD 0x40
1080 #define DA9063_CONFIG_K_GPIO7_PUD 0x80
1081 #define DA9063_CONFIG_L 0x111
1082 #define DA9063_CONFIG_L_GPIO8_PUD 0x01
1083 #define DA9063_CONFIG_L_GPIO9_PUD 0x02
1084 #define DA9063_CONFIG_L_GPIO10_PUD 0x04
1085 #define DA9063_CONFIG_L_GPIO11_PUD 0x08
1086 #define DA9063_CONFIG_L_GPIO12_PUD 0x10
1087 #define DA9063_CONFIG_L_GPIO13_PUD 0x20
1088 #define DA9063_CONFIG_L_GPIO14_PUD 0x40
1089 #define DA9063_CONFIG_L_GPIO15_PUD 0x80
1090 #define DA9063_CONFIG_M 0x112
1092 #define DA9063_CONFIG_M_OSC_FREQ_MASK 0x03
1093 #define DA9063_CONFIG_N 0x113
1095 #define DA9063_MON_REG_1 0x114
1096 #define DA9063_MON_REG_1_MON_THRES_SHIFT 0
1097 #define DA9063_MON_REG_1_MON_THRES_MASK 0x03
1098 #define DA9063_MON_REG_1_MON_RES 0x40
1099 #define DA9063_MON_REG_1_MON_DEB 0x80
1101 #define DA9063_MON_REG_1_MON_MODE_MASK 0x03
1103 #define DA9063_MON_REG_1_UVOV_DELAY_MASK 0x03
1104 #define DA9063_MON_REG_2 0x115
1105 #define DA9063_MON_REG_2_LDO1_MON_EN 0x01
1106 #define DA9063_MON_REG_2_LDO2_MON_EN 0x02
1107 #define DA9063_MON_REG_2_LDO3_MON_EN 0x04
1108 #define DA9063_MON_REG_2_LDO4_MON_EN 0x08
1109 #define DA9063_MON_REG_2_LDO5_MON_EN 0x10
1110 #define DA9063_MON_REG_2_LDO6_MON_EN 0x20
1111 #define DA9063_MON_REG_2_LDO7_MON_EN 0x40
1112 #define DA9063_MON_REG_2_LDO8_MON_EN 0x80
1113 #define DA9063_MON_REG_3 0x116
1114 #define DA9063_MON_REG_3_LDO9_MON_EN 0x01
1115 #define DA9063_MON_REG_3_LDO10_MON_EN 0x02
1116 #define DA9063_MON_REG_3_LDO11_MON_EN 0x04
1117 #define DA9063_MON_REG_4 0x117
1118 #define DA9063_MON_REG_4_BCORE1_MON_EN 0x01
1119 #define DA9063_MON_REG_4_BCORE2_MON_EN 0x02
1120 #define DA9063_MON_REG_4_BPRO_MON_EN 0x04
1121 #define DA9063_MON_REG_4_BIO_MON_EN 0x08
1122 #define DA9063_MON_REG_4_BMEM_MON_EN 0x10
1123 #define DA9063_MON_REG_4_BPERI_MON_EN 0x20
1124 /* 0x118 - 0x11d reserved */
1125 #define DA9063_MON_REG_5 0x11e
1126 #define DA9063_MON_REG_5_MONA8_IDX_SHIFT 0
1127 #define DA9063_MON_REG_5_MONA8_IDX_MASK 0x07
1129 #define DA9063_MON_REG_5_MONA9_IDX_MASK 0x07
1130 #define DA9063_MON_REG_6 0x11f
1131 #define DA9063_MON_REG_6_MONA10_IDX_SHIFT 0
1132 #define DA9063_MON_REG_6_MONA10_IDX_MASK 0x07
1133 #define DA9063_TRIM_CLDR 0x120
1134 #define DA9063_TRIM_CLDR_TRIM_CLDR_SHIFT 0
1135 #define DA9063_TRIM_CLDR_TRIM_CLDR_MASK 0xff
1139 #define DA9063_GP_ID_0 0x121
1140 #define DA9063_GP_ID_0_GP_0_SHIFT 0
1141 #define DA9063_GP_ID_0_GP_0_MASK 0xff
1142 #define DA9063_GP_ID_1 0x122
1143 #define DA9063_GP_ID_1_GP_1_SHIFT 0
1144 #define DA9063_GP_ID_1_GP_1_MASK 0xff
1145 #define DA9063_GP_ID_2 0x123
1146 #define DA9063_GP_ID_2_GP_2_SHIFT 0
1147 #define DA9063_GP_ID_2_GP_2_MASK 0xff
1148 #define DA9063_GP_ID_3 0x124
1149 #define DA9063_GP_ID_3_GP_3_SHIFT 0
1150 #define DA9063_GP_ID_3_GP_3_MASK 0xff
1151 #define DA9063_GP_ID_4 0x125
1152 #define DA9063_GP_ID_4_GP_4_SHIFT 0
1153 #define DA9063_GP_ID_4_GP_4_MASK 0xff
1154 #define DA9063_GP_ID_5 0x126
1155 #define DA9063_GP_ID_5_GP_5_SHIFT 0
1156 #define DA9063_GP_ID_5_GP_5_MASK 0xff
1157 #define DA9063_GP_ID_6 0x127
1158 #define DA9063_GP_ID_6_GP_6_SHIFT 0
1159 #define DA9063_GP_ID_6_GP_6_MASK 0xff
1160 #define DA9063_GP_ID_7 0x128
1161 #define DA9063_GP_ID_7_GP_7_SHIFT 0
1162 #define DA9063_GP_ID_7_GP_7_MASK 0xff
1163 #define DA9063_GP_ID_8 0x129
1164 #define DA9063_GP_ID_8_GP_8_SHIFT 0
1165 #define DA9063_GP_ID_8_GP_8_MASK 0xff
1166 #define DA9063_GP_ID_9 0x12a
1167 #define DA9063_GP_ID_9_GP_9_SHIFT 0
1168 #define DA9063_GP_ID_9_GP_9_MASK 0xff
1169 #define DA9063_GP_ID_10 0x12b
1170 #define DA9063_GP_ID_10_GP_10_SHIFT 0
1171 #define DA9063_GP_ID_10_GP_10_MASK 0xff
1172 #define DA9063_GP_ID_11 0x12c
1173 #define DA9063_GP_ID_11_GP_11_SHIFT 0
1174 #define DA9063_GP_ID_11_GP_11_MASK 0xff
1175 /* 0x12d - 0x134 reserved */
1179 /* 0x135 - 0x13e reserved */
1180 #define DA9063_MISC_SUPP 0x13f
1181 #define DA9063_MISC_SUPP_OTP_CLK_ON 0x1
1182 #define DA9063_MISC_SUPP_CRYSTAL_OK 0x2
1186 /* 0x180 is PAGE_CON */
1190 #define DA9063_DEVICE_ID 0x181
1191 #define DA9063_DEVICE_ID_DEVICE_ID_SHIFT 0
1192 #define DA9063_DEVICE_ID_DEVICE_ID_MASK 0xff
1193 #define DA9063_VARIANT_ID 0x182
1194 #define DA9063_VARIANT_ID_VRC_SHIFT 0
1195 #define DA9063_VARIANT_ID_VRC_MASK 0x0f
1197 #define DA9063_VARIANT_ID_MRC_MASK 0x0f
1198 #define DA9063_CUSTOMER_ID 0x183
1199 #define DA9063_CUSTOMER_ID_CUST_ID_SHIFT 0
1200 #define DA9063_CUSTOMER_ID_CUST_ID_MASK 0xff
1201 #define DA9063_CONFIG_ID 0x184
1202 #define DA9063_CONFIG_ID_CONFIG_REV_SHIFT 0
1203 #define DA9063_CONFIG_ID_CONFIG_REV_MASK 0xff
1204 #define DA9063_PMIC_STATUS 0x185
1205 #define DA9063_PMIC_STATUS_STATUS_SHIFT 0
1206 #define DA9063_PMIC_STATUS_STATUS_MASK 0x1f
1207 #define DA9063_PMIC_STATUS_PC_DONE 0x80