362 #define	SIO_SET(x)	DC_SETBIT(sc, DC_SIO, (x))
363 #define	SIO_CLR(x)	DC_CLRBIT(sc, DC_SIO, (x))
383 	CSR_WRITE_4(sc, DC_SIO, DC_SIO_EESEL);  in dc_eeprom_width()
385 	DC_SETBIT(sc, DC_SIO, DC_SIO_ROMCTL_READ);  in dc_eeprom_width()
387 	DC_CLRBIT(sc, DC_SIO, DC_SIO_EE_CLK);  in dc_eeprom_width()
389 	DC_SETBIT(sc, DC_SIO, DC_SIO_EE_CS);  in dc_eeprom_width()
394 			DC_SETBIT(sc, DC_SIO, DC_SIO_EE_DATAIN);  in dc_eeprom_width()
396 			DC_CLRBIT(sc, DC_SIO, DC_SIO_EE_DATAIN);  in dc_eeprom_width()
398 		DC_SETBIT(sc, DC_SIO, DC_SIO_EE_CLK);  in dc_eeprom_width()
400 		DC_CLRBIT(sc, DC_SIO, DC_SIO_EE_CLK);  in dc_eeprom_width()
405 		DC_SETBIT(sc, DC_SIO, DC_SIO_EE_CLK);  in dc_eeprom_width()
407 		if (!(CSR_READ_4(sc, DC_SIO) & DC_SIO_EE_DATAOUT)) {  in dc_eeprom_width()
408 			DC_CLRBIT(sc, DC_SIO, DC_SIO_EE_CLK);  in dc_eeprom_width()
412 		DC_CLRBIT(sc, DC_SIO, DC_SIO_EE_CLK);  in dc_eeprom_width()
425 	CSR_WRITE_4(sc, DC_SIO, DC_SIO_EESEL);  in dc_eeprom_width()
427 	DC_SETBIT(sc, DC_SIO, DC_SIO_ROMCTL_READ);  in dc_eeprom_width()
429 	DC_CLRBIT(sc, DC_SIO, DC_SIO_EE_CLK);  in dc_eeprom_width()
431 	DC_SETBIT(sc, DC_SIO, DC_SIO_EE_CS);  in dc_eeprom_width()
443 	CSR_WRITE_4(sc, DC_SIO, DC_SIO_EESEL);  in dc_eeprom_idle()
445 	DC_SETBIT(sc, DC_SIO, DC_SIO_ROMCTL_READ);  in dc_eeprom_idle()
447 	DC_CLRBIT(sc, DC_SIO, DC_SIO_EE_CLK);  in dc_eeprom_idle()
449 	DC_SETBIT(sc, DC_SIO, DC_SIO_EE_CS);  in dc_eeprom_idle()
453 		DC_CLRBIT(sc, DC_SIO, DC_SIO_EE_CLK);  in dc_eeprom_idle()
455 		DC_SETBIT(sc, DC_SIO, DC_SIO_EE_CLK);  in dc_eeprom_idle()
459 	DC_CLRBIT(sc, DC_SIO, DC_SIO_EE_CLK);  in dc_eeprom_idle()
461 	DC_CLRBIT(sc, DC_SIO, DC_SIO_EE_CS);  in dc_eeprom_idle()
463 	CSR_WRITE_4(sc, DC_SIO, 0x00000000);  in dc_eeprom_idle()
477 			DC_SETBIT(sc, DC_SIO, DC_SIO_EE_DATAIN);  in dc_eeprom_putbyte()
479 			DC_CLRBIT(sc, DC_SIO, DC_SIO_EE_DATAIN);  in dc_eeprom_putbyte()
481 		DC_SETBIT(sc, DC_SIO, DC_SIO_EE_CLK);  in dc_eeprom_putbyte()
483 		DC_CLRBIT(sc, DC_SIO, DC_SIO_EE_CLK);  in dc_eeprom_putbyte()
519 		r = CSR_READ_4(sc, DC_SIO);  in dc_eeprom_getword_pnic()
540 	*dest = (uint16_t)CSR_READ_4(sc, DC_SIO) & 0xff;  in dc_eeprom_getword_xircom()
543 	*dest |= ((uint16_t)CSR_READ_4(sc, DC_SIO) & 0xff) << 8;  in dc_eeprom_getword_xircom()
561 	CSR_WRITE_4(sc, DC_SIO, DC_SIO_EESEL);  in dc_eeprom_getword()
563 	DC_SETBIT(sc, DC_SIO,  DC_SIO_ROMCTL_READ);  in dc_eeprom_getword()
565 	DC_CLRBIT(sc, DC_SIO, DC_SIO_EE_CLK);  in dc_eeprom_getword()
567 	DC_SETBIT(sc, DC_SIO, DC_SIO_EE_CS);  in dc_eeprom_getword()
581 		if (CSR_READ_4(sc, DC_SIO) & DC_SIO_EE_DATAOUT)  in dc_eeprom_getword()
628 	CSR_WRITE_4(sc, DC_SIO, val);  in dc_mii_bitbang_write()
629 	CSR_BARRIER_4(sc, DC_SIO,  in dc_mii_bitbang_write()
644 	val = CSR_READ_4(sc, DC_SIO);  in dc_mii_bitbang_read()
645 	CSR_BARRIER_4(sc, DC_SIO,  in dc_mii_bitbang_read()