145 	struct dc_softc		*dc_sc;  in dcphy_attach()  local
154 	dc_sc = if_getsoftc(sc->mii_pdata->mii_ifp);  in dcphy_attach()
155 	CSR_WRITE_4(dc_sc, DC_10BTSTAT, 0);  in dcphy_attach()
156 	CSR_WRITE_4(dc_sc, DC_10BTCTRL, 0);  in dcphy_attach()
165 		if (dc_sc->dc_pmode == DC_PMODE_SIA)  in dcphy_attach()
187 	struct dc_softc		*dc_sc;  in dcphy_service()  local
192 	dc_sc = if_getsoftc(mii->mii_ifp);  in dcphy_service()
206 		mode = CSR_READ_4(dc_sc, DC_NETCFG);  in dcphy_service()
217 			DC_CLRBIT(dc_sc, DC_10BTCTRL, DC_TCTL_AUTONEGENBL);  in dcphy_service()
224 			CSR_WRITE_4(dc_sc, DC_NETCFG, mode);  in dcphy_service()
227 			DC_CLRBIT(dc_sc, DC_SIARESET, DC_SIA_RESET);  in dcphy_service()
228 			DC_CLRBIT(dc_sc, DC_10BTCTRL, 0xFFFF);  in dcphy_service()
230 				DC_SETBIT(dc_sc, DC_10BTCTRL, 0x7F3D);  in dcphy_service()
232 				DC_SETBIT(dc_sc, DC_10BTCTRL, 0x7F3F);  in dcphy_service()
233 			DC_SETBIT(dc_sc, DC_SIARESET, DC_SIA_RESET);  in dcphy_service()
234 			DC_CLRBIT(dc_sc, DC_10BTCTRL, DC_TCTL_AUTONEGENBL);  in dcphy_service()
241 			CSR_WRITE_4(dc_sc, DC_NETCFG, mode);  in dcphy_service()
261 		reg = CSR_READ_4(dc_sc, DC_10BTSTAT);  in dcphy_service()
297 	struct dc_softc		*dc_sc;  in dcphy_status()  local
299 	dc_sc = if_getsoftc(mii->mii_ifp);  in dcphy_status()
307 	tstat = CSR_READ_4(dc_sc, DC_10BTSTAT);  in dcphy_status()
311 	if (CSR_READ_4(dc_sc, DC_10BTCTRL) & DC_TCTL_AUTONEGENBL) {  in dcphy_status()
314 			if ((DC_IS_MACRONIX(dc_sc) || DC_IS_PNICII(dc_sc)) &&  in dcphy_status()
338 			if (DC_IS_INTEL(dc_sc))  in dcphy_status()
339 				DC_CLRBIT(dc_sc, DC_10BTCTRL,  in dcphy_status()
358 		if (DC_IS_INTEL(dc_sc))  in dcphy_status()
359 			DC_CLRBIT(dc_sc, DC_10BTCTRL, DC_TCTL_AUTONEGENBL);  in dcphy_status()
364 	if (CSR_READ_4(dc_sc, DC_NETCFG) & DC_NETCFG_SPEEDSEL)  in dcphy_status()
368 	if (CSR_READ_4(dc_sc, DC_NETCFG) & DC_NETCFG_FULLDUPLEX)  in dcphy_status()