Lines Matching +full:25 +full:g
85 {0x5801, "Chelsio T520-CR VF"}, /* 2 x 10G */
86 {0x5802, "Chelsio T522-CR VF"}, /* 2 x 10G, 2 X 1G */
87 {0x5803, "Chelsio T540-CR VF"}, /* 4 x 10G */
88 {0x5807, "Chelsio T520-SO VF"}, /* 2 x 10G, nomem */
90 {0x580a, "Chelsio T504-BT VF"}, /* 4 x 1G */
91 {0x580d, "Chelsio T580-CR VF"}, /* 2 x 40G */
92 {0x580e, "Chelsio T540-LP-CR VF"}, /* 4 x 10G */
93 {0x5810, "Chelsio T580-LP-CR VF"}, /* 2 x 40G */
94 {0x5811, "Chelsio T520-LL-CR VF"}, /* 2 x 10G */
95 {0x5812, "Chelsio T560-CR VF"}, /* 1 x 40G, 2 x 10G */
96 {0x5814, "Chelsio T580-LP-SO-CR VF"}, /* 2 x 40G, nomem */
97 {0x5815, "Chelsio T502-BT VF"}, /* 2 x 1G */
101 {0x581b, "Chelsio T540-SO-CR VF"}, /* 4 x 10G, nomem */
103 {0x6800, "Chelsio T6-DBG-25 VF"}, /* 2 x 10/25G, debug */
104 {0x6801, "Chelsio T6225-CR VF"}, /* 2 x 10/25G */
105 {0x6802, "Chelsio T6225-SO-CR VF"}, /* 2 x 10/25G, nomem */
106 {0x6803, "Chelsio T6425-CR VF"}, /* 4 x 10/25G */
107 {0x6804, "Chelsio T6425-SO-CR VF"}, /* 4 x 10/25G, nomem */
108 {0x6805, "Chelsio T6225-SO-OCP3 VF"}, /* 2 x 10/25G, nomem */
109 {0x6806, "Chelsio T6225-OCP3 VF"}, /* 2 x 10/25G */
110 {0x6807, "Chelsio T62100-LP-CR VF"}, /* 2 x 40/50/100G */
111 {0x6808, "Chelsio T62100-SO-CR VF"}, /* 2 x 40/50/100G, nomem */
113 {0x680d, "Chelsio T62100-CR VF"}, /* 2 x 40/50/100G */
114 {0x6810, "Chelsio T6-DBG-100 VF"}, /* 2 x 40/50/100G, debug */
115 {0x6811, "Chelsio T6225-LL-CR VF"}, /* 2 x 10/25G */
116 {0x6814, "Chelsio T62100-SO-OCP3 VF"}, /* 2 x 40/50/100G, nomem */
553 * Some environments do not properly handle PCIE FLRs -- e.g. in Linux in t4vf_attach()