Lines Matching full:vi
125 alloc_nm_rxq(struct vi_info *vi, struct sge_nm_rxq *nm_rxq, int intr_idx,
134 struct adapter *sc = vi->adapter;
135 struct netmap_adapter *na = NA(vi->ifp);
139 len = vi->qsize_rxq * IQ_ESIZE;
151 nm_rxq->vi = vi;
154 nm_rxq->iq_sidx = vi->qsize_rxq - sc->params.sge.spg_len / IQ_ESIZE;
162 ctx = &vi->ctx;
163 children = SYSCTL_CHILDREN(vi->nm_rxq_oid);
193 free_nm_rxq(struct vi_info *vi, struct sge_nm_rxq *nm_rxq)
195 struct adapter *sc = vi->adapter;
197 if (!(vi->flags & VI_INIT_DONE))
201 free_nm_rxq_hwq(vi, nm_rxq);
213 alloc_nm_txq(struct vi_info *vi, struct sge_nm_txq *nm_txq, int iqidx, int idx)
217 struct port_info *pi = vi->pi;
219 struct netmap_adapter *na = NA(vi->ifp);
222 struct sysctl_oid_list *children = SYSCTL_CHILDREN(vi->nm_txq_oid);
236 V_TXPKT_VF(vi->vin) | V_TXPKT_VF_VLD(vi->vfvld));
244 oid = SYSCTL_ADD_NODE(&vi->ctx, children, OID_AUTO, name,
248 SYSCTL_ADD_UINT(&vi->ctx, children, OID_AUTO, "cntxt_id", CTLFLAG_RD,
250 SYSCTL_ADD_U16(&vi->ctx, children, OID_AUTO, "cidx", CTLFLAG_RD,
252 SYSCTL_ADD_U16(&vi->ctx, children, OID_AUTO, "pidx", CTLFLAG_RD,
259 free_nm_txq(struct vi_info *vi, struct sge_nm_txq *nm_txq)
261 struct adapter *sc = vi->adapter;
263 if (!(vi->flags & VI_INIT_DONE))
267 free_nm_txq_hwq(vi, nm_txq);
277 alloc_nm_rxq_hwq(struct vi_info *vi, struct sge_nm_rxq *nm_rxq)
281 struct adapter *sc = vi->adapter;
282 struct port_info *pi = vi->pi;
284 struct netmap_adapter *na = NA(vi->ifp);
292 bzero(nm_rxq->iq_desc, vi->qsize_rxq * IQ_ESIZE);
314 V_FW_IQ_CMD_VIID(vi->viid) |
320 c.iqsize = htobe16(vi->qsize_rxq);
353 MPASS(nm_rxq->iq_sidx == vi->qsize_rxq - sp->spg_len / IQ_ESIZE);
393 free_nm_rxq_hwq(struct vi_info *vi, struct sge_nm_rxq *nm_rxq)
395 struct adapter *sc = vi->adapter;
408 alloc_nm_txq_hwq(struct vi_info *vi, struct sge_nm_txq *nm_txq)
412 struct adapter *sc = vi->adapter;
413 struct netmap_adapter *na = NA(vi->ifp);
436 F_FW_EQ_ETH_CMD_AUTOEQUEQE | V_FW_EQ_ETH_CMD_VIID(vi->viid));
439 V_FW_EQ_ETH_CMD_PCIECHN(vi->pi->hw_port) | F_FW_EQ_ETH_CMD_FETCHRO |
450 device_printf(vi->dev,
495 device_printf(vi->dev,
506 free_nm_txq_hwq(struct vi_info *vi, struct sge_nm_txq *nm_txq)
508 struct adapter *sc = vi->adapter;
520 cxgbe_netmap_simple_rss(struct adapter *sc, struct vi_info *vi,
533 for_each_nm_rxq(vi, j, nm_rxq) {
548 rss = vi->rss;
549 defq = vi->rss[0];
551 for (i = 0; i < vi->rss_size;) {
552 for_each_nm_rxq(vi, j, nm_rxq) {
561 vi->nm_rss[i++] = nm_rxq->iq_abs_id;
562 if (i == vi->rss_size)
567 rss = vi->nm_rss;
570 rc = -t4_config_rss_range(sc, sc->mbox, vi->viid, 0, vi->rss_size, rss,
571 vi->rss_size);
575 rc = -t4_config_vi_rss(sc, sc->mbox, vi->viid, vi->hashen, defq, 0, 0);
588 cxgbe_netmap_split_rss(struct adapter *sc, struct vi_info *vi,
599 MPASS(vi->nnmrxq > 1);
601 for_each_nm_rxq(vi, i, nm_rxq) {
602 j = i / ((vi->nnmrxq + 1) / 2);
617 return (cxgbe_netmap_simple_rss(sc, vi, ifp, na));
632 nm_rxq = &sc->sge.nm_rxq[vi->first_nm_rxq];
633 while (i < vi->rss_size / 2) {
634 for (j = 0; j < (vi->nnmrxq + 1) / 2; j++) {
646 vi->nm_rss[i++] = nm_rxq[j].iq_abs_id;
647 if (i == vi->rss_size / 2)
651 while (i < vi->rss_size) {
652 for (j = (vi->nnmrxq + 1) / 2; j < vi->nnmrxq; j++) {
664 vi->nm_rss[i++] = nm_rxq[j].iq_abs_id;
665 if (i == vi->rss_size)
670 rc = -t4_config_rss_range(sc, sc->mbox, vi->viid, 0, vi->rss_size,
671 vi->nm_rss, vi->rss_size);
675 rc = -t4_config_vi_rss(sc, sc->mbox, vi->viid, vi->hashen, defq, 0, 0);
683 cxgbe_netmap_rss(struct adapter *sc, struct vi_info *vi, if_t ifp,
687 if (nm_split_rss == 0 || vi->nnmrxq == 1)
688 return (cxgbe_netmap_simple_rss(sc, vi, ifp, na));
690 return (cxgbe_netmap_split_rss(sc, vi, ifp, na));
694 cxgbe_netmap_on(struct adapter *sc, struct vi_info *vi, if_t ifp,
705 MPASS(vi->nnmrxq > 0);
706 MPASS(vi->nnmtxq > 0);
708 if ((vi->flags & VI_INIT_DONE) == 0 ||
735 for_each_nm_rxq(vi, i, nm_rxq) {
740 alloc_nm_rxq_hwq(vi, nm_rxq);
765 for_each_nm_txq(vi, i, nm_txq) {
770 alloc_nm_txq_hwq(vi, nm_txq);
775 if (vi->nm_rss == NULL) {
776 vi->nm_rss = malloc(vi->rss_size * sizeof(uint16_t), M_CXGBE,
780 return (cxgbe_netmap_rss(sc, vi, ifp, na));
784 cxgbe_netmap_off(struct adapter *sc, struct vi_info *vi, if_t ifp,
793 MPASS(vi->nnmrxq > 0);
794 MPASS(vi->nnmtxq > 0);
799 if ((vi->flags & VI_INIT_DONE) == 0)
803 rc = cxgbe_netmap_rss(sc, vi, ifp, na);
807 for_each_nm_txq(vi, i, nm_txq) {
815 device_printf(vi->dev,
825 for_each_nm_rxq(vi, i, nm_rxq) {
838 device_printf(vi->dev,
861 struct vi_info *vi = if_getsoftc(ifp);
862 struct adapter *sc = vi->adapter;
865 rc = begin_synchronized_op(sc, vi, SLEEP_OK | INTR_OK, "t4nmreg");
869 rc = cxgbe_netmap_on(sc, vi, ifp, na);
871 rc = cxgbe_netmap_off(sc, vi, ifp, na);
1115 struct vi_info *vi = if_getsoftc(ifp);
1116 struct adapter *sc = vi->adapter;
1117 struct sge_nm_txq *nm_txq = &sc->sge.nm_txq[vi->first_nm_txq + kring->ring_id];
1179 struct vi_info *vi = if_getsoftc(ifp);
1180 struct adapter *sc = vi->adapter;
1181 struct sge_nm_rxq *nm_rxq = &sc->sge.nm_rxq[vi->first_nm_rxq + kring->ring_id];
1263 cxgbe_nm_attach(struct vi_info *vi)
1269 MPASS(vi->nnmrxq > 0);
1270 MPASS(vi->ifp != NULL);
1272 pi = vi->pi;
1277 na.ifp = vi->ifp;
1281 na.num_tx_desc = vi->qsize_txq - sc->params.sge.spg_len / EQ_ESIZE;
1289 na.num_rx_desc = rounddown(vi->qsize_rxq, 8);
1293 na.num_tx_rings = vi->nnmtxq;
1294 na.num_rx_rings = vi->nnmrxq;
1300 cxgbe_nm_detach(struct vi_info *vi)
1303 MPASS(vi->nnmrxq > 0);
1304 MPASS(vi->ifp != NULL);
1306 netmap_detach(vi->ifp);
1336 struct vi_info *vi = nm_rxq->vi;
1337 struct adapter *sc = vi->adapter;
1338 if_t ifp = vi->ifp;