Lines Matching +full:rate +full:- +full:np +full:- +full:ms
1 /*-
2 * SPDX-License-Identifier: BSD-2-Clause
6 * Written by: Navdeep Parhar <np@FreeBSD.org>
272 * Each tunable is set to a default value here if it's known at compile-time.
273 * Otherwise it is set to -n as an indication to tweak_tunables() that it should
290 int t4_ntxq = -NTXQ;
296 int t4_nrxq = -NRXQ;
302 static int t4_ntxq_vi = -NTXQ_VI;
307 static int t4_nrxq_vi = -NRXQ_VI;
313 0, "Reserve TX queue 0 of each VI for non-flowid packets");
317 static int t4_nofldtxq = -NOFLDTXQ;
322 static int t4_nofldrxq = -NOFLDRXQ;
327 static int t4_nofldtxq_vi = -NOFLDTXQ_VI;
332 static int t4_nofldrxq_vi = -NOFLDRXQ_VI;
341 #define PKTC_IDX_OFLD (-1)
346 /* 0 means chip/fw default, non-zero number is value in microseconds */
351 /* 0 means chip/fw default, non-zero number is value in microseconds */
356 /* 0 means chip/fw default, non-zero number is # of keepalives before abort */
361 /* 0 means chip/fw default, non-zero number is value in microseconds */
366 /* 0 means chip/fw default, non-zero number is value in microseconds */
371 /* 0 means chip/fw default, non-zero number is # of rexmt before abort */
376 /* -1 means chip/fw default, other values are raw backoff values to use */
378 -1, -1, -1, -1, -1, -1, -1, -1, -1, -1, -1, -1, -1, -1, -1, -1
434 static int t4_nnmtxq = -NNMTXQ;
439 static int t4_nnmrxq = -NNMRXQ;
444 static int t4_nnmtxq_vi = -NNMTXQ_VI;
449 static int t4_nnmrxq_vi = -NNMRXQ_VI;
463 #define PKTC_IDX (-1)
481 * Interrupt types allowed (bits 0, 1, 2 = INTx, MSI, MSI-X respectively).
485 0, "Interrupt types allowed (bit 0 = INTx, 1 = MSI, 2 = MSI-X)");
491 #define BUILTIN_CF "built-in"
515 * -1 to run with the firmware default. Same as FEC_AUTO (bit 5)
518 static int t4_fec = -1;
526 * -1 to set FORCE_FEC iff requested_fec != AUTO. Multiple FEC bits are okay.
533 static int t4_force_fec = -1;
539 * -1 to run with the firmware default.
543 static int t4_autoneg = -1;
548 * Firmware auto-install by driver during attach (0, 1, 2 = prohibited, allowed,
549 * encouraged respectively). '-n' is the same as 'n' except the firmware
554 "Firmware auto-install (0 = prohibited, 1 = allowed, 2 = encouraged)");
583 static int t4_toecaps_allowed = -1;
587 static int t4_rdmacaps_allowed = -1;
591 static int t4_cryptocaps_allowed = -1;
595 static int t4_iscsicaps_allowed = -1;
618 * -1: driver should figure out a good value.
623 static int pcie_relaxed_ordering = -1;
645 * Set to non-zero to enable the attack filter. A packet that matches any of
728 uint16_t intr_type; /* INTx, MSI, or MSI-X */
895 {0x4400, "Chelsio T440-dbg"},
896 {0x4401, "Chelsio T420-CR"},
897 {0x4402, "Chelsio T422-CR"},
898 {0x4403, "Chelsio T440-CR"},
899 {0x4404, "Chelsio T420-BCH"},
900 {0x4405, "Chelsio T440-BCH"},
901 {0x4406, "Chelsio T440-CH"},
902 {0x4407, "Chelsio T420-SO"},
903 {0x4408, "Chelsio T420-CX"},
904 {0x4409, "Chelsio T420-BT"},
905 {0x440a, "Chelsio T404-BT"},
906 {0x440e, "Chelsio T440-LP-CR"},
909 {0x5400, "Chelsio T580-dbg"},
910 {0x5401, "Chelsio T520-CR"}, /* 2 x 10G */
911 {0x5402, "Chelsio T522-CR"}, /* 2 x 10G, 2 X 1G */
912 {0x5403, "Chelsio T540-CR"}, /* 4 x 10G */
913 {0x5407, "Chelsio T520-SO"}, /* 2 x 10G, nomem */
914 {0x5409, "Chelsio T520-BT"}, /* 2 x 10GBaseT */
915 {0x540a, "Chelsio T504-BT"}, /* 4 x 1G */
916 {0x540d, "Chelsio T580-CR"}, /* 2 x 40G */
917 {0x540e, "Chelsio T540-LP-CR"}, /* 4 x 10G */
918 {0x5410, "Chelsio T580-LP-CR"}, /* 2 x 40G */
919 {0x5411, "Chelsio T520-LL-CR"}, /* 2 x 10G */
920 {0x5412, "Chelsio T560-CR"}, /* 1 x 40G, 2 x 10G */
921 {0x5414, "Chelsio T580-LP-SO-CR"}, /* 2 x 40G, nomem */
922 {0x5415, "Chelsio T502-BT"}, /* 2 x 1G */
923 {0x5418, "Chelsio T540-BT"}, /* 4 x 10GBaseT */
924 {0x5419, "Chelsio T540-LP-BT"}, /* 4 x 10GBaseT */
925 {0x541a, "Chelsio T540-SO-BT"}, /* 4 x 10GBaseT, nomem */
926 {0x541b, "Chelsio T540-SO-CR"}, /* 4 x 10G, nomem */
929 {0x5483, "Custom T540-CR"},
930 {0x5484, "Custom T540-BT"},
933 {0x6400, "Chelsio T6-DBG-25"}, /* 2 x 10/25G, debug */
934 {0x6401, "Chelsio T6225-CR"}, /* 2 x 10/25G */
935 {0x6402, "Chelsio T6225-SO-CR"}, /* 2 x 10/25G, nomem */
936 {0x6403, "Chelsio T6425-CR"}, /* 4 x 10/25G */
937 {0x6404, "Chelsio T6425-SO-CR"}, /* 4 x 10/25G, nomem */
938 {0x6405, "Chelsio T6225-OCP-SO"}, /* 2 x 10/25G, nomem */
939 {0x6406, "Chelsio T62100-OCP-SO"}, /* 2 x 40/50/100G, nomem */
940 {0x6407, "Chelsio T62100-LP-CR"}, /* 2 x 40/50/100G */
941 {0x6408, "Chelsio T62100-SO-CR"}, /* 2 x 40/50/100G, nomem */
942 {0x6409, "Chelsio T6210-BT"}, /* 2 x 10GBASE-T */
943 {0x640d, "Chelsio T62100-CR"}, /* 2 x 40/50/100G */
944 {0x6410, "Chelsio T6-DBG-100"}, /* 2 x 40/50/100G, debug */
945 {0x6411, "Chelsio T6225-LL-CR"}, /* 2 x 10/25G */
946 {0x6414, "Chelsio T61100-OCP-SO"}, /* 1 x 40/50/100G, nomem */
947 {0x6415, "Chelsio T6201-BT"}, /* 2 x 1000BASE-T */
950 {0x6480, "Custom T6225-CR"},
951 {0x6481, "Custom T62100-CR"},
952 {0x6482, "Custom T6225-CR"},
953 {0x6483, "Custom T62100-CR"},
954 {0x6484, "Custom T64100-CR"},
955 {0x6485, "Custom T6240-SO"},
956 {0x6486, "Custom T6225-SO-CR"},
957 {0x6487, "Custom T6225-CR"},
1098 if (id >= CHELSIO_T4 && id - CHELSIO_T4 < nitems(devnames)) in t4_init_devnames()
1099 sc->names = &devnames[id - CHELSIO_T4]; in t4_init_devnames()
1101 device_printf(sc->dev, "chip id %d is not supported.\n", id); in t4_init_devnames()
1102 sc->names = NULL; in t4_init_devnames()
1114 parent = device_get_nameunit(sc->dev); in t4_ifnet_unit()
1115 name = sc->names->ifnet_name; in t4_ifnet_unit()
1118 value == pi->port_id) in t4_ifnet_unit()
1121 return (-1); in t4_ifnet_unit()
1139 cur = &sc->cal_info[sc->cal_current]; in t4_calibration()
1140 next_up = (sc->cal_current + 1) % CNT_CAL_INFO; in t4_calibration()
1141 nex = &sc->cal_info[next_up]; in t4_calibration()
1142 if (__predict_false(sc->cal_count == 0)) { in t4_calibration()
1144 cur->hw_cur = hw; in t4_calibration()
1145 cur->sbt_cur = sbt; in t4_calibration()
1146 sc->cal_count++; in t4_calibration()
1150 if (cur->hw_cur == hw) { in t4_calibration()
1152 sc->cal_count = 0; in t4_calibration()
1153 atomic_store_rel_int(&cur->gen, 0); in t4_calibration()
1157 seqc_write_begin(&nex->gen); in t4_calibration()
1158 nex->hw_prev = cur->hw_cur; in t4_calibration()
1159 nex->sbt_prev = cur->sbt_cur; in t4_calibration()
1160 nex->hw_cur = hw; in t4_calibration()
1161 nex->sbt_cur = sbt; in t4_calibration()
1162 seqc_write_end(&nex->gen); in t4_calibration()
1163 sc->cal_current = next_up; in t4_calibration()
1165 callout_reset_sbt_curcpu(&sc->cal_callout, SBT_1S, 0, t4_calibration, in t4_calibration()
1180 sc->cal_info[i].gen = 0; in t4_calibration_start()
1182 sc->cal_current = 0; in t4_calibration_start()
1183 sc->cal_count = 0; in t4_calibration_start()
1184 sc->cal_gen = 0; in t4_calibration_start()
1209 sc->dev = dev; in t4_attach()
1210 sysctl_ctx_init(&sc->ctx); in t4_attach()
1211 TUNABLE_INT_FETCH("hw.cxgbe.dflags", &sc->debug_flags); in t4_attach()
1221 sc->params.pci.mps = 128 << ((v & PCIEM_CTL_MAX_PAYLOAD) >> 5); in t4_attach()
1233 sc->sge_gts_reg = MYPF_REG(A_SGE_PF_GTS); in t4_attach()
1234 sc->sge_kdoorbell_reg = MYPF_REG(A_SGE_PF_KDOORBELL); in t4_attach()
1235 sc->traceq = -1; in t4_attach()
1236 mtx_init(&sc->ifp_lock, sc->ifp_lockname, 0, MTX_DEF); in t4_attach()
1237 snprintf(sc->ifp_lockname, sizeof(sc->ifp_lockname), "%s tracer", in t4_attach()
1240 snprintf(sc->lockname, sizeof(sc->lockname), "%s", in t4_attach()
1242 mtx_init(&sc->sc_lock, sc->lockname, 0, MTX_DEF); in t4_attach()
1245 mtx_init(&sc->sfl_lock, "starving freelists", 0, MTX_DEF); in t4_attach()
1246 TAILQ_INIT(&sc->sfl); in t4_attach()
1247 callout_init_mtx(&sc->sfl_callout, &sc->sfl_lock, 0); in t4_attach()
1249 mtx_init(&sc->reg_lock, "indirect register access", 0, MTX_DEF); in t4_attach()
1251 sc->policy = NULL; in t4_attach()
1252 rw_init(&sc->policy_lock, "connection offload policy"); in t4_attach()
1254 callout_init(&sc->ktls_tick, 1); in t4_attach()
1256 callout_init(&sc->cal_callout, 1); in t4_attach()
1258 refcount_init(&sc->vxlan_refcount, 0); in t4_attach()
1260 TASK_INIT(&sc->reset_task, 0, reset_adapter_task, sc); in t4_attach()
1261 TASK_INIT(&sc->fatal_error_task, 0, fatal_error_task, sc); in t4_attach()
1263 sc->ctrlq_oid = SYSCTL_ADD_NODE(&sc->ctx, in t4_attach()
1264 SYSCTL_CHILDREN(device_get_sysctl_tree(sc->dev)), OID_AUTO, "ctrlq", in t4_attach()
1266 sc->fwq_oid = SYSCTL_ADD_NODE(&sc->ctx, in t4_attach()
1267 SYSCTL_CHILDREN(device_get_sysctl_tree(sc->dev)), OID_AUTO, "fwq", in t4_attach()
1274 memset(sc->chan_map, 0xff, sizeof(sc->chan_map)); in t4_attach()
1278 rc = -t4_prep_adapter(sc, buf); in t4_attach()
1292 sc->pf = chip_id(sc) <= CHELSIO_T5 ? G_SOURCEPF(j) : G_T6_SOURCEPF(j); in t4_attach()
1293 sc->mbox = sc->pf; in t4_attach()
1296 if (sc->names == NULL) { in t4_attach()
1315 rc = make_dev_s(&mda, &sc->cdev, "%s", device_get_nameunit(dev)); in t4_attach()
1338 MPASS(sc->flags & FW_OK); in t4_attach()
1344 if (sc->flags & MASTER_PF) { in t4_attach()
1371 * First pass over all the ports - allocate VIs and initialize some in t4_attach()
1378 sc->port[i] = pi; in t4_attach()
1381 pi->adapter = sc; in t4_attach()
1382 pi->port_id = i; in t4_attach()
1385 * pi->nvi's final value is known. in t4_attach()
1387 pi->vi = malloc(sizeof(struct vi_info) * t4_num_vis, M_CXGBE, in t4_attach()
1394 rc = -t4_port_init(sc, sc->mbox, sc->pf, 0, i); in t4_attach()
1398 free(pi->vi, M_CXGBE); in t4_attach()
1400 sc->port[i] = NULL; in t4_attach()
1404 if (is_bt(pi->port_type)) in t4_attach()
1405 setbit(&sc->bt_map, pi->tx_chan); in t4_attach()
1407 MPASS(!isset(&sc->bt_map, pi->tx_chan)); in t4_attach()
1409 snprintf(pi->lockname, sizeof(pi->lockname), "%sp%d", in t4_attach()
1411 mtx_init(&pi->pi_lock, pi->lockname, 0, MTX_DEF); in t4_attach()
1412 sc->chan_map[pi->tx_chan] = i; in t4_attach()
1421 pi->fcs_reg = -1; in t4_attach()
1423 pi->fcs_reg = t4_port_reg(sc, pi->tx_chan, in t4_attach()
1426 pi->fcs_base = 0; in t4_attach()
1429 ifmedia_init(&pi->media, IFM_IMASK, cxgbe_media_change, in t4_attach()
1437 pi->flags |= FIXED_IFMEDIA; in t4_attach()
1440 pi->dev = device_add_child(dev, sc->names->ifnet_name, in t4_attach()
1442 if (pi->dev == NULL) { in t4_attach()
1448 pi->vi[0].dev = pi->dev; in t4_attach()
1449 device_set_softc(pi->dev, pi); in t4_attach()
1455 nports = sc->params.nports; in t4_attach()
1461 sc->intr_type = iaq.intr_type; in t4_attach()
1462 sc->intr_count = iaq.nirq; in t4_attach()
1464 s = &sc->sge; in t4_attach()
1465 s->nrxq = nports * iaq.nrxq; in t4_attach()
1466 s->ntxq = nports * iaq.ntxq; in t4_attach()
1468 s->nrxq += nports * (num_vis - 1) * iaq.nrxq_vi; in t4_attach()
1469 s->ntxq += nports * (num_vis - 1) * iaq.ntxq_vi; in t4_attach()
1471 s->neq = s->ntxq + s->nrxq; /* the free list in an rxq is an eq */ in t4_attach()
1472 s->neq += nports; /* ctrl queues: 1 per port */ in t4_attach()
1473 s->niq = s->nrxq + 1; /* 1 extra for firmware event queue */ in t4_attach()
1476 s->nofldtxq = nports * iaq.nofldtxq; in t4_attach()
1478 s->nofldtxq += nports * (num_vis - 1) * iaq.nofldtxq_vi; in t4_attach()
1479 s->neq += s->nofldtxq; in t4_attach()
1481 s->ofld_txq = malloc(s->nofldtxq * sizeof(struct sge_ofld_txq), in t4_attach()
1487 s->nofldrxq = nports * iaq.nofldrxq; in t4_attach()
1489 s->nofldrxq += nports * (num_vis - 1) * iaq.nofldrxq_vi; in t4_attach()
1490 s->neq += s->nofldrxq; /* free list */ in t4_attach()
1491 s->niq += s->nofldrxq; in t4_attach()
1493 s->ofld_rxq = malloc(s->nofldrxq * sizeof(struct sge_ofld_rxq), in t4_attach()
1498 s->nnmrxq = 0; in t4_attach()
1499 s->nnmtxq = 0; in t4_attach()
1501 s->nnmrxq += nports * iaq.nnmrxq; in t4_attach()
1502 s->nnmtxq += nports * iaq.nnmtxq; in t4_attach()
1505 s->nnmrxq += nports * (num_vis - 1) * iaq.nnmrxq_vi; in t4_attach()
1506 s->nnmtxq += nports * (num_vis - 1) * iaq.nnmtxq_vi; in t4_attach()
1508 s->neq += s->nnmtxq + s->nnmrxq; in t4_attach()
1509 s->niq += s->nnmrxq; in t4_attach()
1511 s->nm_rxq = malloc(s->nnmrxq * sizeof(struct sge_nm_rxq), in t4_attach()
1513 s->nm_txq = malloc(s->nnmtxq * sizeof(struct sge_nm_txq), in t4_attach()
1516 MPASS(s->niq <= s->iqmap_sz); in t4_attach()
1517 MPASS(s->neq <= s->eqmap_sz); in t4_attach()
1519 s->ctrlq = malloc(nports * sizeof(struct sge_wrq), M_CXGBE, in t4_attach()
1521 s->rxq = malloc(s->nrxq * sizeof(struct sge_rxq), M_CXGBE, in t4_attach()
1523 s->txq = malloc(s->ntxq * sizeof(struct sge_txq), M_CXGBE, in t4_attach()
1525 s->iqmap = malloc(s->iqmap_sz * sizeof(struct sge_iq *), M_CXGBE, in t4_attach()
1527 s->eqmap = malloc(s->eqmap_sz * sizeof(struct sge_eq *), M_CXGBE, in t4_attach()
1530 sc->irq = malloc(sc->intr_count * sizeof(struct irq), M_CXGBE, in t4_attach()
1543 if (sc->vres.key.size != 0) in t4_attach()
1544 sc->key_map = vmem_create("T4TLS key map", sc->vres.key.start, in t4_attach()
1545 sc->vres.key.size, 32, 0, M_FIRSTFIT | M_WAITOK); in t4_attach()
1562 struct port_info *pi = sc->port[i]; in t4_attach()
1568 pi->nvi = num_vis; in t4_attach()
1570 vi->pi = pi; in t4_attach()
1571 vi->adapter = sc; in t4_attach()
1572 vi->first_intr = -1; in t4_attach()
1573 vi->qsize_rxq = t4_qsize_rxq; in t4_attach()
1574 vi->qsize_txq = t4_qsize_txq; in t4_attach()
1576 vi->first_rxq = rqidx; in t4_attach()
1577 vi->first_txq = tqidx; in t4_attach()
1578 vi->tmr_idx = t4_tmr_idx; in t4_attach()
1579 vi->pktc_idx = t4_pktc_idx; in t4_attach()
1580 vi->nrxq = j == 0 ? iaq.nrxq : iaq.nrxq_vi; in t4_attach()
1581 vi->ntxq = j == 0 ? iaq.ntxq : iaq.ntxq_vi; in t4_attach()
1583 rqidx += vi->nrxq; in t4_attach()
1584 tqidx += vi->ntxq; in t4_attach()
1586 if (j == 0 && vi->ntxq > 1) in t4_attach()
1587 vi->rsrv_noflowq = t4_rsrv_noflowq ? 1 : 0; in t4_attach()
1589 vi->rsrv_noflowq = 0; in t4_attach()
1592 vi->first_ofld_txq = ofld_tqidx; in t4_attach()
1593 vi->nofldtxq = j == 0 ? iaq.nofldtxq : iaq.nofldtxq_vi; in t4_attach()
1594 ofld_tqidx += vi->nofldtxq; in t4_attach()
1597 vi->ofld_tmr_idx = t4_tmr_idx_ofld; in t4_attach()
1598 vi->ofld_pktc_idx = t4_pktc_idx_ofld; in t4_attach()
1599 vi->first_ofld_rxq = ofld_rqidx; in t4_attach()
1600 vi->nofldrxq = j == 0 ? iaq.nofldrxq : iaq.nofldrxq_vi; in t4_attach()
1602 ofld_rqidx += vi->nofldrxq; in t4_attach()
1605 vi->first_nm_rxq = nm_rqidx; in t4_attach()
1606 vi->first_nm_txq = nm_tqidx; in t4_attach()
1608 vi->nnmrxq = iaq.nnmrxq; in t4_attach()
1609 vi->nnmtxq = iaq.nnmtxq; in t4_attach()
1611 vi->nnmrxq = iaq.nnmrxq_vi; in t4_attach()
1612 vi->nnmtxq = iaq.nnmtxq_vi; in t4_attach()
1614 nm_rqidx += vi->nnmrxq; in t4_attach()
1615 nm_tqidx += vi->nnmtxq; in t4_attach()
1634 * Ensure thread-safe mailbox access (in debug builds). in t4_attach()
1640 sc->flags |= CHK_MBOX_ACCESS; in t4_attach()
1652 sc->params.pci.speed, sc->params.pci.width, sc->params.nports, in t4_attach()
1653 sc->intr_count, sc->intr_type == INTR_MSIX ? "MSI-X" : in t4_attach()
1654 (sc->intr_type == INTR_MSI ? "MSI" : "INTx"), in t4_attach()
1655 sc->intr_count > 1 ? "s" : "", sc->sge.neq, sc->sge.niq); in t4_attach()
1662 if (rc != 0 && sc->cdev) { in t4_attach()
1686 pi = sc->port[i]; in t4_child_location()
1687 if (pi != NULL && pi->dev == dev) { in t4_child_location()
1688 sbuf_printf(sb, "port=%d", pi->port_id); in t4_child_location()
1701 if (sc->flags & FW_OK) in t4_ready()
1715 pi = sc->port[port]; in t4_read_port_device()
1716 if (pi == NULL || pi->dev == NULL) in t4_read_port_device()
1718 *child = pi->dev; in t4_read_port_device()
1782 if (sc->cdev) { in t4_detach_common()
1783 destroy_dev(sc->cdev); in t4_detach_common()
1784 sc->cdev = NULL; in t4_detach_common()
1791 sc->flags &= ~CHK_MBOX_ACCESS; in t4_detach_common()
1792 if (sc->flags & FULL_INIT_DONE) { in t4_detach_common()
1793 if (!(sc->flags & IS_VF)) in t4_detach_common()
1806 for (i = 0; i < sc->intr_count; i++) in t4_detach_common()
1807 t4_free_irq(sc, &sc->irq[i]); in t4_detach_common()
1809 if ((sc->flags & (IS_VF | FW_OK)) == FW_OK) in t4_detach_common()
1813 pi = sc->port[i]; in t4_detach_common()
1815 t4_free_vi(sc, sc->mbox, sc->pf, 0, pi->vi[0].viid); in t4_detach_common()
1816 if (pi->dev) in t4_detach_common()
1817 device_delete_child(dev, pi->dev); in t4_detach_common()
1819 mtx_destroy(&pi->pi_lock); in t4_detach_common()
1820 free(pi->vi, M_CXGBE); in t4_detach_common()
1824 callout_stop(&sc->cal_callout); in t4_detach_common()
1825 callout_drain(&sc->cal_callout); in t4_detach_common()
1827 sysctl_ctx_free(&sc->ctx); in t4_detach_common()
1830 if ((sc->flags & (IS_VF | FW_OK)) == FW_OK) in t4_detach_common()
1831 t4_fw_bye(sc, sc->mbox); in t4_detach_common()
1833 if (sc->intr_type == INTR_MSI || sc->intr_type == INTR_MSIX) in t4_detach_common()
1836 if (sc->regs_res) in t4_detach_common()
1837 bus_release_resource(dev, SYS_RES_MEMORY, sc->regs_rid, in t4_detach_common()
1838 sc->regs_res); in t4_detach_common()
1840 if (sc->udbs_res) in t4_detach_common()
1841 bus_release_resource(dev, SYS_RES_MEMORY, sc->udbs_rid, in t4_detach_common()
1842 sc->udbs_res); in t4_detach_common()
1844 if (sc->msix_res) in t4_detach_common()
1845 bus_release_resource(dev, SYS_RES_MEMORY, sc->msix_rid, in t4_detach_common()
1846 sc->msix_res); in t4_detach_common()
1848 if (sc->l2t) in t4_detach_common()
1850 if (sc->smt) in t4_detach_common()
1851 t4_free_smt(sc->smt); in t4_detach_common()
1856 if (sc->key_map) in t4_detach_common()
1857 vmem_destroy(sc->key_map); in t4_detach_common()
1863 free(sc->sge.ofld_txq, M_CXGBE); in t4_detach_common()
1866 free(sc->sge.ofld_rxq, M_CXGBE); in t4_detach_common()
1869 free(sc->sge.nm_rxq, M_CXGBE); in t4_detach_common()
1870 free(sc->sge.nm_txq, M_CXGBE); in t4_detach_common()
1872 free(sc->irq, M_CXGBE); in t4_detach_common()
1873 free(sc->sge.rxq, M_CXGBE); in t4_detach_common()
1874 free(sc->sge.txq, M_CXGBE); in t4_detach_common()
1875 free(sc->sge.ctrlq, M_CXGBE); in t4_detach_common()
1876 free(sc->sge.iqmap, M_CXGBE); in t4_detach_common()
1877 free(sc->sge.eqmap, M_CXGBE); in t4_detach_common()
1878 free(sc->tids.ftid_tab, M_CXGBE); in t4_detach_common()
1879 free(sc->tids.hpftid_tab, M_CXGBE); in t4_detach_common()
1880 free_hftid_hash(&sc->tids); in t4_detach_common()
1881 free(sc->tids.tid_tab, M_CXGBE); in t4_detach_common()
1884 callout_drain(&sc->ktls_tick); in t4_detach_common()
1885 callout_drain(&sc->sfl_callout); in t4_detach_common()
1886 if (mtx_initialized(&sc->tids.ftid_lock)) { in t4_detach_common()
1887 mtx_destroy(&sc->tids.ftid_lock); in t4_detach_common()
1888 cv_destroy(&sc->tids.ftid_cv); in t4_detach_common()
1890 if (mtx_initialized(&sc->tids.atid_lock)) in t4_detach_common()
1891 mtx_destroy(&sc->tids.atid_lock); in t4_detach_common()
1892 if (mtx_initialized(&sc->ifp_lock)) in t4_detach_common()
1893 mtx_destroy(&sc->ifp_lock); in t4_detach_common()
1895 if (rw_initialized(&sc->policy_lock)) { in t4_detach_common()
1896 rw_destroy(&sc->policy_lock); in t4_detach_common()
1898 if (sc->policy != NULL) in t4_detach_common()
1899 free_offload_policy(sc->policy); in t4_detach_common()
1904 struct memwin *mw = &sc->memwin[i]; in t4_detach_common()
1906 if (rw_initialized(&mw->mw_lock)) in t4_detach_common()
1907 rw_destroy(&mw->mw_lock); in t4_detach_common()
1910 mtx_destroy(&sc->sfl_lock); in t4_detach_common()
1911 mtx_destroy(&sc->reg_lock); in t4_detach_common()
1912 mtx_destroy(&sc->sc_lock); in t4_detach_common()
1925 if (atomic_testandset_int(&sc->error_flags, ilog2(ADAP_STOPPED))) { in stop_adapter()
1927 __func__, curthread, sc->flags, sc->error_flags); in stop_adapter()
1931 sc->flags, sc->error_flags); in stop_adapter()
1934 pi = sc->port[i]; in stop_adapter()
1936 if (pi->up_vis > 0 && pi->link_cfg.link_ok) { in stop_adapter()
1943 pi->link_cfg.link_ok = false; in stop_adapter()
1957 if (!atomic_testandclear_int(&sc->error_flags, ilog2(ADAP_STOPPED))) { in restart_adapter()
1959 __func__, curthread, sc->flags, sc->error_flags); in restart_adapter()
1963 sc->flags, sc->error_flags); in restart_adapter()
1966 MPASS((sc->flags & FW_OK) == 0); in restart_adapter()
1967 MPASS((sc->flags & MASTER_PF) == 0); in restart_adapter()
1968 MPASS(sc->reset_thread == NULL); in restart_adapter()
1975 sc->reset_thread = curthread; in restart_adapter()
1979 sc->reset_thread = NULL; in restart_adapter()
1980 atomic_set_int(&sc->error_flags, ADAP_STOPPED); in restart_adapter()
1983 atomic_clear_int(&sc->error_flags, ADAP_FATAL_ERR); in restart_adapter()
1984 atomic_add_int(&sc->incarnation, 1); in restart_adapter()
1985 atomic_add_int(&sc->num_resets, 1); in restart_adapter()
1996 MPASS(sc->reset_thread == curthread); in set_adapter_hwstatus()
1997 mtx_lock(&sc->reg_lock); in set_adapter_hwstatus()
1998 atomic_clear_int(&sc->error_flags, HW_OFF_LIMITS); in set_adapter_hwstatus()
1999 mtx_unlock(&sc->reg_lock); in set_adapter_hwstatus()
2003 mtx_lock(&sc->reg_lock); in set_adapter_hwstatus()
2004 atomic_set_int(&sc->error_flags, HW_OFF_LIMITS); in set_adapter_hwstatus()
2005 mtx_unlock(&sc->reg_lock); in set_adapter_hwstatus()
2006 sc->flags &= ~(FW_OK | MASTER_PF); in set_adapter_hwstatus()
2007 sc->reset_thread = NULL; in set_adapter_hwstatus()
2045 pi = sc->port[i]; in stop_lld()
2046 pi->vxlan_tcam_entry = false; in stop_lld()
2048 vi->xact_addr_filt = -1; in stop_lld()
2049 mtx_lock(&vi->tick_mtx); in stop_lld()
2050 vi->flags |= VI_SKIP_STATS; in stop_lld()
2051 mtx_unlock(&vi->tick_mtx); in stop_lld()
2052 if (!(vi->flags & VI_INIT_DONE)) in stop_lld()
2055 ifp = vi->ifp; in stop_lld()
2057 mtx_lock(&vi->tick_mtx); in stop_lld()
2058 callout_stop(&vi->tick); in stop_lld()
2059 mtx_unlock(&vi->tick_mtx); in stop_lld()
2060 callout_drain(&vi->tick); in stop_lld()
2068 txq->eq.flags &= ~(EQ_ENABLED | EQ_HW_ALLOCATED); in stop_lld()
2073 TXQ_LOCK(&ofld_txq->wrq); in stop_lld()
2074 ofld_txq->wrq.eq.flags &= ~EQ_HW_ALLOCATED; in stop_lld()
2075 TXQ_UNLOCK(&ofld_txq->wrq); in stop_lld()
2079 rxq->iq.flags &= ~IQ_HW_ALLOCATED; in stop_lld()
2083 ofld_rxq->iq.flags &= ~IQ_HW_ALLOCATED; in stop_lld()
2090 if (sc->flags & FULL_INIT_DONE) { in stop_lld()
2092 wrq = &sc->sge.ctrlq[i]; in stop_lld()
2094 wrq->eq.flags &= ~EQ_HW_ALLOCATED; in stop_lld()
2099 if (pi->flags & HAS_TRACEQ) { in stop_lld()
2100 pi->flags &= ~HAS_TRACEQ; in stop_lld()
2101 sc->traceq = -1; in stop_lld()
2102 sc->tracer_valid = 0; in stop_lld()
2103 sc->tracer_enabled = 0; in stop_lld()
2106 if (sc->flags & FULL_INIT_DONE) { in stop_lld()
2108 sc->sge.fwq.flags &= ~IQ_HW_ALLOCATED; in stop_lld()
2109 quiesce_iq_fl(sc, &sc->sge.fwq, NULL); in stop_lld()
2113 callout_stop(&sc->cal_callout); in stop_lld()
2114 callout_drain(&sc->cal_callout); in stop_lld()
2187 o->flags = sc->flags; in save_caps_and_params()
2189 o->nbmcaps = sc->nbmcaps; in save_caps_and_params()
2190 o->linkcaps = sc->linkcaps; in save_caps_and_params()
2191 o->switchcaps = sc->switchcaps; in save_caps_and_params()
2192 o->niccaps = sc->niccaps; in save_caps_and_params()
2193 o->toecaps = sc->toecaps; in save_caps_and_params()
2194 o->rdmacaps = sc->rdmacaps; in save_caps_and_params()
2195 o->cryptocaps = sc->cryptocaps; in save_caps_and_params()
2196 o->iscsicaps = sc->iscsicaps; in save_caps_and_params()
2197 o->fcoecaps = sc->fcoecaps; in save_caps_and_params()
2199 o->cfcsum = sc->cfcsum; in save_caps_and_params()
2200 MPASS(sizeof(o->cfg_file) == sizeof(sc->cfg_file)); in save_caps_and_params()
2201 memcpy(o->cfg_file, sc->cfg_file, sizeof(o->cfg_file)); in save_caps_and_params()
2203 o->params = sc->params; in save_caps_and_params()
2204 o->vres = sc->vres; in save_caps_and_params()
2205 o->tids = sc->tids; in save_caps_and_params()
2206 o->sge = sc->sge; in save_caps_and_params()
2208 o->rawf_base = sc->rawf_base; in save_caps_and_params()
2209 o->nrawf = sc->nrawf; in save_caps_and_params()
2221 if (o->c##caps != sc->c##caps) { \ in compare_caps_and_params()
2222 CH_ERR(sc, "%scaps 0x%04x -> 0x%04x.\n", #c, o->c##caps, \ in compare_caps_and_params()
2223 sc->c##caps); \ in compare_caps_and_params()
2239 if (o->cfcsum != sc->cfcsum) { in compare_caps_and_params()
2240 CH_ERR(sc, "config file %s (0x%x) -> %s (0x%x)\n", o->cfg_file, in compare_caps_and_params()
2241 o->cfcsum, sc->cfg_file, sc->cfcsum); in compare_caps_and_params()
2246 if (o->p != sc->p) { \ in compare_caps_and_params()
2247 CH_ERR(sc, #name " %d -> %d\n", o->p, sc->p); \ in compare_caps_and_params()
2339 MPASS(sc->flags & FW_OK); in restart_lld()
2341 if (sc->flags & MASTER_PF) { in restart_lld()
2360 pi = sc->port[i]; in restart_lld()
2362 MPASS(pi->vi != NULL); in restart_lld()
2363 MPASS(pi->vi[0].dev == pi->dev); in restart_lld()
2365 rc = -t4_port_init(sc, sc->mbox, sc->pf, 0, i); in restart_lld()
2368 "failed to re-initialize port %d: %d\n", i, rc); in restart_lld()
2371 MPASS(sc->chan_map[pi->tx_chan] == i); in restart_lld()
2383 "failed to re-allocate extra VI: %d\n", rc); in restart_lld()
2396 if (sc->flags & FULL_INIT_DONE) { in restart_lld()
2399 CH_ERR(sc, "failed to re-initialize adapter: %d\n", rc); in restart_lld()
2403 if (sc->vxlan_refcount > 0) in restart_lld()
2407 pi = sc->port[i]; in restart_lld()
2409 mtx_lock(&vi->tick_mtx); in restart_lld()
2410 vi->flags &= ~VI_SKIP_STATS; in restart_lld()
2411 mtx_unlock(&vi->tick_mtx); in restart_lld()
2412 if (!(vi->flags & VI_INIT_DONE)) in restart_lld()
2416 CH_ERR(vi, "failed to re-initialize " in restart_lld()
2420 if (sc->traceq < 0 && IS_MAIN_VI(vi)) { in restart_lld()
2421 sc->traceq = sc->sge.rxq[vi->first_rxq].iq.abs_id; in restart_lld()
2425 V_RSSCONTROL(pi->tx_chan) | in restart_lld()
2426 V_QUEUENUMBER(sc->traceq)); in restart_lld()
2427 pi->flags |= HAS_TRACEQ; in restart_lld()
2430 ifp = vi->ifp; in restart_lld()
2442 CH_ERR(vi, "failed to re-configure MAC: %d\n", rc); in restart_lld()
2445 rc = -t4_enable_vi(sc, sc->mbox, vi->viid, true, in restart_lld()
2448 CH_ERR(vi, "failed to re-enable VI: %d\n", rc); in restart_lld()
2453 txq->eq.flags |= EQ_ENABLED; in restart_lld()
2456 mtx_lock(&vi->tick_mtx); in restart_lld()
2457 callout_schedule(&vi->tick, hz); in restart_lld()
2458 mtx_unlock(&vi->tick_mtx); in restart_lld()
2461 if (pi->up_vis > 0) { in restart_lld()
2466 if (pi->link_cfg.link_ok) in restart_lld()
2474 pi = sc->port[i]; in restart_lld()
2476 if (!(vi->flags & VI_INIT_DONE)) in restart_lld()
2478 ifp = vi->ifp; in restart_lld()
2483 CH_ERR(vi, "failed to re-configure MCAST MACs: %d\n", rc); in restart_lld()
2550 rc = BUS_RESET_CHILD(device_get_parent(sc->dev), sc->dev, 0); in reset_adapter_with_pci_bus_reset()
2561 MPASS(sc->error_flags & HW_OFF_LIMITS); in reset_adapter_with_pl_rst()
2562 bus_space_write_4(sc->bt, sc->bh, A_PL_RST, in reset_adapter_with_pl_rst()
2584 const int flags = sc->flags; in reset_adapter_task()
2585 const int eflags = sc->error_flags; in reset_adapter_task()
2593 "flags 0x%08x -> 0x%08x, err_flags 0x%08x -> 0x%08x.\n", in reset_adapter_task()
2594 rc, flags, sc->flags, eflags, sc->error_flags); in reset_adapter_task()
2603 device_set_descf(dev, "port %d", pi->port_id); in cxgbe_probe()
2619 struct sysctl_ctx_list *ctx = &vi->ctx; in cxgbe_vi_attach()
2622 struct adapter *sc = vi->adapter; in cxgbe_vi_attach()
2625 children = SYSCTL_CHILDREN(device_get_sysctl_tree(vi->dev)); in cxgbe_vi_attach()
2626 vi->rxq_oid = SYSCTL_ADD_NODE(ctx, children, OID_AUTO, "rxq", in cxgbe_vi_attach()
2628 vi->txq_oid = SYSCTL_ADD_NODE(ctx, children, OID_AUTO, "txq", in cxgbe_vi_attach()
2631 vi->nm_rxq_oid = SYSCTL_ADD_NODE(ctx, children, OID_AUTO, "nm_rxq", in cxgbe_vi_attach()
2633 vi->nm_txq_oid = SYSCTL_ADD_NODE(ctx, children, OID_AUTO, "nm_txq", in cxgbe_vi_attach()
2637 vi->ofld_rxq_oid = SYSCTL_ADD_NODE(ctx, children, OID_AUTO, "ofld_rxq", in cxgbe_vi_attach()
2641 vi->ofld_txq_oid = SYSCTL_ADD_NODE(ctx, children, OID_AUTO, "ofld_txq", in cxgbe_vi_attach()
2645 vi->xact_addr_filt = -1; in cxgbe_vi_attach()
2646 mtx_init(&vi->tick_mtx, "vi tick", NULL, MTX_DEF); in cxgbe_vi_attach()
2647 callout_init_mtx(&vi->tick, &vi->tick_mtx, 0); in cxgbe_vi_attach()
2648 if (sc->flags & IS_VF || t4_tx_vm_wr != 0) in cxgbe_vi_attach()
2649 vi->flags |= TX_USES_VM_WR; in cxgbe_vi_attach()
2653 vi->ifp = ifp; in cxgbe_vi_attach()
2663 if (vi->pi->nvi > 1 || sc->flags & IS_VF) in cxgbe_vi_attach()
2687 if (vi->nofldrxq != 0) in cxgbe_vi_attach()
2691 if (is_ethoffload(sc) && vi->nofldtxq != 0) { in cxgbe_vi_attach()
2698 if (vi->flags & TX_USES_VM_WR) in cxgbe_vi_attach()
2703 if (is_ethoffload(sc) && vi->nofldtxq != 0) in cxgbe_vi_attach()
2710 if (sc->flags & KERN_TLS_ON || !is_t6(sc)) in cxgbe_vi_attach()
2715 ether_ifattach(ifp, vi->hw_addr); in cxgbe_vi_attach()
2717 if (vi->nnmrxq != 0) in cxgbe_vi_attach()
2721 sbuf_printf(sb, "%d txq, %d rxq (NIC)", vi->ntxq, vi->nrxq); in cxgbe_vi_attach()
2725 sbuf_printf(sb, "; %d txq (TOE)", vi->nofldtxq); in cxgbe_vi_attach()
2728 sbuf_printf(sb, "; %d txq (TOE/ETHOFLD)", vi->nofldtxq); in cxgbe_vi_attach()
2731 sbuf_printf(sb, "; %d txq (ETHOFLD)", vi->nofldtxq); in cxgbe_vi_attach()
2737 sbuf_printf(sb, ", %d rxq (TOE)", vi->nofldrxq); in cxgbe_vi_attach()
2742 vi->nnmtxq, vi->nnmrxq); in cxgbe_vi_attach()
2754 vi->pfil = pfil_head_register(&pa); in cxgbe_vi_attach()
2761 struct adapter *sc = pi->adapter; in cxgbe_attach()
2765 sysctl_ctx_init(&pi->ctx); in cxgbe_attach()
2767 cxgbe_vi_attach(dev, &pi->vi[0]); in cxgbe_attach()
2772 vi->dev = device_add_child(dev, sc->names->vi_ifnet_name, DEVICE_UNIT_ANY); in cxgbe_attach()
2773 if (vi->dev == NULL) { in cxgbe_attach()
2777 device_set_softc(vi->dev, vi); in cxgbe_attach()
2790 if_t ifp = vi->ifp; in cxgbe_vi_detach()
2792 if (vi->pfil != NULL) { in cxgbe_vi_detach()
2793 pfil_head_unregister(vi->pfil); in cxgbe_vi_detach()
2794 vi->pfil = NULL; in cxgbe_vi_detach()
2805 callout_drain(&vi->tick); in cxgbe_vi_detach()
2806 mtx_destroy(&vi->tick_mtx); in cxgbe_vi_detach()
2807 sysctl_ctx_free(&vi->ctx); in cxgbe_vi_detach()
2810 if_free(vi->ifp); in cxgbe_vi_detach()
2811 vi->ifp = NULL; in cxgbe_vi_detach()
2818 struct adapter *sc = pi->adapter; in cxgbe_detach()
2827 sysctl_ctx_free(&pi->ctx); in cxgbe_detach()
2828 begin_vi_detach(sc, &pi->vi[0]); in cxgbe_detach()
2829 if (pi->flags & HAS_TRACEQ) { in cxgbe_detach()
2830 sc->traceq = -1; /* cloner should not create ifnet */ in cxgbe_detach()
2833 cxgbe_vi_detach(&pi->vi[0]); in cxgbe_detach()
2834 ifmedia_removeall(&pi->media); in cxgbe_detach()
2835 end_vi_detach(sc, &pi->vi[0]); in cxgbe_detach()
2844 struct adapter *sc = vi->adapter; in cxgbe_init()
2857 struct port_info *pi = vi->pi; in cxgbe_ioctl()
2858 struct adapter *sc = pi->adapter; in cxgbe_ioctl()
2864 mtu = ifr->ifr_mtu; in cxgbe_ioctl()
2872 if (vi->flags & VI_INIT_DONE) { in cxgbe_ioctl()
2893 flags = vi->if_flags; in cxgbe_ioctl()
2902 vi->if_flags = if_getflags(ifp); in cxgbe_ioctl()
2924 mask = ifr->ifr_reqcap ^ if_getcapenable(ifp); in cxgbe_ioctl()
2934 "tso4 disabled due to -txcsum.\n"); in cxgbe_ioctl()
2946 "tso6 disabled due to -txcsum6.\n"); in cxgbe_ioctl()
2986 rxq->iq.flags |= IQ_LRO_ENABLED; in cxgbe_ioctl()
2988 rxq->iq.flags &= ~IQ_LRO_ENABLED; in cxgbe_ioctl()
3011 /* Need to find out how to disable auto-mtu-inflation */ in cxgbe_ioctl()
3028 rxq->iq.flags |= IQ_RX_TIMESTAMP; in cxgbe_ioctl()
3030 rxq->iq.flags &= ~IQ_RX_TIMESTAMP; in cxgbe_ioctl()
3069 rc = ifmedia_ioctl(ifp, ifr, &pi->media, cmd); in cxgbe_ioctl()
3092 rc = -t4_i2c_rd(sc, sc->mbox, pi->port_id, i2c.dev_addr, in cxgbe_ioctl()
3111 struct port_info *pi = vi->pi; in cxgbe_transmit()
3118 MPASS(m->m_nextpkt == NULL); /* not quite ready for this yet */ in cxgbe_transmit()
3120 if (m->m_pkthdr.csum_flags & CSUM_SND_TAG) in cxgbe_transmit()
3121 MPASS(m->m_pkthdr.snd_tag->ifp == ifp); in cxgbe_transmit()
3124 if (__predict_false(pi->link_cfg.link_ok == false)) { in cxgbe_transmit()
3129 rc = parse_pkt(&m, vi->flags & TX_USES_VM_WR); in cxgbe_transmit()
3138 atomic_add_int(&pi->tx_parse_error, 1); /* rare, atomic is ok */ in cxgbe_transmit()
3143 sc = vi->adapter; in cxgbe_transmit()
3144 txq = &sc->sge.txq[vi->first_txq]; in cxgbe_transmit()
3146 txq += ((m->m_pkthdr.flowid % (vi->ntxq - vi->rsrv_noflowq)) + in cxgbe_transmit()
3147 vi->rsrv_noflowq); in cxgbe_transmit()
3150 rc = mp_ring_enqueue(txq->r, items, 1, 256); in cxgbe_transmit()
3165 if (vi->flags & VI_INIT_DONE) { in cxgbe_qflush()
3168 txq->eq.flags |= EQ_QFLUSH; in cxgbe_qflush()
3170 while (!mp_ring_is_idle(txq->r)) { in cxgbe_qflush()
3171 mp_ring_check_drainage(txq->r, 4096); in cxgbe_qflush()
3175 txq->eq.flags &= ~EQ_QFLUSH; in cxgbe_qflush()
3186 struct fw_vi_stats_vf *s = &vi->stats; in vi_get_counter()
3188 mtx_lock(&vi->tick_mtx); in vi_get_counter()
3190 mtx_unlock(&vi->tick_mtx); in vi_get_counter()
3194 return (s->rx_bcast_frames + s->rx_mcast_frames + in vi_get_counter()
3195 s->rx_ucast_frames); in vi_get_counter()
3197 return (s->rx_err_frames); in vi_get_counter()
3199 return (s->tx_bcast_frames + s->tx_mcast_frames + in vi_get_counter()
3200 s->tx_ucast_frames + s->tx_offload_frames); in vi_get_counter()
3202 return (s->tx_drop_frames); in vi_get_counter()
3204 return (s->rx_bcast_bytes + s->rx_mcast_bytes + in vi_get_counter()
3205 s->rx_ucast_bytes); in vi_get_counter()
3207 return (s->tx_bcast_bytes + s->tx_mcast_bytes + in vi_get_counter()
3208 s->tx_ucast_bytes + s->tx_offload_bytes); in vi_get_counter()
3210 return (s->rx_mcast_frames); in vi_get_counter()
3212 return (s->tx_mcast_frames); in vi_get_counter()
3217 if (vi->flags & VI_INIT_DONE) { in vi_get_counter()
3222 drops += counter_u64_fetch(txq->r->dropped); in vi_get_counter()
3238 struct port_info *pi = vi->pi; in cxgbe_get_counter()
3239 struct port_stats *s = &pi->stats; in cxgbe_get_counter()
3241 mtx_lock(&vi->tick_mtx); in cxgbe_get_counter()
3243 mtx_unlock(&vi->tick_mtx); in cxgbe_get_counter()
3247 return (s->rx_frames); in cxgbe_get_counter()
3250 return (s->rx_jabber + s->rx_runt + s->rx_too_long + in cxgbe_get_counter()
3251 s->rx_fcs_err + s->rx_len_err); in cxgbe_get_counter()
3254 return (s->tx_frames); in cxgbe_get_counter()
3257 return (s->tx_error_frames); in cxgbe_get_counter()
3260 return (s->rx_octets); in cxgbe_get_counter()
3263 return (s->tx_octets); in cxgbe_get_counter()
3266 return (s->rx_mcast_frames); in cxgbe_get_counter()
3269 return (s->tx_mcast_frames); in cxgbe_get_counter()
3272 return (s->rx_ovflow0 + s->rx_ovflow1 + s->rx_ovflow2 + in cxgbe_get_counter()
3273 s->rx_ovflow3 + s->rx_trunc0 + s->rx_trunc1 + s->rx_trunc2 + in cxgbe_get_counter()
3274 s->rx_trunc3 + pi->tnl_cong_drops); in cxgbe_get_counter()
3279 drops = s->tx_drop; in cxgbe_get_counter()
3280 if (vi->flags & VI_INIT_DONE) { in cxgbe_get_counter()
3285 drops += counter_u64_fetch(txq->r->dropped); in cxgbe_get_counter()
3304 switch (params->hdr.type) { in cxgbe_snd_tag_alloc()
3315 if (is_t6(vi->pi->adapter)) in cxgbe_snd_tag_alloc()
3337 struct port_info *pi = vi->pi; in cxgbe_media_change()
3338 struct ifmedia *ifm = &pi->media; in cxgbe_media_change()
3339 struct link_config *lc = &pi->link_cfg; in cxgbe_media_change()
3340 struct adapter *sc = pi->adapter; in cxgbe_media_change()
3347 if (IFM_SUBTYPE(ifm->ifm_media) == IFM_AUTO) { in cxgbe_media_change()
3349 if (!(lc->pcaps & FW_PORT_CAP32_ANEG)) { in cxgbe_media_change()
3353 lc->requested_aneg = AUTONEG_ENABLE; in cxgbe_media_change()
3354 lc->requested_speed = 0; in cxgbe_media_change()
3355 lc->requested_fc |= PAUSE_AUTONEG; in cxgbe_media_change()
3357 lc->requested_aneg = AUTONEG_DISABLE; in cxgbe_media_change()
3358 lc->requested_speed = in cxgbe_media_change()
3359 ifmedia_baudrate(ifm->ifm_media) / 1000000; in cxgbe_media_change()
3360 lc->requested_fc = 0; in cxgbe_media_change()
3361 if (IFM_OPTIONS(ifm->ifm_media) & IFM_ETH_RXPAUSE) in cxgbe_media_change()
3362 lc->requested_fc |= PAUSE_RX; in cxgbe_media_change()
3363 if (IFM_OPTIONS(ifm->ifm_media) & IFM_ETH_TXPAUSE) in cxgbe_media_change()
3364 lc->requested_fc |= PAUSE_TX; in cxgbe_media_change()
3366 if (pi->up_vis > 0 && !hw_off_limits(sc)) { in cxgbe_media_change()
3387 switch(pi->port_type) { in port_mword()
3446 switch (pi->mod_type) { in port_mword()
3526 struct port_info *pi = vi->pi; in cxgbe_media_status()
3527 struct adapter *sc = pi->adapter; in cxgbe_media_status()
3528 struct link_config *lc = &pi->link_cfg; in cxgbe_media_status()
3534 if (pi->up_vis == 0 && !hw_off_limits(sc)) { in cxgbe_media_status()
3547 ifmr->ifm_status = IFM_AVALID; in cxgbe_media_status()
3548 if (lc->link_ok == false) in cxgbe_media_status()
3550 ifmr->ifm_status |= IFM_ACTIVE; in cxgbe_media_status()
3553 ifmr->ifm_active = IFM_ETHER | IFM_FDX; in cxgbe_media_status()
3554 ifmr->ifm_active &= ~(IFM_ETH_TXPAUSE | IFM_ETH_RXPAUSE); in cxgbe_media_status()
3555 if (lc->fc & PAUSE_RX) in cxgbe_media_status()
3556 ifmr->ifm_active |= IFM_ETH_RXPAUSE; in cxgbe_media_status()
3557 if (lc->fc & PAUSE_TX) in cxgbe_media_status()
3558 ifmr->ifm_active |= IFM_ETH_TXPAUSE; in cxgbe_media_status()
3559 ifmr->ifm_active |= port_mword(pi, speed_to_fwcap(lc->speed)); in cxgbe_media_status()
3570 device_set_descf(dev, "port %d vi %td", vi->pi->port_id, in vcxgbe_probe()
3571 vi - vi->pi->vi); in vcxgbe_probe()
3584 index = vi - pi->vi; in alloc_extra_vi()
3588 device_get_nameunit(vi->dev))); in alloc_extra_vi()
3590 rc = t4_alloc_vi_func(sc, sc->mbox, pi->tx_chan, sc->pf, 0, 1, in alloc_extra_vi()
3591 vi->hw_addr, &vi->rss_size, &vi->vfvld, &vi->vin, func, 0); in alloc_extra_vi()
3594 "for port %d: %d\n", index, pi->port_id, -rc); in alloc_extra_vi()
3595 return (-rc); in alloc_extra_vi()
3597 vi->viid = rc; in alloc_extra_vi()
3599 if (vi->rss_size == 1) { in alloc_extra_vi()
3606 device_printf(vi->dev, "RSS table not available.\n"); in alloc_extra_vi()
3607 vi->rss_base = 0xffff; in alloc_extra_vi()
3614 V_FW_PARAMS_PARAM_YZ(vi->viid); in alloc_extra_vi()
3615 rc = t4_query_params(sc, sc->mbox, sc->pf, 0, 1, ¶m, &val); in alloc_extra_vi()
3617 vi->rss_base = 0xffff; in alloc_extra_vi()
3619 MPASS((val >> 16) == vi->rss_size); in alloc_extra_vi()
3620 vi->rss_base = val & 0xffff; in alloc_extra_vi()
3635 pi = vi->pi; in vcxgbe_attach()
3636 sc = pi->adapter; in vcxgbe_attach()
3658 sc = vi->adapter; in vcxgbe_detach()
3662 t4_free_vi(sc, sc->mbox, sc->pf, 0, vi->viid); in vcxgbe_detach()
3676 panic("%s: panic on fatal error", device_get_nameunit(sc->dev)); in delayed_panic()
3685 if (atomic_testandclear_int(&sc->error_flags, ilog2(ADAP_CIM_ERR))) { in fatal_error_task()
3710 const bool verbose = (sc->debug_flags & DF_VERBOSE_SLOWINTR) != 0; in t4_fatal_err()
3713 if (atomic_testandset_int(&sc->error_flags, ilog2(ADAP_FATAL_ERR))) in t4_fatal_err()
3725 atomic_set_int(&sc->error_flags, ADAP_CIM_ERR); in t4_fatal_err()
3729 device_get_nameunit(sc->dev), fw_error); in t4_fatal_err()
3730 taskqueue_enqueue(reset_tq, &sc->fatal_error_task); in t4_fatal_err()
3744 sc->regs_rid = PCIR_BAR(0); in t4_map_bars_0_and_4()
3745 sc->regs_res = bus_alloc_resource_any(sc->dev, SYS_RES_MEMORY, in t4_map_bars_0_and_4()
3746 &sc->regs_rid, RF_ACTIVE); in t4_map_bars_0_and_4()
3747 if (sc->regs_res == NULL) { in t4_map_bars_0_and_4()
3748 device_printf(sc->dev, "cannot map registers.\n"); in t4_map_bars_0_and_4()
3751 sc->bt = rman_get_bustag(sc->regs_res); in t4_map_bars_0_and_4()
3752 sc->bh = rman_get_bushandle(sc->regs_res); in t4_map_bars_0_and_4()
3753 sc->mmio_len = rman_get_size(sc->regs_res); in t4_map_bars_0_and_4()
3754 setbit(&sc->doorbells, DOORBELL_KDB); in t4_map_bars_0_and_4()
3756 sc->msix_rid = PCIR_BAR(4); in t4_map_bars_0_and_4()
3757 sc->msix_res = bus_alloc_resource_any(sc->dev, SYS_RES_MEMORY, in t4_map_bars_0_and_4()
3758 &sc->msix_rid, RF_ACTIVE); in t4_map_bars_0_and_4()
3759 if (sc->msix_res == NULL) { in t4_map_bars_0_and_4()
3760 device_printf(sc->dev, "cannot map MSI-X BAR.\n"); in t4_map_bars_0_and_4()
3775 if (is_t4(sc) && sc->rdmacaps == 0) in t4_map_bar_2()
3778 sc->udbs_rid = PCIR_BAR(2); in t4_map_bar_2()
3779 sc->udbs_res = bus_alloc_resource_any(sc->dev, SYS_RES_MEMORY, in t4_map_bar_2()
3780 &sc->udbs_rid, RF_ACTIVE); in t4_map_bar_2()
3781 if (sc->udbs_res == NULL) { in t4_map_bar_2()
3782 device_printf(sc->dev, "cannot map doorbell BAR.\n"); in t4_map_bar_2()
3785 sc->udbs_base = rman_get_virtual(sc->udbs_res); in t4_map_bar_2()
3788 setbit(&sc->doorbells, DOORBELL_UDB); in t4_map_bar_2()
3802 rc = pmap_change_attr((vm_offset_t)sc->udbs_base, in t4_map_bar_2()
3803 rman_get_size(sc->udbs_res), PAT_WRITE_COMBINING); in t4_map_bar_2()
3805 clrbit(&sc->doorbells, DOORBELL_UDB); in t4_map_bar_2()
3806 setbit(&sc->doorbells, DOORBELL_WCWR); in t4_map_bar_2()
3807 setbit(&sc->doorbells, DOORBELL_UDBWC); in t4_map_bar_2()
3809 device_printf(sc->dev, in t4_map_bar_2()
3820 sc->iwt.wc_en = isset(&sc->doorbells, DOORBELL_UDBWC) ? 1 : 0; in t4_map_bar_2()
3828 if ((sc->doorbells & t4_doorbells_allowed) != 0) { in t4_adj_doorbells()
3829 sc->doorbells &= t4_doorbells_allowed; in t4_adj_doorbells()
3833 sc->doorbells, t4_doorbells_allowed); in t4_adj_doorbells()
3881 for (i = 0, mw = &sc->memwin[0]; i < NUM_MEMWIN; i++, mw_init++, mw++) { in setup_memwin()
3882 if (!rw_initialized(&mw->mw_lock)) { in setup_memwin()
3883 rw_init(&mw->mw_lock, "memory window access"); in setup_memwin()
3884 mw->mw_base = mw_init->base; in setup_memwin()
3885 mw->mw_aperture = mw_init->aperture; in setup_memwin()
3886 mw->mw_curpos = 0; in setup_memwin()
3890 (mw->mw_base + bar0) | V_BIR(0) | in setup_memwin()
3891 V_WINDOW(ilog2(mw->mw_aperture) - 10)); in setup_memwin()
3892 rw_wlock(&mw->mw_lock); in setup_memwin()
3893 position_memwin(sc, i, mw->mw_curpos); in setup_memwin()
3894 rw_wunlock(&mw->mw_lock); in setup_memwin()
3904 * address prior to the requested address. mw->mw_curpos always has the actual
3915 mw = &sc->memwin[idx]; in position_memwin()
3916 rw_assert(&mw->mw_lock, RA_WLOCKED); in position_memwin()
3920 mw->mw_curpos = addr & ~0xf; /* start must be 16B aligned */ in position_memwin()
3922 pf = V_PFNUM(sc->pf); in position_memwin()
3923 mw->mw_curpos = addr & ~0x7f; /* start must be 128B aligned */ in position_memwin()
3926 t4_write_reg(sc, reg, mw->mw_curpos | pf); in position_memwin()
3943 mw = &sc->memwin[idx]; in rw_via_memwin()
3945 rw_rlock(&mw->mw_lock); in rw_via_memwin()
3946 mw_end = mw->mw_curpos + mw->mw_aperture; in rw_via_memwin()
3947 if (addr >= mw_end || addr < mw->mw_curpos) { in rw_via_memwin()
3949 if (!rw_try_upgrade(&mw->mw_lock)) { in rw_via_memwin()
3950 rw_runlock(&mw->mw_lock); in rw_via_memwin()
3951 rw_wlock(&mw->mw_lock); in rw_via_memwin()
3953 rw_assert(&mw->mw_lock, RA_WLOCKED); in rw_via_memwin()
3955 rw_downgrade(&mw->mw_lock); in rw_via_memwin()
3956 mw_end = mw->mw_curpos + mw->mw_aperture; in rw_via_memwin()
3958 rw_assert(&mw->mw_lock, RA_RLOCKED); in rw_via_memwin()
3961 v = t4_read_reg(sc, mw->mw_base + addr - in rw_via_memwin()
3962 mw->mw_curpos); in rw_via_memwin()
3966 t4_write_reg(sc, mw->mw_base + addr - in rw_via_memwin()
3967 mw->mw_curpos, htole32(v)); in rw_via_memwin()
3970 len -= 4; in rw_via_memwin()
3972 rw_runlock(&mw->mw_lock); in rw_via_memwin()
3987 t = &sc->tids; in t4_init_atid_table()
3988 if (t->natids == 0) in t4_init_atid_table()
3991 MPASS(t->atid_tab == NULL); in t4_init_atid_table()
3993 t->atid_tab = malloc(t->natids * sizeof(*t->atid_tab), M_CXGBE, in t4_init_atid_table()
3995 mtx_init(&t->atid_lock, "atid lock", NULL, MTX_DEF); in t4_init_atid_table()
3996 t->afree = t->atid_tab; in t4_init_atid_table()
3997 t->atids_in_use = 0; in t4_init_atid_table()
3998 t->atid_alloc_stopped = false; in t4_init_atid_table()
3999 for (i = 1; i < t->natids; i++) in t4_init_atid_table()
4000 t->atid_tab[i - 1].next = &t->atid_tab[i]; in t4_init_atid_table()
4001 t->atid_tab[t->natids - 1].next = NULL; in t4_init_atid_table()
4009 t = &sc->tids; in t4_free_atid_table()
4011 KASSERT(t->atids_in_use == 0, in t4_free_atid_table()
4012 ("%s: %d atids still in use.", __func__, t->atids_in_use)); in t4_free_atid_table()
4014 if (mtx_initialized(&t->atid_lock)) in t4_free_atid_table()
4015 mtx_destroy(&t->atid_lock); in t4_free_atid_table()
4016 free(t->atid_tab, M_CXGBE); in t4_free_atid_table()
4017 t->atid_tab = NULL; in t4_free_atid_table()
4023 struct tid_info *t = &sc->tids; in stop_atid_allocator()
4025 mtx_lock(&t->atid_lock); in stop_atid_allocator()
4026 t->atid_alloc_stopped = true; in stop_atid_allocator()
4027 mtx_unlock(&t->atid_lock); in stop_atid_allocator()
4033 struct tid_info *t = &sc->tids; in restart_atid_allocator()
4035 mtx_lock(&t->atid_lock); in restart_atid_allocator()
4036 KASSERT(t->atids_in_use == 0, in restart_atid_allocator()
4037 ("%s: %d atids still in use.", __func__, t->atids_in_use)); in restart_atid_allocator()
4038 t->atid_alloc_stopped = false; in restart_atid_allocator()
4039 mtx_unlock(&t->atid_lock); in restart_atid_allocator()
4045 struct tid_info *t = &sc->tids; in alloc_atid()
4046 int atid = -1; in alloc_atid()
4048 mtx_lock(&t->atid_lock); in alloc_atid()
4049 if (t->afree && !t->atid_alloc_stopped) { in alloc_atid()
4050 union aopen_entry *p = t->afree; in alloc_atid()
4052 atid = p - t->atid_tab; in alloc_atid()
4054 t->afree = p->next; in alloc_atid()
4055 p->data = ctx; in alloc_atid()
4056 t->atids_in_use++; in alloc_atid()
4058 mtx_unlock(&t->atid_lock); in alloc_atid()
4065 struct tid_info *t = &sc->tids; in lookup_atid()
4067 return (t->atid_tab[atid].data); in lookup_atid()
4073 struct tid_info *t = &sc->tids; in free_atid()
4074 union aopen_entry *p = &t->atid_tab[atid]; in free_atid()
4076 mtx_lock(&t->atid_lock); in free_atid()
4077 p->next = t->afree; in free_atid()
4078 t->afree = p; in free_atid()
4079 t->atids_in_use--; in free_atid()
4080 mtx_unlock(&t->atid_lock); in free_atid()
4111 return ((const struct t4_range *)a)->start - in t4_range_cmp()
4112 ((const struct t4_range *)b)->start; in t4_range_cmp()
4138 r->size = G_EDRAM0_SIZE(addr_len) << 20; in validate_mem_range()
4139 if (r->size > 0) { in validate_mem_range()
4140 r->start = G_EDRAM0_BASE(addr_len) << 20; in validate_mem_range()
4141 if (addr >= r->start && in validate_mem_range()
4142 addr + len <= r->start + r->size) in validate_mem_range()
4150 r->size = G_EDRAM1_SIZE(addr_len) << 20; in validate_mem_range()
4151 if (r->size > 0) { in validate_mem_range()
4152 r->start = G_EDRAM1_BASE(addr_len) << 20; in validate_mem_range()
4153 if (addr >= r->start && in validate_mem_range()
4154 addr + len <= r->start + r->size) in validate_mem_range()
4162 r->size = G_EXT_MEM_SIZE(addr_len) << 20; in validate_mem_range()
4163 if (r->size > 0) { in validate_mem_range()
4164 r->start = G_EXT_MEM_BASE(addr_len) << 20; in validate_mem_range()
4165 if (addr >= r->start && in validate_mem_range()
4166 addr + len <= r->start + r->size) in validate_mem_range()
4174 r->size = G_EXT_MEM1_SIZE(addr_len) << 20; in validate_mem_range()
4175 if (r->size > 0) { in validate_mem_range()
4176 r->start = G_EXT_MEM1_BASE(addr_len) << 20; in validate_mem_range()
4177 if (addr >= r->start && in validate_mem_range()
4178 addr + len <= r->start + r->size) in validate_mem_range()
4190 /* Start from index 0 and examine the next n - 1 entries. */ in validate_mem_range()
4192 for (remaining = n - 1; remaining > 0; remaining--, r++) { in validate_mem_range()
4194 MPASS(r->size > 0); /* r is a valid entry. */ in validate_mem_range()
4196 MPASS(next->size > 0); /* and so is the next one. */ in validate_mem_range()
4198 while (r->start + r->size >= next->start) { in validate_mem_range()
4200 r->size = max(r->start + r->size, in validate_mem_range()
4201 next->start + next->size) - r->start; in validate_mem_range()
4202 n--; /* One fewer entry in total. */ in validate_mem_range()
4203 if (--remaining == 0) in validate_mem_range()
4213 MPASS(next->size > 0); /* must be valid */ in validate_mem_range()
4217 * This so that the foo->size assertion in the in validate_mem_range()
4223 bzero(&mem_ranges[n], (nitems(mem_ranges) - n) * in validate_mem_range()
4233 if (addr >= r->start && in validate_mem_range()
4234 addr + len <= r->start + r->size) in validate_mem_range()
4312 struct devlog_params *dparams = &sc->params.devlog; in fixup_devlog_params()
4315 rc = validate_mt_off_len(sc, dparams->memtype, dparams->start, in fixup_devlog_params()
4316 dparams->size, &dparams->addr); in fixup_devlog_params()
4325 iaq->nirq = T4_EXTRA_INTR; in update_nirq()
4326 iaq->nirq += nports * max(iaq->nrxq, iaq->nnmrxq); in update_nirq()
4327 iaq->nirq += nports * iaq->nofldrxq; in update_nirq()
4328 iaq->nirq += nports * (iaq->num_vis - 1) * in update_nirq()
4329 max(iaq->nrxq_vi, iaq->nnmrxq_vi); in update_nirq()
4330 iaq->nirq += nports * (iaq->num_vis - 1) * iaq->nofldrxq_vi; in update_nirq()
4341 const int nports = sc->params.nports; in calculate_iaq()
4347 iaq->intr_type = itype; in calculate_iaq()
4348 iaq->num_vis = t4_num_vis; in calculate_iaq()
4349 iaq->ntxq = t4_ntxq; in calculate_iaq()
4350 iaq->ntxq_vi = t4_ntxq_vi; in calculate_iaq()
4351 iaq->nrxq = t4_nrxq; in calculate_iaq()
4352 iaq->nrxq_vi = t4_nrxq_vi; in calculate_iaq()
4355 iaq->nofldtxq = t4_nofldtxq; in calculate_iaq()
4356 iaq->nofldtxq_vi = t4_nofldtxq_vi; in calculate_iaq()
4361 iaq->nofldrxq = t4_nofldrxq; in calculate_iaq()
4362 iaq->nofldrxq_vi = t4_nofldrxq_vi; in calculate_iaq()
4367 iaq->nnmtxq = t4_nnmtxq; in calculate_iaq()
4368 iaq->nnmrxq = t4_nnmrxq; in calculate_iaq()
4371 iaq->nnmtxq_vi = t4_nnmtxq_vi; in calculate_iaq()
4372 iaq->nnmrxq_vi = t4_nnmrxq_vi; in calculate_iaq()
4377 if (iaq->nirq <= navail && in calculate_iaq()
4378 (itype != INTR_MSI || powerof2(iaq->nirq))) { in calculate_iaq()
4380 * This is the normal case -- there are enough interrupts for in calculate_iaq()
4390 while (iaq->num_vis > 1) { in calculate_iaq()
4391 iaq->num_vis--; in calculate_iaq()
4393 if (iaq->nirq <= navail && in calculate_iaq()
4394 (itype != INTR_MSI || powerof2(iaq->nirq))) { in calculate_iaq()
4395 device_printf(sc->dev, "virtual interfaces per port " in calculate_iaq()
4399 iaq->num_vis, t4_num_vis, iaq->nrxq, iaq->nofldrxq, in calculate_iaq()
4400 iaq->nrxq_vi, iaq->nofldrxq_vi, iaq->nnmrxq_vi, in calculate_iaq()
4401 itype, navail, iaq->nirq); in calculate_iaq()
4409 MPASS(iaq->num_vis == 1); in calculate_iaq()
4410 iaq->ntxq_vi = iaq->nrxq_vi = 0; in calculate_iaq()
4411 iaq->nofldtxq_vi = iaq->nofldrxq_vi = 0; in calculate_iaq()
4412 iaq->nnmtxq_vi = iaq->nnmrxq_vi = 0; in calculate_iaq()
4413 if (iaq->num_vis != t4_num_vis) { in calculate_iaq()
4414 device_printf(sc->dev, "extra virtual interfaces disabled. " in calculate_iaq()
4417 iaq->nrxq, iaq->nofldrxq, iaq->nrxq_vi, iaq->nofldrxq_vi, in calculate_iaq()
4418 iaq->nnmrxq_vi, itype, navail, iaq->nirq); in calculate_iaq()
4427 if (iaq->nrxq > 1) { in calculate_iaq()
4428 iaq->nrxq = rounddown_pow_of_two(iaq->nrxq - 1); in calculate_iaq()
4429 if (iaq->nnmrxq > iaq->nrxq) in calculate_iaq()
4430 iaq->nnmrxq = iaq->nrxq; in calculate_iaq()
4432 if (iaq->nofldrxq > 1) in calculate_iaq()
4433 iaq->nofldrxq >>= 1; in calculate_iaq()
4435 old_nirq = iaq->nirq; in calculate_iaq()
4437 if (iaq->nirq <= navail && in calculate_iaq()
4438 (itype != INTR_MSI || powerof2(iaq->nirq))) { in calculate_iaq()
4439 device_printf(sc->dev, "running with reduced number of " in calculate_iaq()
4442 "itype %d, navail %u, nirq %d.\n", iaq->nrxq, in calculate_iaq()
4443 iaq->nofldrxq, itype, navail, iaq->nirq); in calculate_iaq()
4446 } while (old_nirq != iaq->nirq); in calculate_iaq()
4449 device_printf(sc->dev, "running with minimal number of queues. " in calculate_iaq()
4451 iaq->nirq = 1; in calculate_iaq()
4452 iaq->nrxq = 1; in calculate_iaq()
4453 iaq->ntxq = 1; in calculate_iaq()
4454 if (iaq->nofldrxq > 0) { in calculate_iaq()
4455 iaq->nofldrxq = 1; in calculate_iaq()
4456 iaq->nofldtxq = 1; in calculate_iaq()
4458 iaq->nnmtxq = 0; in calculate_iaq()
4459 iaq->nnmrxq = 0; in calculate_iaq()
4461 MPASS(iaq->num_vis > 0); in calculate_iaq()
4462 if (iaq->num_vis > 1) { in calculate_iaq()
4463 MPASS(iaq->nrxq_vi > 0); in calculate_iaq()
4464 MPASS(iaq->ntxq_vi > 0); in calculate_iaq()
4466 MPASS(iaq->nirq > 0); in calculate_iaq()
4467 MPASS(iaq->nrxq > 0); in calculate_iaq()
4468 MPASS(iaq->ntxq > 0); in calculate_iaq()
4470 MPASS(powerof2(iaq->nirq)); in calculate_iaq()
4485 navail = pci_msix_count(sc->dev); in cfg_itype_and_nqueues()
4487 navail = pci_msi_count(sc->dev); in cfg_itype_and_nqueues()
4495 nalloc = iaq->nirq; in cfg_itype_and_nqueues()
4498 rc = pci_alloc_msix(sc->dev, &nalloc); in cfg_itype_and_nqueues()
4500 rc = pci_alloc_msi(sc->dev, &nalloc); in cfg_itype_and_nqueues()
4503 if (nalloc == iaq->nirq) in cfg_itype_and_nqueues()
4510 device_printf(sc->dev, "fewer vectors than requested, " in cfg_itype_and_nqueues()
4512 itype, iaq->nirq, nalloc); in cfg_itype_and_nqueues()
4513 pci_release_msi(sc->dev); in cfg_itype_and_nqueues()
4518 device_printf(sc->dev, in cfg_itype_and_nqueues()
4520 itype, rc, iaq->nirq, nalloc); in cfg_itype_and_nqueues()
4523 device_printf(sc->dev, in cfg_itype_and_nqueues()
4525 "allowed=%d, msi-x=%d, msi=%d, intx=1", t4_intr_types, in cfg_itype_and_nqueues()
4526 pci_msix_count(sc->dev), pci_msi_count(sc->dev)); in cfg_itype_and_nqueues()
4637 if (hdr1->chip == hdr2->chip && hdr1->fw_ver == hdr2->fw_ver) in fw_compatible()
4644 #define SAME_INTF(x) (hdr1->intfver_##x == hdr2->intfver_##x) in fw_compatible()
4645 if (hdr1->chip == hdr2->chip && SAME_INTF(nic) && SAME_INTF(vnic) && in fw_compatible()
4666 device_printf(sc->dev, in load_fw_module()
4672 *dcfg = firmware_get(fw_info->kld_name); in load_fw_module()
4675 *fw = firmware_get(fw_info->fw_mod_name); in load_fw_module()
4704 const uint32_t c = be32toh(card_fw->fw_ver); in install_kld_firmware()
4712 fw_install = t4_fw_install < 0 ? -t4_fw_install : t4_fw_install; in install_kld_firmware()
4718 device_printf(sc->dev, in install_kld_firmware()
4720 " will use compiled-in firmware version for" in install_kld_firmware()
4724 memcpy(&bundled_fw, fw->data, sizeof(bundled_fw)); in install_kld_firmware()
4733 if ((sc->flags & FW_OK) == 0) { in install_kld_firmware()
4769 device_printf(sc->dev, "firmware on card (%u.%u.%u.%u) is %s, " in install_kld_firmware()
4785 device_printf(sc->dev, in install_kld_firmware()
4792 device_printf(sc->dev, "firmware on card (%u.%u.%u.%u) is %s, " in install_kld_firmware()
4797 rc = sc->flags & FW_OK ? 0 : ENOENT; in install_kld_firmware()
4800 k = be32toh(((const struct fw_hdr *)fw->data)->fw_ver); in install_kld_firmware()
4803 device_printf(sc->dev, in install_kld_firmware()
4810 rc = sc->flags & FW_OK ? 0 : EINVAL; in install_kld_firmware()
4814 device_printf(sc->dev, "firmware on card (%u.%u.%u.%u) is %s, " in install_kld_firmware()
4821 rc = -t4_fw_upgrade(sc, sc->mbox, fw->data, fw->datasize, 0); in install_kld_firmware()
4823 device_printf(sc->dev, "failed to install firmware: %d\n", rc); in install_kld_firmware()
4827 memcpy(card_fw, fw->data, sizeof(*card_fw)); in install_kld_firmware()
4852 device_printf(sc->dev, in contact_firmware()
4857 drv_fw = &fw_info->fw_h; in contact_firmware()
4862 rc = -t4_get_fw_hdr(sc, card_fw); in contact_firmware()
4864 device_printf(sc->dev, in contact_firmware()
4877 rc = t4_fw_hello(sc, sc->mbox, sc->mbox, MASTER_MAY, &state); in contact_firmware()
4879 rc = -rc; in contact_firmware()
4880 device_printf(sc->dev, in contact_firmware()
4890 MPASS(be32toh(card_fw->flags) & FW_HDR_FLAGS_RESET_HALT); in contact_firmware()
4891 sc->flags |= FW_OK; /* The firmware responded to the FW_HELLO. */ in contact_firmware()
4893 if (rc == sc->pf) { in contact_firmware()
4894 sc->flags |= MASTER_PF; in contact_firmware()
4907 device_printf(sc->dev, "couldn't be master(%d), " in contact_firmware()
4917 device_printf(sc->dev, "PF%d is master, device state %d. " in contact_firmware()
4919 snprintf(sc->cfg_file, sizeof(sc->cfg_file), "pf%d", rc); in contact_firmware()
4920 sc->cfcsum = 0; in contact_firmware()
4924 if (rc != 0 && sc->flags & FW_OK) { in contact_firmware()
4925 t4_fw_bye(sc, sc->mbox); in contact_firmware()
4926 sc->flags &= ~FW_OK; in contact_firmware()
4946 if (pci_get_device(sc->dev) == 0x440a) in copy_cfg_file_to_card()
4954 device_printf(sc->dev, in copy_cfg_file_to_card()
4959 cfdata = dcfg->data; in copy_cfg_file_to_card()
4960 cflen = dcfg->datasize & ~3; in copy_cfg_file_to_card()
4966 device_printf(sc->dev, in copy_cfg_file_to_card()
4972 snprintf(s, sizeof(s), "%s_%s", fw_info->kld_name, cfg_file); in copy_cfg_file_to_card()
4976 device_printf(sc->dev, in copy_cfg_file_to_card()
4982 cfdata = rcfg->data; in copy_cfg_file_to_card()
4983 cflen = rcfg->datasize & ~3; in copy_cfg_file_to_card()
4987 device_printf(sc->dev, in copy_cfg_file_to_card()
4996 device_printf(sc->dev, in copy_cfg_file_to_card()
5042 rc = -t4_fw_reset(sc, sc->mbox, F_PIORSTMODE | F_PIORST); in apply_cfg_and_initialize()
5044 device_printf(sc->dev, "firmware reset failed: %d.\n", rc); in apply_cfg_and_initialize()
5067 rc = -t4_query_params(sc, sc->mbox, sc->pf, 0, 1, ¶m, &val); in apply_cfg_and_initialize()
5070 device_printf(sc->dev, in apply_cfg_and_initialize()
5083 device_printf(sc->dev, in apply_cfg_and_initialize()
5088 rc = -t4_wr_mbox(sc, sc->mbox, &caps, sizeof(caps), &caps); in apply_cfg_and_initialize()
5090 device_printf(sc->dev, "failed to pre-process config file: %d " in apply_cfg_and_initialize()
5098 device_printf(sc->dev, in apply_cfg_and_initialize()
5102 sc->cfcsum = cfcsum; in apply_cfg_and_initialize()
5103 snprintf(sc->cfg_file, sizeof(sc->cfg_file), "%s", cfg_file); in apply_cfg_and_initialize()
5110 caps.x##caps &= htobe16(caps_allowed->x##caps); \ in apply_cfg_and_initialize()
5126 * to cope with the situation in non-debug builds by disabling in apply_cfg_and_initialize()
5139 rc = -t4_wr_mbox(sc, sc->mbox, &caps, sizeof(caps), NULL); in apply_cfg_and_initialize()
5141 device_printf(sc->dev, in apply_cfg_and_initialize()
5150 rc = -t4_fw_initialize(sc, sc->mbox); in apply_cfg_and_initialize()
5152 device_printf(sc->dev, "fw_initialize failed: %d.\n", rc); in apply_cfg_and_initialize()
5171 MPASS(sc->flags & MASTER_PF); in partition_resources()
5186 fallback = sc->debug_flags & DF_DISABLE_CFG_RETRY ? false : true; in partition_resources()
5192 device_printf(sc->dev, in partition_resources()
5218 snprintf(sc->fw_version, sizeof(sc->fw_version), "%u.%u.%u.%u", in get_params__pre_init()
5219 G_FW_HDR_FW_VER_MAJOR(sc->params.fw_vers), in get_params__pre_init()
5220 G_FW_HDR_FW_VER_MINOR(sc->params.fw_vers), in get_params__pre_init()
5221 G_FW_HDR_FW_VER_MICRO(sc->params.fw_vers), in get_params__pre_init()
5222 G_FW_HDR_FW_VER_BUILD(sc->params.fw_vers)); in get_params__pre_init()
5224 snprintf(sc->bs_version, sizeof(sc->bs_version), "%u.%u.%u.%u", in get_params__pre_init()
5225 G_FW_HDR_FW_VER_MAJOR(sc->params.bs_vers), in get_params__pre_init()
5226 G_FW_HDR_FW_VER_MINOR(sc->params.bs_vers), in get_params__pre_init()
5227 G_FW_HDR_FW_VER_MICRO(sc->params.bs_vers), in get_params__pre_init()
5228 G_FW_HDR_FW_VER_BUILD(sc->params.bs_vers)); in get_params__pre_init()
5230 snprintf(sc->tp_version, sizeof(sc->tp_version), "%u.%u.%u.%u", in get_params__pre_init()
5231 G_FW_HDR_FW_VER_MAJOR(sc->params.tp_vers), in get_params__pre_init()
5232 G_FW_HDR_FW_VER_MINOR(sc->params.tp_vers), in get_params__pre_init()
5233 G_FW_HDR_FW_VER_MICRO(sc->params.tp_vers), in get_params__pre_init()
5234 G_FW_HDR_FW_VER_BUILD(sc->params.tp_vers)); in get_params__pre_init()
5236 snprintf(sc->er_version, sizeof(sc->er_version), "%u.%u.%u.%u", in get_params__pre_init()
5237 G_FW_HDR_FW_VER_MAJOR(sc->params.er_vers), in get_params__pre_init()
5238 G_FW_HDR_FW_VER_MINOR(sc->params.er_vers), in get_params__pre_init()
5239 G_FW_HDR_FW_VER_MICRO(sc->params.er_vers), in get_params__pre_init()
5240 G_FW_HDR_FW_VER_BUILD(sc->params.er_vers)); in get_params__pre_init()
5244 rc = -t4_query_params(sc, sc->mbox, sc->pf, 0, 2, param, val); in get_params__pre_init()
5246 device_printf(sc->dev, in get_params__pre_init()
5251 sc->params.portvec = val[0]; in get_params__pre_init()
5252 sc->params.nports = bitcount32(val[0]); in get_params__pre_init()
5253 sc->params.vpd.cclk = val[1]; in get_params__pre_init()
5256 rc = -t4_init_devlog_params(sc, 1); in get_params__pre_init()
5260 device_printf(sc->dev, in get_params__pre_init()
5280 rc = -t4_set_params(sc, sc->mbox, sc->pf, 0, 1, ¶m, &val); in set_params__pre_init()
5283 sc->params.fw_vers < FW_VERSION32(1, 20, 1, 0)) { in set_params__pre_init()
5287 device_printf(sc->dev, in set_params__pre_init()
5293 rc = -t4_query_params(sc, sc->mbox, sc->pf, 0, 1, ¶m, &val); in set_params__pre_init()
5295 rc = -t4_set_params(sc, sc->mbox, sc->pf, 0, 1, ¶m, in set_params__pre_init()
5298 device_printf(sc->dev, in set_params__pre_init()
5307 rc = -t4_set_params(sc, sc->mbox, sc->pf, 0, 1, ¶m, &val); in set_params__pre_init()
5309 sc->params.viid_smt_extn_support = true; in set_params__pre_init()
5311 sc->params.viid_smt_extn_support = false; in set_params__pre_init()
5336 rc = -t4_query_params(sc, sc->mbox, sc->pf, 0, 7, param, val); in get_params__post_init()
5338 device_printf(sc->dev, in get_params__post_init()
5343 sc->sge.iq_start = val[0]; in get_params__post_init()
5344 sc->sge.eq_start = val[1]; in get_params__post_init()
5346 sc->tids.ftid_base = val[2]; in get_params__post_init()
5347 sc->tids.ftid_end = val[3]; in get_params__post_init()
5348 sc->tids.nftids = val[3] - val[2] + 1; in get_params__post_init()
5350 sc->vres.l2t.start = val[4]; in get_params__post_init()
5351 sc->vres.l2t.size = val[5] - val[4] + 1; in get_params__post_init()
5353 if (sc->vres.l2t.size > 0) in get_params__post_init()
5355 sc->params.core_vdd = val[6]; in get_params__post_init()
5359 rc = -t4_query_params(sc, sc->mbox, sc->pf, 0, 2, param, val); in get_params__post_init()
5361 device_printf(sc->dev, in get_params__post_init()
5365 MPASS((int)val[0] >= sc->sge.iq_start); in get_params__post_init()
5366 sc->sge.iqmap_sz = val[0] - sc->sge.iq_start + 1; in get_params__post_init()
5367 MPASS((int)val[1] >= sc->sge.eq_start); in get_params__post_init()
5368 sc->sge.eqmap_sz = val[1] - sc->sge.eq_start + 1; in get_params__post_init()
5372 sc->tids.tid_base = t4_read_reg(sc, in get_params__post_init()
5377 rc = -t4_query_params(sc, sc->mbox, sc->pf, 0, 2, param, val); in get_params__post_init()
5379 device_printf(sc->dev, in get_params__post_init()
5384 sc->tids.hpftid_base = val[0]; in get_params__post_init()
5385 sc->tids.hpftid_end = val[1]; in get_params__post_init()
5386 sc->tids.nhpftids = val[1] - val[0] + 1; in get_params__post_init()
5392 MPASS(sc->tids.hpftid_base == 0); in get_params__post_init()
5393 MPASS(sc->tids.tid_base == sc->tids.nhpftids); in get_params__post_init()
5398 rc = -t4_query_params(sc, sc->mbox, sc->pf, 0, 2, param, val); in get_params__post_init()
5400 device_printf(sc->dev, in get_params__post_init()
5405 sc->rawf_base = val[0]; in get_params__post_init()
5406 sc->nrawf = val[1] - val[0] + 1; in get_params__post_init()
5421 rc = -t4_query_params(sc, sc->mbox, sc->pf, 0, 1, param, val); in get_params__post_init()
5423 sc->params.mps_bg_map = val[0]; in get_params__post_init()
5425 sc->params.mps_bg_map = UINT32_MAX; /* Not a legal value. */ in get_params__post_init()
5429 rc = -t4_query_params(sc, sc->mbox, sc->pf, 0, 1, param, val); in get_params__post_init()
5431 sc->params.tp_ch_map = val[0]; in get_params__post_init()
5433 sc->params.tp_ch_map = UINT32_MAX; /* Not a legal value. */ in get_params__post_init()
5440 rc = -t4_query_params(sc, sc->mbox, sc->pf, 0, 1, param, val); in get_params__post_init()
5442 sc->params.filter2_wr_support = val[0] != 0; in get_params__post_init()
5444 sc->params.filter2_wr_support = 0; in get_params__post_init()
5451 rc = -t4_query_params(sc, sc->mbox, sc->pf, 0, 1, param, val); in get_params__post_init()
5453 sc->params.ulptx_memwrite_dsgl = val[0] != 0; in get_params__post_init()
5455 sc->params.ulptx_memwrite_dsgl = false; in get_params__post_init()
5459 rc = -t4_query_params(sc, sc->mbox, sc->pf, 0, 1, param, val); in get_params__post_init()
5461 sc->params.fr_nsmr_tpte_wr_support = val[0] != 0; in get_params__post_init()
5463 sc->params.fr_nsmr_tpte_wr_support = false; in get_params__post_init()
5467 rc = -t4_query_params(sc, sc->mbox, sc->pf, 0, 1, param, val); in get_params__post_init()
5469 sc->params.dev_512sgl_mr = val[0] != 0; in get_params__post_init()
5471 sc->params.dev_512sgl_mr = false; in get_params__post_init()
5474 rc = -t4_query_params(sc, sc->mbox, sc->pf, 0, 1, param, val); in get_params__post_init()
5476 sc->params.max_pkts_per_eth_tx_pkts_wr = val[0]; in get_params__post_init()
5478 sc->params.max_pkts_per_eth_tx_pkts_wr = 15; in get_params__post_init()
5481 rc = -t4_query_params(sc, sc->mbox, sc->pf, 0, 1, param, val); in get_params__post_init()
5484 sc->params.nsched_cls = val[0]; in get_params__post_init()
5486 sc->params.nsched_cls = sc->chip_params->nsched_cls; in get_params__post_init()
5493 rc = -t4_wr_mbox(sc, sc->mbox, &caps, sizeof(caps), &caps); in get_params__post_init()
5495 device_printf(sc->dev, in get_params__post_init()
5501 sc->x = htobe16(caps.x); \ in get_params__post_init()
5513 if (sc->niccaps & FW_CAPS_CONFIG_NIC_HASHFILTER) { in get_params__post_init()
5515 MPASS(sc->toecaps == 0); in get_params__post_init()
5516 sc->toecaps = 0; in get_params__post_init()
5519 rc = -t4_query_params(sc, sc->mbox, sc->pf, 0, 1, param, val); in get_params__post_init()
5521 device_printf(sc->dev, in get_params__post_init()
5525 sc->tids.ntids = val[0]; in get_params__post_init()
5526 if (sc->params.fw_vers < FW_VERSION32(1, 20, 5, 0)) { in get_params__post_init()
5527 MPASS(sc->tids.ntids >= sc->tids.nhpftids); in get_params__post_init()
5528 sc->tids.ntids -= sc->tids.nhpftids; in get_params__post_init()
5530 sc->tids.natids = min(sc->tids.ntids / 2, MAX_ATIDS); in get_params__post_init()
5531 sc->params.hash_filter = 1; in get_params__post_init()
5533 if (sc->niccaps & FW_CAPS_CONFIG_NIC_ETHOFLD) { in get_params__post_init()
5537 rc = -t4_query_params(sc, sc->mbox, sc->pf, 0, 3, param, val); in get_params__post_init()
5539 device_printf(sc->dev, in get_params__post_init()
5544 sc->tids.etid_base = val[0]; in get_params__post_init()
5545 sc->tids.etid_end = val[1]; in get_params__post_init()
5546 sc->tids.netids = val[1] - val[0] + 1; in get_params__post_init()
5547 sc->params.eo_wr_cred = val[2]; in get_params__post_init()
5548 sc->params.ethoffload = 1; in get_params__post_init()
5551 if (sc->toecaps) { in get_params__post_init()
5552 /* query offload-related parameters */ in get_params__post_init()
5559 rc = -t4_query_params(sc, sc->mbox, sc->pf, 0, 6, param, val); in get_params__post_init()
5561 device_printf(sc->dev, in get_params__post_init()
5565 sc->tids.ntids = val[0]; in get_params__post_init()
5566 if (sc->params.fw_vers < FW_VERSION32(1, 20, 5, 0)) { in get_params__post_init()
5567 MPASS(sc->tids.ntids >= sc->tids.nhpftids); in get_params__post_init()
5568 sc->tids.ntids -= sc->tids.nhpftids; in get_params__post_init()
5570 sc->tids.natids = min(sc->tids.ntids / 2, MAX_ATIDS); in get_params__post_init()
5572 sc->tids.stid_base = val[1]; in get_params__post_init()
5573 sc->tids.nstids = val[2] - val[1] + 1; in get_params__post_init()
5575 sc->vres.ddp.start = val[3]; in get_params__post_init()
5576 sc->vres.ddp.size = val[4] - val[3] + 1; in get_params__post_init()
5577 sc->params.ofldq_wr_cred = val[5]; in get_params__post_init()
5578 sc->params.offload = 1; in get_params__post_init()
5581 * The firmware attempts memfree TOE configuration for -SO cards in get_params__post_init()
5588 sc->iscsicaps = 0; in get_params__post_init()
5589 sc->rdmacaps = 0; in get_params__post_init()
5591 if (sc->rdmacaps) { in get_params__post_init()
5598 rc = -t4_query_params(sc, sc->mbox, sc->pf, 0, 6, param, val); in get_params__post_init()
5600 device_printf(sc->dev, in get_params__post_init()
5604 sc->vres.stag.start = val[0]; in get_params__post_init()
5605 sc->vres.stag.size = val[1] - val[0] + 1; in get_params__post_init()
5606 sc->vres.rq.start = val[2]; in get_params__post_init()
5607 sc->vres.rq.size = val[3] - val[2] + 1; in get_params__post_init()
5608 sc->vres.pbl.start = val[4]; in get_params__post_init()
5609 sc->vres.pbl.size = val[5] - val[4] + 1; in get_params__post_init()
5617 rc = -t4_query_params(sc, sc->mbox, sc->pf, 0, 6, param, val); in get_params__post_init()
5619 device_printf(sc->dev, in get_params__post_init()
5623 sc->vres.qp.start = val[0]; in get_params__post_init()
5624 sc->vres.qp.size = val[1] - val[0] + 1; in get_params__post_init()
5625 sc->vres.cq.start = val[2]; in get_params__post_init()
5626 sc->vres.cq.size = val[3] - val[2] + 1; in get_params__post_init()
5627 sc->vres.ocq.start = val[4]; in get_params__post_init()
5628 sc->vres.ocq.size = val[5] - val[4] + 1; in get_params__post_init()
5634 rc = -t4_query_params(sc, sc->mbox, sc->pf, 0, 4, param, val); in get_params__post_init()
5636 device_printf(sc->dev, in get_params__post_init()
5640 sc->vres.srq.start = val[0]; in get_params__post_init()
5641 sc->vres.srq.size = val[1] - val[0] + 1; in get_params__post_init()
5642 sc->params.max_ordird_qp = val[2]; in get_params__post_init()
5643 sc->params.max_ird_adapter = val[3]; in get_params__post_init()
5645 if (sc->iscsicaps) { in get_params__post_init()
5648 rc = -t4_query_params(sc, sc->mbox, sc->pf, 0, 2, param, val); in get_params__post_init()
5650 device_printf(sc->dev, in get_params__post_init()
5654 sc->vres.iscsi.start = val[0]; in get_params__post_init()
5655 sc->vres.iscsi.size = val[1] - val[0] + 1; in get_params__post_init()
5657 if (sc->cryptocaps & FW_CAPS_CONFIG_TLSKEYS) { in get_params__post_init()
5660 rc = -t4_query_params(sc, sc->mbox, sc->pf, 0, 2, param, val); in get_params__post_init()
5662 device_printf(sc->dev, in get_params__post_init()
5666 sc->vres.key.start = val[0]; in get_params__post_init()
5667 sc->vres.key.size = val[1] - val[0] + 1; in get_params__post_init()
5676 t4_read_mtu_tbl(sc, sc->params.mtus, NULL); in get_params__post_init()
5677 t4_load_mtus(sc, sc->params.mtus, sc->params.a_wnd, sc->params.b_wnd); in get_params__post_init()
5698 callout_schedule_sbt(&sc->ktls_tick, SBT_1MS, 0, C_HARDCLOCK); in ktls_tick()
5710 rc = -t4_set_params(sc, sc->mbox, sc->pf, 0, 1, ¶m, ¶m); in t6_config_kern_tls()
5718 sc->flags |= KERN_TLS_ON; in t6_config_kern_tls()
5719 callout_reset_sbt(&sc->ktls_tick, SBT_1MS, 0, ktls_tick, sc, in t6_config_kern_tls()
5722 sc->flags &= ~KERN_TLS_ON; in t6_config_kern_tls()
5723 callout_stop(&sc->ktls_tick); in t6_config_kern_tls()
5741 (void)t4_set_params(sc, sc->mbox, sc->pf, 0, 1, ¶m, &val); in set_params__post_init()
5746 if (t4_set_params(sc, sc->mbox, sc->pf, 0, 1, ¶m, &val) == 0) in set_params__post_init()
5747 sc->params.port_caps32 = 1; in set_params__post_init()
5750 val = 1 << (G_MASKSIZE(t4_read_reg(sc, A_TP_RSS_CONFIG_TNL)) - 1); in set_params__post_init()
5752 V_MASKFILTER(val - 1)); in set_params__post_init()
5828 if (t4_toe_rexmt_backoff[i] != -1) { in set_params__post_init()
5847 sc->tlst.inline_keys = t4_tls_inline_keys; in set_params__post_init()
5848 sc->tlst.combo_wrs = t4_tls_combo_wrs; in set_params__post_init()
5862 struct adapter_params *p = &sc->params; in t4_set_desc()
5864 device_set_descf(sc->dev, "Chelsio %s", p->vpd.id); in t4_set_desc()
5893 ifm = &pi->media; in set_current_media()
5894 if (ifm->ifm_cur != NULL && in set_current_media()
5895 IFM_SUBTYPE(ifm->ifm_cur->ifm_media) == IFM_NONE) in set_current_media()
5898 lc = &pi->link_cfg; in set_current_media()
5899 if (lc->requested_aneg != AUTONEG_DISABLE && in set_current_media()
5900 lc->pcaps & FW_PORT_CAP32_ANEG) { in set_current_media()
5905 if (lc->requested_fc & PAUSE_TX) in set_current_media()
5907 if (lc->requested_fc & PAUSE_RX) in set_current_media()
5909 if (lc->requested_speed == 0) in set_current_media()
5910 speed = port_top_speed(pi) * 1000; /* Gbps -> Mbps */ in set_current_media()
5912 speed = lc->requested_speed; in set_current_media()
5924 return (pi->port_type == FW_PORT_TYPE_BT_SGMII || in fixed_ifmedia()
5925 pi->port_type == FW_PORT_TYPE_BT_XFI || in fixed_ifmedia()
5926 pi->port_type == FW_PORT_TYPE_BT_XAUI || in fixed_ifmedia()
5927 pi->port_type == FW_PORT_TYPE_KX4 || in fixed_ifmedia()
5928 pi->port_type == FW_PORT_TYPE_KX || in fixed_ifmedia()
5929 pi->port_type == FW_PORT_TYPE_KR || in fixed_ifmedia()
5930 pi->port_type == FW_PORT_TYPE_BP_AP || in fixed_ifmedia()
5931 pi->port_type == FW_PORT_TYPE_BP4_AP || in fixed_ifmedia()
5932 pi->port_type == FW_PORT_TYPE_BP40_BA || in fixed_ifmedia()
5933 pi->port_type == FW_PORT_TYPE_KR4_100G || in fixed_ifmedia()
5934 pi->port_type == FW_PORT_TYPE_KR_SFP28 || in fixed_ifmedia()
5935 pi->port_type == FW_PORT_TYPE_KR_XLAUI); in fixed_ifmedia()
5948 if (pi->flags & FIXED_IFMEDIA) in build_medialist()
5954 ifm = &pi->media; in build_medialist()
5956 lc = &pi->link_cfg; in build_medialist()
5957 ss = G_FW_PORT_CAP32_SPEED(lc->pcaps); /* Supported Speeds */ in build_medialist()
5961 MPASS(LIST_EMPTY(&ifm->ifm_list)); in build_medialist()
5983 if (lc->pcaps & FW_PORT_CAP32_ANEG) in build_medialist()
5995 struct link_config *lc = &pi->link_cfg; in init_link_config()
5999 lc->requested_caps = 0; in init_link_config()
6000 lc->requested_speed = 0; in init_link_config()
6003 lc->requested_aneg = AUTONEG_DISABLE; in init_link_config()
6005 lc->requested_aneg = AUTONEG_ENABLE; in init_link_config()
6007 lc->requested_aneg = AUTONEG_AUTO; in init_link_config()
6009 lc->requested_fc = t4_pause_settings & (PAUSE_TX | PAUSE_RX | in init_link_config()
6013 lc->requested_fec = FEC_AUTO; in init_link_config()
6015 lc->requested_fec = FEC_NONE; in init_link_config()
6017 /* -1 is handled by the FEC_AUTO block above and not here. */ in init_link_config()
6018 lc->requested_fec = t4_fec & in init_link_config()
6020 if (lc->requested_fec == 0) in init_link_config()
6021 lc->requested_fec = FEC_AUTO; in init_link_config()
6024 lc->force_fec = -1; in init_link_config()
6026 lc->force_fec = 1; in init_link_config()
6028 lc->force_fec = 0; in init_link_config()
6039 struct link_config *lc = &pi->link_cfg; in fixup_link_config()
6045 if (lc->requested_speed != 0) { in fixup_link_config()
6046 fwspeed = speed_to_fwcap(lc->requested_speed); in fixup_link_config()
6047 if ((fwspeed & lc->pcaps) == 0) { in fixup_link_config()
6049 lc->requested_speed = 0; in fixup_link_config()
6054 MPASS(lc->requested_aneg == AUTONEG_ENABLE || in fixup_link_config()
6055 lc->requested_aneg == AUTONEG_DISABLE || in fixup_link_config()
6056 lc->requested_aneg == AUTONEG_AUTO); in fixup_link_config()
6057 if (lc->requested_aneg == AUTONEG_ENABLE && in fixup_link_config()
6058 !(lc->pcaps & FW_PORT_CAP32_ANEG)) { in fixup_link_config()
6060 lc->requested_aneg = AUTONEG_AUTO; in fixup_link_config()
6064 MPASS((lc->requested_fc & ~(PAUSE_TX | PAUSE_RX | PAUSE_AUTONEG)) == 0); in fixup_link_config()
6065 if (lc->requested_fc & PAUSE_TX && in fixup_link_config()
6066 !(lc->pcaps & FW_PORT_CAP32_FC_TX)) { in fixup_link_config()
6068 lc->requested_fc &= ~PAUSE_TX; in fixup_link_config()
6070 if (lc->requested_fc & PAUSE_RX && in fixup_link_config()
6071 !(lc->pcaps & FW_PORT_CAP32_FC_RX)) { in fixup_link_config()
6073 lc->requested_fc &= ~PAUSE_RX; in fixup_link_config()
6075 if (!(lc->requested_fc & PAUSE_AUTONEG) && in fixup_link_config()
6076 !(lc->pcaps & FW_PORT_CAP32_FORCE_PAUSE)) { in fixup_link_config()
6078 lc->requested_fc |= PAUSE_AUTONEG; in fixup_link_config()
6082 if ((lc->requested_fec & FEC_RS && in fixup_link_config()
6083 !(lc->pcaps & FW_PORT_CAP32_FEC_RS)) || in fixup_link_config()
6084 (lc->requested_fec & FEC_BASER_RS && in fixup_link_config()
6085 !(lc->pcaps & FW_PORT_CAP32_FEC_BASER_RS))) { in fixup_link_config()
6087 lc->requested_fec = FEC_AUTO; in fixup_link_config()
6100 struct adapter *sc = pi->adapter; in apply_link_config()
6101 struct link_config *lc = &pi->link_cfg; in apply_link_config()
6108 if (lc->requested_aneg == AUTONEG_ENABLE) in apply_link_config()
6109 MPASS(lc->pcaps & FW_PORT_CAP32_ANEG); in apply_link_config()
6110 if (!(lc->requested_fc & PAUSE_AUTONEG)) in apply_link_config()
6111 MPASS(lc->pcaps & FW_PORT_CAP32_FORCE_PAUSE); in apply_link_config()
6112 if (lc->requested_fc & PAUSE_TX) in apply_link_config()
6113 MPASS(lc->pcaps & FW_PORT_CAP32_FC_TX); in apply_link_config()
6114 if (lc->requested_fc & PAUSE_RX) in apply_link_config()
6115 MPASS(lc->pcaps & FW_PORT_CAP32_FC_RX); in apply_link_config()
6116 if (lc->requested_fec & FEC_RS) in apply_link_config()
6117 MPASS(lc->pcaps & FW_PORT_CAP32_FEC_RS); in apply_link_config()
6118 if (lc->requested_fec & FEC_BASER_RS) in apply_link_config()
6119 MPASS(lc->pcaps & FW_PORT_CAP32_FEC_BASER_RS); in apply_link_config()
6121 if (!(sc->flags & IS_VF)) { in apply_link_config()
6122 rc = -t4_link_l1cfg(sc, sc->mbox, pi->tx_chan, lc); in apply_link_config()
6124 device_printf(pi->dev, "l1cfg failed: %d\n", rc); in apply_link_config()
6130 * An L1_CFG will almost always result in a link-change event if the in apply_link_config()
6138 if (lc->link_ok && !(lc->requested_fc & PAUSE_AUTONEG)) in apply_link_config()
6139 lc->fc = lc->requested_fc & (PAUSE_TX | PAUSE_RX); in apply_link_config()
6158 struct vi_info *vi = if_getsoftc(ctx->ifp); in add_maddr()
6159 struct port_info *pi = vi->pi; in add_maddr()
6160 struct adapter *sc = pi->adapter; in add_maddr()
6162 if (ctx->rc < 0) in add_maddr()
6165 ctx->mcaddr[ctx->i] = LLADDR(sdl); in add_maddr()
6166 MPASS(ETHER_IS_MULTICAST(ctx->mcaddr[ctx->i])); in add_maddr()
6167 ctx->i++; in add_maddr()
6169 if (ctx->i == FW_MAC_EXACT_CHUNK) { in add_maddr()
6170 ctx->rc = t4_alloc_mac_filt(sc, sc->mbox, vi->viid, ctx->del, in add_maddr()
6171 ctx->i, ctx->mcaddr, NULL, &ctx->hash, 0); in add_maddr()
6172 if (ctx->rc < 0) { in add_maddr()
6175 for (j = 0; j < ctx->i; j++) { in add_maddr()
6176 if_printf(ctx->ifp, in add_maddr()
6180 ctx->mcaddr[j][0], ctx->mcaddr[j][1], in add_maddr()
6181 ctx->mcaddr[j][2], ctx->mcaddr[j][3], in add_maddr()
6182 ctx->mcaddr[j][4], ctx->mcaddr[j][5], in add_maddr()
6183 -ctx->rc); in add_maddr()
6187 ctx->del = 0; in add_maddr()
6188 ctx->i = 0; in add_maddr()
6203 struct port_info *pi = vi->pi; in update_mac_settings()
6204 struct adapter *sc = pi->adapter; in update_mac_settings()
6205 int mtu = -1, promisc = -1, allmulti = -1, vlanex = -1; in update_mac_settings()
6224 rc = -t4_set_rxmode(sc, sc->mbox, vi->viid, mtu, promisc, in update_mac_settings()
6237 rc = t4_change_mac(sc, sc->mbox, vi->viid, vi->xact_addr_filt, in update_mac_settings()
6238 ucaddr, true, &vi->smt_idx); in update_mac_settings()
6240 rc = -rc; in update_mac_settings()
6244 vi->xact_addr_filt = rc; in update_mac_settings()
6269 rc = -ctx.rc; in update_mac_settings()
6273 rc = t4_alloc_mac_filt(sc, sc->mbox, vi->viid, in update_mac_settings()
6277 rc = -rc; in update_mac_settings()
6294 rc = -t4_set_addr_hash(sc, sc->mbox, vi->viid, 0, ctx.hash, 0); in update_mac_settings()
6300 pi->vxlan_tcam_entry = false; in update_mac_settings()
6304 if (IS_MAIN_VI(vi) && sc->vxlan_refcount > 0 && in update_mac_settings()
6305 pi->vxlan_tcam_entry == false) { in update_mac_settings()
6306 rc = t4_alloc_raw_mac_filt(sc, vi->viid, match_all_mac, in update_mac_settings()
6307 match_all_mac, sc->rawf_base + pi->port_id, 1, pi->port_id, in update_mac_settings()
6310 rc = -rc; in update_mac_settings()
6314 MPASS(rc == sc->rawf_base + pi->port_id); in update_mac_settings()
6316 pi->vxlan_tcam_entry = true; in update_mac_settings()
6362 if (mtx_sleep(&sc->flags, &sc->sc_lock, pri, wmesg, 0)) { in begin_synchronized_op()
6371 sc->last_op = wmesg; in begin_synchronized_op()
6372 sc->last_op_thr = curthread; in begin_synchronized_op()
6373 sc->last_op_flags = flags; in begin_synchronized_op()
6393 wakeup(&sc->flags); in begin_vi_detach()
6395 mtx_sleep(&sc->flags, &sc->sc_lock, 0, "t4detach", 0); in begin_vi_detach()
6398 sc->last_op = "t4detach"; in begin_vi_detach()
6399 sc->last_op_thr = curthread; in begin_vi_detach()
6400 sc->last_op_flags = 0; in begin_vi_detach()
6412 wakeup(&sc->flags); in end_vi_detach()
6430 wakeup(&sc->flags); in end_synchronized_op()
6437 struct port_info *pi = vi->pi; in cxgbe_init_synchronized()
6438 struct adapter *sc = pi->adapter; in cxgbe_init_synchronized()
6439 if_t ifp = vi->ifp; in cxgbe_init_synchronized()
6448 if (!(sc->flags & FULL_INIT_DONE) && ((rc = adapter_init(sc)) != 0)) in cxgbe_init_synchronized()
6451 if (!(vi->flags & VI_INIT_DONE) && ((rc = vi_init(vi)) != 0)) in cxgbe_init_synchronized()
6459 if (pi->up_vis == 0) { in cxgbe_init_synchronized()
6466 rc = -t4_enable_vi(sc, sc->mbox, vi->viid, true, true); in cxgbe_init_synchronized()
6480 txq->eq.flags |= EQ_ENABLED; in cxgbe_init_synchronized()
6487 if (sc->traceq < 0 && IS_MAIN_VI(vi)) { in cxgbe_init_synchronized()
6488 sc->traceq = sc->sge.rxq[vi->first_rxq].iq.abs_id; in cxgbe_init_synchronized()
6490 A_MPS_T5_TRC_RSS_CONTROL, V_RSSCONTROL(pi->tx_chan) | in cxgbe_init_synchronized()
6491 V_QUEUENUMBER(sc->traceq)); in cxgbe_init_synchronized()
6492 pi->flags |= HAS_TRACEQ; in cxgbe_init_synchronized()
6496 pi->up_vis++; in cxgbe_init_synchronized()
6498 if (pi->link_cfg.link_ok) in cxgbe_init_synchronized()
6502 mtx_lock(&vi->tick_mtx); in cxgbe_init_synchronized()
6503 if (vi->pi->nvi > 1 || sc->flags & IS_VF) in cxgbe_init_synchronized()
6504 callout_reset(&vi->tick, hz, vi_tick, vi); in cxgbe_init_synchronized()
6506 callout_reset(&vi->tick, hz, cxgbe_tick, vi); in cxgbe_init_synchronized()
6507 mtx_unlock(&vi->tick_mtx); in cxgbe_init_synchronized()
6521 struct port_info *pi = vi->pi; in cxgbe_uninit_synchronized()
6522 struct adapter *sc = pi->adapter; in cxgbe_uninit_synchronized()
6523 if_t ifp = vi->ifp; in cxgbe_uninit_synchronized()
6529 if (!(vi->flags & VI_INIT_DONE)) { in cxgbe_uninit_synchronized()
6533 "vi->flags 0x%016lx, if_flags 0x%08x, " in cxgbe_uninit_synchronized()
6534 "if_drv_flags 0x%08x\n", vi->flags, if_getflags(ifp), in cxgbe_uninit_synchronized()
6547 rc = -t4_enable_vi(sc, sc->mbox, vi->viid, false, false); in cxgbe_uninit_synchronized()
6555 txq->eq.flags &= ~EQ_ENABLED; in cxgbe_uninit_synchronized()
6559 mtx_lock(&vi->tick_mtx); in cxgbe_uninit_synchronized()
6560 callout_stop(&vi->tick); in cxgbe_uninit_synchronized()
6561 mtx_unlock(&vi->tick_mtx); in cxgbe_uninit_synchronized()
6569 pi->up_vis--; in cxgbe_uninit_synchronized()
6570 if (pi->up_vis > 0) { in cxgbe_uninit_synchronized()
6575 pi->link_cfg.link_ok = false; in cxgbe_uninit_synchronized()
6576 pi->link_cfg.speed = 0; in cxgbe_uninit_synchronized()
6577 pi->link_cfg.link_down_rc = 255; in cxgbe_uninit_synchronized()
6586 * will walk the entire sc->irq list and clean up whatever is valid.
6596 struct sge *sge = &sc->sge; in t4_setup_intr_handlers()
6611 irq = &sc->irq[0]; in t4_setup_intr_handlers()
6612 rid = sc->intr_type == INTR_INTX ? 0 : 1; in t4_setup_intr_handlers()
6617 if (sc->flags & IS_VF) in t4_setup_intr_handlers()
6618 KASSERT(sc->intr_count >= T4VF_EXTRA_INTR + sc->params.nports, in t4_setup_intr_handlers()
6621 KASSERT(sc->intr_count >= T4_EXTRA_INTR + sc->params.nports, in t4_setup_intr_handlers()
6625 if (!(sc->flags & IS_VF)) { in t4_setup_intr_handlers()
6634 rc = t4_alloc_irq(sc, irq, rid, t4_intr_evt, &sge->fwq, "evt"); in t4_setup_intr_handlers()
6641 pi = sc->port[p]; in t4_setup_intr_handlers()
6643 vi->first_intr = rid - 1; in t4_setup_intr_handlers()
6645 if (vi->nnmrxq > 0) { in t4_setup_intr_handlers()
6646 int n = max(vi->nrxq, vi->nnmrxq); in t4_setup_intr_handlers()
6648 rxq = &sge->rxq[vi->first_rxq]; in t4_setup_intr_handlers()
6650 nm_rxq = &sge->nm_rxq[vi->first_nm_rxq]; in t4_setup_intr_handlers()
6655 if (q < vi->nrxq) in t4_setup_intr_handlers()
6656 irq->rxq = rxq++; in t4_setup_intr_handlers()
6658 if (q < vi->nnmrxq) in t4_setup_intr_handlers()
6659 irq->nm_rxq = nm_rxq++; in t4_setup_intr_handlers()
6661 if (irq->nm_rxq != NULL && in t4_setup_intr_handlers()
6662 irq->rxq == NULL) { in t4_setup_intr_handlers()
6665 t4_nm_intr, irq->nm_rxq, s); in t4_setup_intr_handlers()
6667 if (irq->nm_rxq != NULL && in t4_setup_intr_handlers()
6668 irq->rxq != NULL) { in t4_setup_intr_handlers()
6674 if (irq->rxq != NULL && in t4_setup_intr_handlers()
6675 irq->nm_rxq == NULL) { in t4_setup_intr_handlers()
6678 t4_intr, irq->rxq, s); in t4_setup_intr_handlers()
6683 if (q < vi->nrxq) { in t4_setup_intr_handlers()
6684 bus_bind_intr(sc->dev, irq->res, in t4_setup_intr_handlers()
6690 vi->nintr++; in t4_setup_intr_handlers()
6701 bus_bind_intr(sc->dev, irq->res, in t4_setup_intr_handlers()
6706 vi->nintr++; in t4_setup_intr_handlers()
6718 vi->nintr++; in t4_setup_intr_handlers()
6723 MPASS(irq == &sc->irq[sc->intr_count]); in t4_setup_intr_handlers()
6740 rss_key[i] = htobe32(raw_rss_key[nitems(rss_key) - 1 - i]); in write_global_rss_key()
6742 t4_write_rss_key(sc, &rss_key[0], -1, 1); in write_global_rss_key()
6763 MPASS(sc->params.nports <= nitems(sc->tq)); in adapter_full_init()
6764 for (i = 0; i < sc->params.nports; i++) { in adapter_full_init()
6765 if (sc->tq[i] != NULL) in adapter_full_init()
6767 sc->tq[i] = taskqueue_create("t4 taskq", M_NOWAIT, in adapter_full_init()
6768 taskqueue_thread_enqueue, &sc->tq[i]); in adapter_full_init()
6769 if (sc->tq[i] == NULL) { in adapter_full_init()
6773 taskqueue_start_threads(&sc->tq[i], 1, PI_NET, "%s tq%d", in adapter_full_init()
6774 device_get_nameunit(sc->dev), i); in adapter_full_init()
6777 if (!(sc->flags & IS_VF)) { in adapter_full_init()
6791 KASSERT((sc->flags & FULL_INIT_DONE) == 0, in adapter_init()
6798 sc->flags |= FULL_INIT_DONE; in adapter_init()
6813 for (i = 0; i < nitems(sc->tq); i++) { in adapter_full_uninit()
6814 if (sc->tq[i] == NULL) in adapter_full_uninit()
6816 taskqueue_free(sc->tq[i]); in adapter_full_uninit()
6817 sc->tq[i] = NULL; in adapter_full_uninit()
6820 sc->flags &= ~FULL_INIT_DONE; in adapter_full_uninit()
6865 * enabling any 4-tuple hash is nonsense configuration. in hashen_to_hashconfig()
6894 struct adapter *sc = vi->adapter; in vi_full_init()
6915 if (vi->nrxq > vi->rss_size) { in vi_full_init()
6917 "some queues will never receive traffic.\n", vi->nrxq, in vi_full_init()
6918 vi->rss_size); in vi_full_init()
6919 } else if (vi->rss_size % vi->nrxq) { in vi_full_init()
6921 "expect uneven traffic distribution.\n", vi->nrxq, in vi_full_init()
6922 vi->rss_size); in vi_full_init()
6925 if (vi->nrxq != nbuckets) { in vi_full_init()
6927 "performance will be impacted.\n", vi->nrxq, nbuckets); in vi_full_init()
6930 if (vi->rss == NULL) in vi_full_init()
6931 vi->rss = malloc(vi->rss_size * sizeof (*vi->rss), M_CXGBE, in vi_full_init()
6933 for (i = 0; i < vi->rss_size;) { in vi_full_init()
6936 j %= vi->nrxq; in vi_full_init()
6937 rxq = &sc->sge.rxq[vi->first_rxq + j]; in vi_full_init()
6938 vi->rss[i++] = rxq->iq.abs_id; in vi_full_init()
6941 vi->rss[i++] = rxq->iq.abs_id; in vi_full_init()
6942 if (i == vi->rss_size) in vi_full_init()
6948 rc = -t4_config_rss_range(sc, sc->mbox, vi->viid, 0, vi->rss_size, in vi_full_init()
6949 vi->rss, vi->rss_size); in vi_full_init()
6956 vi->hashen = hashconfig_to_hashen(hashconfig); in vi_full_init()
6963 extra = hashen_to_hashconfig(vi->hashen) ^ hashconfig; in vi_full_init()
6980 CH_ALERT(vi, "IPv4 2-tuple hashing forced on.\n"); in vi_full_init()
6982 CH_ALERT(vi, "TCP/IPv4 4-tuple hashing forced on.\n"); in vi_full_init()
6984 CH_ALERT(vi, "IPv6 2-tuple hashing forced on.\n"); in vi_full_init()
6986 CH_ALERT(vi, "TCP/IPv6 4-tuple hashing forced on.\n"); in vi_full_init()
6988 CH_ALERT(vi, "UDP/IPv4 4-tuple hashing forced on.\n"); in vi_full_init()
6990 CH_ALERT(vi, "UDP/IPv6 4-tuple hashing forced on.\n"); in vi_full_init()
6992 vi->hashen = F_FW_RSS_VI_CONFIG_CMD_IP6FOURTUPEN | in vi_full_init()
6997 rc = -t4_config_vi_rss(sc, sc->mbox, vi->viid, vi->hashen, vi->rss[0], in vi_full_init()
7012 ASSERT_SYNCHRONIZED_OP(vi->adapter); in vi_init()
7013 KASSERT((vi->flags & VI_INIT_DONE) == 0, in vi_init()
7020 vi->flags |= VI_INIT_DONE; in vi_init()
7032 if (vi->flags & VI_INIT_DONE) { in vi_full_uninit()
7034 free(vi->rss, M_CXGBE); in vi_full_uninit()
7035 free(vi->nm_rss, M_CXGBE); in vi_full_uninit()
7039 vi->flags &= ~VI_INIT_DONE; in vi_full_uninit()
7045 struct sge_eq *eq = &txq->eq; in quiesce_txq()
7046 struct sge_qstat *spg = (void *)&eq->desc[eq->sidx]; in quiesce_txq()
7048 MPASS(eq->flags & EQ_SW_ALLOCATED); in quiesce_txq()
7049 MPASS(!(eq->flags & EQ_ENABLED)); in quiesce_txq()
7052 while (!mp_ring_is_idle(txq->r)) { in quiesce_txq()
7053 mp_ring_check_drainage(txq->r, 4096); in quiesce_txq()
7056 MPASS(txq->txp.npkt == 0); in quiesce_txq()
7058 if (eq->flags & EQ_HW_ALLOCATED) { in quiesce_txq()
7064 while (spg->cidx != htobe16(eq->pidx)) in quiesce_txq()
7066 while (eq->cidx != eq->pidx) in quiesce_txq()
7074 while (eq->cidx != eq->pidx) { in quiesce_txq()
7078 txsd = &txq->sdesc[eq->cidx]; in quiesce_txq()
7079 for (m = txsd->m; m != NULL; m = nextpkt) { in quiesce_txq()
7080 nextpkt = m->m_nextpkt; in quiesce_txq()
7081 m->m_nextpkt = NULL; in quiesce_txq()
7084 IDXINCR(eq->cidx, txsd->desc_used, eq->sidx); in quiesce_txq()
7086 spg->pidx = spg->cidx = htobe16(eq->cidx); in quiesce_txq()
7097 while ((wr = STAILQ_FIRST(&wrq->wr_list)) != NULL) { in quiesce_wrq()
7098 STAILQ_REMOVE_HEAD(&wrq->wr_list, link); in quiesce_wrq()
7100 wrq->nwr_pending--; in quiesce_wrq()
7101 wrq->ndesc_needed -= howmany(wr->wr_len, EQ_ESIZE); in quiesce_wrq()
7105 MPASS(wrq->nwr_pending == 0); in quiesce_wrq()
7106 MPASS(wrq->ndesc_needed == 0); in quiesce_wrq()
7107 wrq->nwr_pending = 0; in quiesce_wrq()
7108 wrq->ndesc_needed = 0; in quiesce_wrq()
7116 while (!atomic_cmpset_int(&iq->state, IQS_IDLE, IQS_DISABLED)) in quiesce_iq_fl()
7120 MPASS(iq->flags & IQ_HAS_FL); in quiesce_iq_fl()
7122 mtx_lock(&sc->sfl_lock); in quiesce_iq_fl()
7124 fl->flags |= FL_DOOMED; in quiesce_iq_fl()
7126 callout_stop(&sc->sfl_callout); in quiesce_iq_fl()
7127 mtx_unlock(&sc->sfl_lock); in quiesce_iq_fl()
7129 KASSERT((fl->flags & FL_STARVING) == 0, in quiesce_iq_fl()
7133 if (!(iq->flags & IQ_HW_ALLOCATED)) in quiesce_iq_fl()
7147 struct adapter *sc = vi->adapter; in quiesce_vi()
7157 if (!(vi->flags & VI_INIT_DONE)) in quiesce_vi()
7166 quiesce_wrq(&ofld_txq->wrq); in quiesce_vi()
7171 quiesce_iq_fl(sc, &rxq->iq, &rxq->fl); in quiesce_vi()
7176 quiesce_iq_fl(sc, &ofld_rxq->iq, &ofld_rxq->fl); in quiesce_vi()
7187 irq->rid = rid; in t4_alloc_irq()
7188 irq->res = bus_alloc_resource_any(sc->dev, SYS_RES_IRQ, &irq->rid, in t4_alloc_irq()
7190 if (irq->res == NULL) { in t4_alloc_irq()
7191 device_printf(sc->dev, in t4_alloc_irq()
7196 rc = bus_setup_intr(sc->dev, irq->res, INTR_MPSAFE | INTR_TYPE_NET, in t4_alloc_irq()
7197 NULL, handler, arg, &irq->tag); in t4_alloc_irq()
7199 device_printf(sc->dev, in t4_alloc_irq()
7203 bus_describe_intr(sc->dev, irq->res, irq->tag, "%s", name); in t4_alloc_irq()
7211 if (irq->tag) in t4_free_irq()
7212 bus_teardown_intr(sc->dev, irq->res, irq->tag); in t4_free_irq()
7213 if (irq->res) in t4_free_irq()
7214 bus_release_resource(sc->dev, SYS_RES_IRQ, irq->rid, irq->res); in t4_free_irq()
7225 regs->version = chip_id(sc) | chip_rev(sc) << 10; in get_regs()
7226 t4_get_regs(sc, buf, regs->len); in get_regs()
7253 if (sc->flags & IS_VF) { in read_vf_stat()
7257 mtx_assert(&sc->reg_lock, MA_OWNED); in read_vf_stat()
7273 if (!(sc->flags & IS_VF)) in t4_get_vi_stats()
7274 mtx_lock(&sc->reg_lock); in t4_get_vi_stats()
7275 stats->tx_bcast_bytes = GET_STAT(TX_VF_BCAST_BYTES); in t4_get_vi_stats()
7276 stats->tx_bcast_frames = GET_STAT(TX_VF_BCAST_FRAMES); in t4_get_vi_stats()
7277 stats->tx_mcast_bytes = GET_STAT(TX_VF_MCAST_BYTES); in t4_get_vi_stats()
7278 stats->tx_mcast_frames = GET_STAT(TX_VF_MCAST_FRAMES); in t4_get_vi_stats()
7279 stats->tx_ucast_bytes = GET_STAT(TX_VF_UCAST_BYTES); in t4_get_vi_stats()
7280 stats->tx_ucast_frames = GET_STAT(TX_VF_UCAST_FRAMES); in t4_get_vi_stats()
7281 stats->tx_drop_frames = GET_STAT(TX_VF_DROP_FRAMES); in t4_get_vi_stats()
7282 stats->tx_offload_bytes = GET_STAT(TX_VF_OFFLOAD_BYTES); in t4_get_vi_stats()
7283 stats->tx_offload_frames = GET_STAT(TX_VF_OFFLOAD_FRAMES); in t4_get_vi_stats()
7284 stats->rx_bcast_bytes = GET_STAT(RX_VF_BCAST_BYTES); in t4_get_vi_stats()
7285 stats->rx_bcast_frames = GET_STAT(RX_VF_BCAST_FRAMES); in t4_get_vi_stats()
7286 stats->rx_mcast_bytes = GET_STAT(RX_VF_MCAST_BYTES); in t4_get_vi_stats()
7287 stats->rx_mcast_frames = GET_STAT(RX_VF_MCAST_FRAMES); in t4_get_vi_stats()
7288 stats->rx_ucast_bytes = GET_STAT(RX_VF_UCAST_BYTES); in t4_get_vi_stats()
7289 stats->rx_ucast_frames = GET_STAT(RX_VF_UCAST_FRAMES); in t4_get_vi_stats()
7290 stats->rx_err_frames = GET_STAT(RX_VF_ERR_FRAMES); in t4_get_vi_stats()
7291 if (!(sc->flags & IS_VF)) in t4_get_vi_stats()
7292 mtx_unlock(&sc->reg_lock); in t4_get_vi_stats()
7313 const struct timeval interval = {0, 250000}; /* 250ms */ in vi_refresh_stats()
7315 mtx_assert(&vi->tick_mtx, MA_OWNED); in vi_refresh_stats()
7317 if (vi->flags & VI_SKIP_STATS) in vi_refresh_stats()
7322 if (timevalcmp(&tv, &vi->last_refreshed, <)) in vi_refresh_stats()
7325 t4_get_vi_stats(vi->adapter, vi->vin, &vi->stats); in vi_refresh_stats()
7326 getmicrotime(&vi->last_refreshed); in vi_refresh_stats()
7334 const struct timeval interval = {0, 250000}; /* 250ms */ in cxgbe_refresh_stats()
7338 mtx_assert(&vi->tick_mtx, MA_OWNED); in cxgbe_refresh_stats()
7340 if (vi->flags & VI_SKIP_STATS) in cxgbe_refresh_stats()
7345 if (timevalcmp(&tv, &vi->last_refreshed, <)) in cxgbe_refresh_stats()
7348 pi = vi->pi; in cxgbe_refresh_stats()
7349 sc = vi->adapter; in cxgbe_refresh_stats()
7351 t4_get_port_stats(sc, pi->port_id, &pi->stats); in cxgbe_refresh_stats()
7352 chan_map = pi->rx_e_chan_map; in cxgbe_refresh_stats()
7354 i = ffs(chan_map) - 1; in cxgbe_refresh_stats()
7355 mtx_lock(&sc->reg_lock); in cxgbe_refresh_stats()
7358 mtx_unlock(&sc->reg_lock); in cxgbe_refresh_stats()
7362 pi->tnl_cong_drops = tnl_cong_drops; in cxgbe_refresh_stats()
7363 getmicrotime(&vi->last_refreshed); in cxgbe_refresh_stats()
7372 mtx_assert(&vi->tick_mtx, MA_OWNED); in cxgbe_tick()
7375 callout_schedule(&vi->tick, hz); in cxgbe_tick()
7383 mtx_assert(&vi->tick_mtx, MA_OWNED); in vi_tick()
7386 callout_schedule(&vi->tick, hz); in vi_tick()
7414 struct sysctl_ctx_list *ctx = &sc->ctx; in t4_sysctls()
7422 oid = device_get_sysctl_tree(sc->dev); in t4_sysctls()
7425 sc->sc_do_rxcopy = 1; in t4_sysctls()
7427 &sc->sc_do_rxcopy, 1, "Do RX copy of small frames"); in t4_sysctls()
7430 sc->params.nports, "# of ports"); in t4_sysctls()
7434 (uintptr_t)&sc->doorbells, sysctl_bitfield_8b, "A", in t4_sysctls()
7438 sc->params.vpd.cclk, "core clock frequency (in KHz)"); in t4_sysctls()
7442 sc->params.sge.timer_val, sizeof(sc->params.sge.timer_val), in t4_sysctls()
7447 sc->params.sge.counter_val, sizeof(sc->params.sge.counter_val), in t4_sysctls()
7452 sc->lro_timeout = 100; in t4_sysctls()
7454 &sc->lro_timeout, 0, "lro inactive-flush timeout (in us)"); in t4_sysctls()
7457 &sc->debug_flags, 0, "flags to enable runtime debugging"); in t4_sysctls()
7460 CTLFLAG_RD, sc->tp_version, 0, "TP microcode version"); in t4_sysctls()
7463 CTLFLAG_RD, sc->fw_version, 0, "firmware version"); in t4_sysctls()
7465 if (sc->flags & IS_VF) in t4_sysctls()
7472 CTLFLAG_RD, sc->params.vpd.sn, 0, "serial number"); in t4_sysctls()
7475 CTLFLAG_RD, sc->params.vpd.pn, 0, "part number"); in t4_sysctls()
7478 CTLFLAG_RD, sc->params.vpd.ec, 0, "engineering change"); in t4_sysctls()
7481 CTLFLAG_RD, sc->params.vpd.md, 0, "manufacturing diags version"); in t4_sysctls()
7484 CTLFLAG_RD, sc->params.vpd.na, 0, "network address"); in t4_sysctls()
7487 sc->er_version, 0, "expansion ROM version"); in t4_sysctls()
7490 sc->bs_version, 0, "bootstrap firmware version"); in t4_sysctls()
7493 NULL, sc->params.scfg_vers, "serial config version"); in t4_sysctls()
7496 NULL, sc->params.vpd_vers, "VPD version"); in t4_sysctls()
7499 CTLFLAG_RD, sc->cfg_file, 0, "configuration file"); in t4_sysctls()
7502 sc->cfcsum, "config file checksum"); in t4_sysctls()
7507 (uintptr_t)&sc->name, sysctl_bitfield_16b, "A", \ in t4_sysctls()
7522 NULL, sc->tids.nftids, "number of filters"); in t4_sysctls()
7549 &sc->swintr, 0, "software triggered interrupts"); in t4_sysctls()
7627 "CIM OBQ 6 (SGE0-RX)"); in t4_sysctls()
7632 "CIM OBQ 7 (SGE1-RX)"); in t4_sysctls()
7649 sysctl_ddp_stats, "A", "non-TCP DDP statistics"); in t4_sysctls()
7732 sysctl_tx_rate, "A", "Tx rate"); in t4_sysctls()
7754 CTLFLAG_RW, &sc->tlst.inline_keys, 0, "Always pass TLS " in t4_sysctls()
7760 CTLFLAG_RW, &sc->tlst.combo_wrs, 0, "Attempt to " in t4_sysctls()
7778 sc->tt.cong_algorithm = -1; in t4_sysctls()
7780 CTLFLAG_RW, &sc->tt.cong_algorithm, 0, "congestion control " in t4_sysctls()
7781 "(-1 = default, 0 = reno, 1 = tahoe, 2 = newreno, " in t4_sysctls()
7784 sc->tt.sndbuf = -1; in t4_sysctls()
7786 &sc->tt.sndbuf, 0, "hardware send buffer"); in t4_sysctls()
7788 sc->tt.ddp = 0; in t4_sysctls()
7790 CTLFLAG_RW | CTLFLAG_SKIP, &sc->tt.ddp, 0, ""); in t4_sysctls()
7792 &sc->tt.ddp, 0, "Enable zero-copy aio_read(2)"); in t4_sysctls()
7794 sc->tt.rx_coalesce = -1; in t4_sysctls()
7796 CTLFLAG_RW, &sc->tt.rx_coalesce, 0, "receive coalescing"); in t4_sysctls()
7798 sc->tt.tls = 0; in t4_sysctls()
7803 sc->tt.tx_align = -1; in t4_sysctls()
7805 CTLFLAG_RW, &sc->tt.tx_align, 0, "chop and align payload"); in t4_sysctls()
7807 sc->tt.tx_zcopy = 0; in t4_sysctls()
7809 CTLFLAG_RW, &sc->tt.tx_zcopy, 0, in t4_sysctls()
7810 "Enable zero-copy aio_write(2)"); in t4_sysctls()
7812 sc->tt.cop_managed_offloading = !!t4_cop_managed_offloading; in t4_sysctls()
7815 &sc->tt.cop_managed_offloading, 0, in t4_sysctls()
7818 sc->tt.autorcvbuf_inc = 16 * 1024; in t4_sysctls()
7820 CTLFLAG_RW, &sc->tt.autorcvbuf_inc, 0, in t4_sysctls()
7823 sc->tt.update_hc_on_pmtu_change = 1; in t4_sysctls()
7826 &sc->tt.update_hc_on_pmtu_change, 0, in t4_sysctls()
7829 sc->tt.iso = 1; in t4_sysctls()
7831 &sc->tt.iso, 0, "Enable iSCSI segmentation offload"); in t4_sysctls()
7921 struct sysctl_ctx_list *ctx = &vi->ctx; in vi_sysctls()
7928 oid = device_get_sysctl_tree(vi->dev); in vi_sysctls()
7932 vi->viid, "VI identifer"); in vi_sysctls()
7934 &vi->nrxq, 0, "# of rx queues"); in vi_sysctls()
7936 &vi->ntxq, 0, "# of tx queues"); in vi_sysctls()
7938 &vi->first_rxq, 0, "index of first rx queue"); in vi_sysctls()
7940 &vi->first_txq, 0, "index of first tx queue"); in vi_sysctls()
7942 vi->rss_base, "start of RSS indirection table"); in vi_sysctls()
7944 vi->rss_size, "size of RSS indirection table"); in vi_sysctls()
7950 "Reserve queue 0 for non-flowid packets"); in vi_sysctls()
7953 if (vi->adapter->flags & IS_VF) { in vi_sysctls()
7954 MPASS(vi->flags & TX_USES_VM_WR); in vi_sysctls()
7964 if (vi->nofldrxq != 0) { in vi_sysctls()
7966 &vi->nofldrxq, 0, in vi_sysctls()
7969 CTLFLAG_RD, &vi->first_ofld_rxq, 0, in vi_sysctls()
7982 if (vi->nofldtxq != 0) { in vi_sysctls()
7984 &vi->nofldtxq, 0, in vi_sysctls()
7987 CTLFLAG_RD, &vi->first_ofld_txq, 0, in vi_sysctls()
7992 if (vi->nnmrxq != 0) { in vi_sysctls()
7994 &vi->nnmrxq, 0, "# of netmap rx queues"); in vi_sysctls()
7996 &vi->nnmtxq, 0, "# of netmap tx queues"); in vi_sysctls()
7998 CTLFLAG_RD, &vi->first_nm_rxq, 0, in vi_sysctls()
8001 CTLFLAG_RD, &vi->first_nm_txq, 0, in vi_sysctls()
8024 struct sysctl_ctx_list *ctx = &pi->ctx; in cxgbe_sysctls()
8027 struct adapter *sc = pi->adapter; in cxgbe_sysctls()
8035 oid = device_get_sysctl_tree(pi->dev); in cxgbe_sysctls()
8041 if (pi->port_type == FW_PORT_TYPE_BT_XAUI) { in cxgbe_sysctls()
8067 "autonegotiation (-1 = not supported)"); in cxgbe_sysctls()
8073 &pi->link_cfg.requested_caps, 0, "L1 config requested by driver"); in cxgbe_sysctls()
8075 &pi->link_cfg.pcaps, 0, "port capabilities"); in cxgbe_sysctls()
8077 &pi->link_cfg.acaps, 0, "advertised capabilities"); in cxgbe_sysctls()
8079 &pi->link_cfg.lpacaps, 0, "link partner advertised capabilities"); in cxgbe_sysctls()
8084 pi->mps_bg_map, "MPS buffer group map"); in cxgbe_sysctls()
8086 NULL, pi->rx_e_chan_map, "TP rx e-channel map"); in cxgbe_sysctls()
8088 pi->tx_chan, "TP tx c-channel"); in cxgbe_sysctls()
8090 pi->rx_chan, "TP rx c-channel"); in cxgbe_sysctls()
8092 if (sc->flags & IS_VF) in cxgbe_sysctls()
8103 CTLFLAG_RW, &pi->sched_params->pktsize, 0, in cxgbe_sysctls()
8104 "pktsize for per-flow cl-rl (0 means up to the driver )"); in cxgbe_sysctls()
8106 CTLFLAG_RW, &pi->sched_params->burstsize, 0, in cxgbe_sysctls()
8107 "burstsize for per-flow cl-rl (0 means up to the driver)"); in cxgbe_sysctls()
8108 for (i = 0; i < sc->params.nsched_cls; i++) { in cxgbe_sysctls()
8109 struct tx_cl_rl_params *tc = &pi->sched_params->cl_rl[i]; in cxgbe_sysctls()
8116 CTLFLAG_RD, &tc->state, 0, "current state"); in cxgbe_sysctls()
8119 (uintptr_t)&tc->flags, sysctl_bitfield_8b, "A", "flags"); in cxgbe_sysctls()
8121 CTLFLAG_RD, &tc->refcount, 0, "references to this class"); in cxgbe_sysctls()
8124 (pi->port_id << 16) | i, sysctl_tc_params, "A", in cxgbe_sysctls()
8135 &pi->tx_parse_error, 0, in cxgbe_sysctls()
8141 t4_port_reg(sc, pi->tx_chan, A_MPS_PORT_STAT_##stat##_L), \ in cxgbe_sysctls()
8147 &pi->stats.name, desc) in cxgbe_sysctls()
8207 T4_PORTSTAT(rx_ovflow0, "# drops due to buffer-group 0 overflows"); in cxgbe_sysctls()
8208 T4_PORTSTAT(rx_ovflow1, "# drops due to buffer-group 1 overflows"); in cxgbe_sysctls()
8209 T4_PORTSTAT(rx_ovflow2, "# drops due to buffer-group 2 overflows"); in cxgbe_sysctls()
8210 T4_PORTSTAT(rx_ovflow3, "# drops due to buffer-group 3 overflows"); in cxgbe_sysctls()
8211 T4_PORTSTAT(rx_trunc0, "# of buffer-group 0 truncated packets"); in cxgbe_sysctls()
8212 T4_PORTSTAT(rx_trunc1, "# of buffer-group 1 truncated packets"); in cxgbe_sysctls()
8213 T4_PORTSTAT(rx_trunc2, "# of buffer-group 2 truncated packets"); in cxgbe_sysctls()
8214 T4_PORTSTAT(rx_trunc3, "# of buffer-group 3 truncated packets"); in cxgbe_sysctls()
8227 for (i = arg1; arg2; arg2 -= sizeof(int), i++) { in sysctl_int_array()
8277 struct adapter *sc = pi->adapter; in sysctl_btphy()
8281 rc = begin_synchronized_op(sc, &pi->vi[0], SLEEP_OK | INTR_OK, "t4btt"); in sysctl_btphy()
8288 rc = -t4_mdio_rd(sc, sc->mbox, pi->mdio_addr, 0x1e, in sysctl_btphy()
8307 val = vi->rsrv_noflowq; in sysctl_noflowq()
8309 if (rc != 0 || req->newptr == NULL) in sysctl_noflowq()
8312 if ((val >= 1) && (vi->ntxq > 1)) in sysctl_noflowq()
8313 vi->rsrv_noflowq = 1; in sysctl_noflowq()
8315 vi->rsrv_noflowq = 0; in sysctl_noflowq()
8324 struct adapter *sc = vi->adapter; in sysctl_tx_vm_wr()
8327 MPASS(!(sc->flags & IS_VF)); in sysctl_tx_vm_wr()
8329 val = vi->flags & TX_USES_VM_WR ? 1 : 0; in sysctl_tx_vm_wr()
8331 if (rc != 0 || req->newptr == NULL) in sysctl_tx_vm_wr()
8343 else if (if_getdrvflags(vi->ifp) & IFF_DRV_RUNNING) { in sysctl_tx_vm_wr()
8351 struct port_info *pi = vi->pi; in sysctl_tx_vm_wr()
8354 uint8_t npkt = sc->params.max_pkts_per_eth_tx_pkts_wr; in sysctl_tx_vm_wr()
8357 vi->flags |= TX_USES_VM_WR; in sysctl_tx_vm_wr()
8358 if_sethwtsomaxsegcount(vi->ifp, TX_SGL_SEGS_VM_TSO); in sysctl_tx_vm_wr()
8360 V_TXPKT_INTF(pi->tx_chan)); in sysctl_tx_vm_wr()
8361 if (!(sc->flags & IS_VF)) in sysctl_tx_vm_wr()
8362 npkt--; in sysctl_tx_vm_wr()
8364 vi->flags &= ~TX_USES_VM_WR; in sysctl_tx_vm_wr()
8365 if_sethwtsomaxsegcount(vi->ifp, TX_SGL_SEGS_TSO); in sysctl_tx_vm_wr()
8367 V_TXPKT_INTF(pi->tx_chan) | V_TXPKT_PF(sc->pf) | in sysctl_tx_vm_wr()
8368 V_TXPKT_VF(vi->vin) | V_TXPKT_VF_VLD(vi->vfvld)); in sysctl_tx_vm_wr()
8371 txq->cpl_ctrl0 = ctrl0; in sysctl_tx_vm_wr()
8372 txq->txp.max_npkt = npkt; in sysctl_tx_vm_wr()
8383 struct adapter *sc = vi->adapter; in sysctl_holdoff_tmr_idx()
8388 idx = vi->tmr_idx; in sysctl_holdoff_tmr_idx()
8391 if (rc != 0 || req->newptr == NULL) in sysctl_holdoff_tmr_idx()
8402 v = V_QINTR_TIMER_IDX(idx) | V_QINTR_CNT_EN(vi->pktc_idx != -1); in sysctl_holdoff_tmr_idx()
8405 atomic_store_rel_8(&rxq->iq.intr_params, v); in sysctl_holdoff_tmr_idx()
8407 rxq->iq.intr_params = v; in sysctl_holdoff_tmr_idx()
8410 vi->tmr_idx = idx; in sysctl_holdoff_tmr_idx()
8420 struct adapter *sc = vi->adapter; in sysctl_holdoff_pktc_idx()
8423 idx = vi->pktc_idx; in sysctl_holdoff_pktc_idx()
8426 if (rc != 0 || req->newptr == NULL) in sysctl_holdoff_pktc_idx()
8429 if (idx < -1 || idx >= SGE_NCOUNTERS) in sysctl_holdoff_pktc_idx()
8437 if (vi->flags & VI_INIT_DONE) in sysctl_holdoff_pktc_idx()
8440 vi->pktc_idx = idx; in sysctl_holdoff_pktc_idx()
8450 struct adapter *sc = vi->adapter; in sysctl_qsize_rxq()
8453 qsize = vi->qsize_rxq; in sysctl_qsize_rxq()
8456 if (rc != 0 || req->newptr == NULL) in sysctl_qsize_rxq()
8467 if (vi->flags & VI_INIT_DONE) in sysctl_qsize_rxq()
8470 vi->qsize_rxq = qsize; in sysctl_qsize_rxq()
8480 struct adapter *sc = vi->adapter; in sysctl_qsize_txq()
8483 qsize = vi->qsize_txq; in sysctl_qsize_txq()
8486 if (rc != 0 || req->newptr == NULL) in sysctl_qsize_txq()
8497 if (vi->flags & VI_INIT_DONE) in sysctl_qsize_txq()
8500 vi->qsize_txq = qsize; in sysctl_qsize_txq()
8510 struct adapter *sc = pi->adapter; in sysctl_pause_settings()
8511 struct link_config *lc = &pi->link_cfg; in sysctl_pause_settings()
8514 if (req->newptr == NULL) { in sysctl_pause_settings()
8522 if (lc->link_ok) { in sysctl_pause_settings()
8523 sbuf_printf(sb, "%b", (lc->fc & (PAUSE_TX | PAUSE_RX)) | in sysctl_pause_settings()
8524 (lc->requested_fc & PAUSE_AUTONEG), bits); in sysctl_pause_settings()
8526 sbuf_printf(sb, "%b", lc->requested_fc & (PAUSE_TX | in sysctl_pause_settings()
8535 s[0] = '0' + (lc->requested_fc & (PAUSE_TX | PAUSE_RX | in sysctl_pause_settings()
8547 n = s[0] - '0'; in sysctl_pause_settings()
8551 rc = begin_synchronized_op(sc, &pi->vi[0], SLEEP_OK | INTR_OK, in sysctl_pause_settings()
8557 lc->requested_fc = n; in sysctl_pause_settings()
8559 if (pi->up_vis > 0) in sysctl_pause_settings()
8574 struct link_config *lc = &pi->link_cfg; in sysctl_link_fec()
8577 static char *bits = "\20\1RS-FEC\2FC-FEC\3NO-FEC\4RSVD1\5RSVD2"; in sysctl_link_fec()
8582 if (lc->link_ok) in sysctl_link_fec()
8583 sbuf_printf(sb, "%b", lc->fec, bits); in sysctl_link_fec()
8596 struct adapter *sc = pi->adapter; in sysctl_requested_fec()
8597 struct link_config *lc = &pi->link_cfg; in sysctl_requested_fec()
8601 if (req->newptr == NULL) { in sysctl_requested_fec()
8603 static char *bits = "\20\1RS-FEC\2FC-FEC\3NO-FEC\4RSVD2" in sysctl_requested_fec()
8610 sbuf_printf(sb, "%b", lc->requested_fec, bits); in sysctl_requested_fec()
8618 lc->requested_fec == FEC_AUTO ? -1 : in sysctl_requested_fec()
8619 lc->requested_fec & (M_FW_PORT_CAP32_FEC | FEC_MODULE)); in sysctl_requested_fec()
8631 rc = begin_synchronized_op(sc, &pi->vi[0], SLEEP_OK | INTR_OK, in sysctl_requested_fec()
8636 old = lc->requested_fec; in sysctl_requested_fec()
8638 lc->requested_fec = FEC_AUTO; in sysctl_requested_fec()
8640 lc->requested_fec = FEC_NONE; in sysctl_requested_fec()
8642 if ((lc->pcaps | in sysctl_requested_fec()
8644 lc->pcaps) { in sysctl_requested_fec()
8648 lc->requested_fec = n & (M_FW_PORT_CAP32_FEC | in sysctl_requested_fec()
8653 if (pi->up_vis > 0) { in sysctl_requested_fec()
8656 lc->requested_fec = old; in sysctl_requested_fec()
8674 struct adapter *sc = pi->adapter; in sysctl_module_fec()
8675 struct link_config *lc = &pi->link_cfg; in sysctl_module_fec()
8679 static char *bits = "\20\1RS-FEC\2FC-FEC\3NO-FEC\4RSVD2\5RSVD3"; in sysctl_module_fec()
8694 if (pi->up_vis == 0) { in sysctl_module_fec()
8704 fec = lc->fec_hint; in sysctl_module_fec()
8705 if (pi->mod_type == FW_PORT_MOD_TYPE_NONE || in sysctl_module_fec()
8706 !fec_supported(lc->pcaps)) { in sysctl_module_fec()
8727 struct adapter *sc = pi->adapter; in sysctl_autoneg()
8728 struct link_config *lc = &pi->link_cfg; in sysctl_autoneg()
8731 if (lc->pcaps & FW_PORT_CAP32_ANEG) in sysctl_autoneg()
8732 val = lc->requested_aneg == AUTONEG_DISABLE ? 0 : 1; in sysctl_autoneg()
8734 val = -1; in sysctl_autoneg()
8736 if (rc != 0 || req->newptr == NULL) in sysctl_autoneg()
8745 rc = begin_synchronized_op(sc, &pi->vi[0], SLEEP_OK | INTR_OK, in sysctl_autoneg()
8750 if (val == AUTONEG_ENABLE && !(lc->pcaps & FW_PORT_CAP32_ANEG)) { in sysctl_autoneg()
8754 lc->requested_aneg = val; in sysctl_autoneg()
8757 if (pi->up_vis > 0) in sysctl_autoneg()
8771 struct adapter *sc = pi->adapter; in sysctl_force_fec()
8772 struct link_config *lc = &pi->link_cfg; in sysctl_force_fec()
8775 val = lc->force_fec; in sysctl_force_fec()
8776 MPASS(val >= -1 && val <= 1); in sysctl_force_fec()
8778 if (rc != 0 || req->newptr == NULL) in sysctl_force_fec()
8780 if (!(lc->pcaps & FW_PORT_CAP32_FORCE_FEC)) in sysctl_force_fec()
8782 if (val < -1 || val > 1) in sysctl_force_fec()
8785 rc = begin_synchronized_op(sc, &pi->vi[0], SLEEP_OK | INTR_OK, "t4ff"); in sysctl_force_fec()
8789 lc->force_fec = val; in sysctl_force_fec()
8792 if (pi->up_vis > 0) in sysctl_force_fec()
8807 mtx_lock(&sc->reg_lock); in sysctl_handle_t4_reg64()
8814 mtx_unlock(&sc->reg_lock); in sysctl_handle_t4_reg64()
8836 rc = -t4_query_params(sc, sc->mbox, sc->pf, 0, 1, ¶m, &val); in sysctl_temperature()
8842 /* unknown is returned as 0 but we display -1 in that case */ in sysctl_temperature()
8843 t = val == 0 ? -1 : val; in sysctl_temperature()
8856 if (sc->params.core_vdd == 0) { in sysctl_vdd()
8867 rc = -t4_query_params(sc, sc->mbox, sc->pf, 0, 1, in sysctl_vdd()
8873 sc->params.core_vdd = val; in sysctl_vdd()
8876 return (sysctl_handle_int(oidp, &sc->params.core_vdd, 0, req)); in sysctl_vdd()
8886 v = sc->sensor_resets; in sysctl_reset_sensor()
8888 if (rc != 0 || req->newptr == NULL || v <= 0) in sysctl_reset_sensor()
8891 if (sc->params.fw_vers < FW_VERSION32(1, 24, 7, 0) || in sysctl_reset_sensor()
8905 rc = -t4_set_params(sc, sc->mbox, sc->pf, 0, 1, ¶m, &val); in sysctl_reset_sensor()
8909 sc->sensor_resets++; in sysctl_reset_sensor()
8929 rc = -t4_query_params(sc, sc->mbox, sc->pf, 0, 1, ¶m, &val); in sysctl_loadavg()
8969 mtx_lock(&sc->reg_lock); in sysctl_cctrl()
8974 mtx_unlock(&sc->reg_lock); in sysctl_cctrl()
8985 sc->params.a_wnd[i], dec_fac[sc->params.b_wnd[i]]); in sysctl_cctrl()
8995 "TP0", "TP1", "ULP", "SGE0", "SGE1", "NC-SI", /* ibq's */
8996 "ULP0", "ULP1", "ULP2", "ULP3", "SGE", "NC-SI", /* obq's */
8997 "SGE0-RX", "SGE1-RX" /* additional obq's (T5 onwards) */
9008 u_int cim_num_obq = sc->chip_params->cim_num_obq; in sysctl_cim_ibq_obq()
9018 mtx_lock(&sc->reg_lock); in sysctl_cim_ibq_obq()
9020 rc = -ENXIO; in sysctl_cim_ibq_obq()
9023 mtx_unlock(&sc->reg_lock); in sysctl_cim_ibq_obq()
9027 qid -= CIM_NUM_IBQ; in sysctl_cim_ibq_obq()
9030 mtx_lock(&sc->reg_lock); in sysctl_cim_ibq_obq()
9032 rc = -ENXIO; in sysctl_cim_ibq_obq()
9035 mtx_unlock(&sc->reg_lock); in sysctl_cim_ibq_obq()
9039 rc = -rc; in sysctl_cim_ibq_obq()
9071 for (p = buf; p <= &buf[sc->params.cim_la_size - 8]; p += 8) { in sbuf_cim_la4()
9101 for (p = buf; p <= &buf[sc->params.cim_la_size - 10]; p += 10) { in sbuf_cim_la6()
9131 buf = malloc(sc->params.cim_la_size * sizeof(uint32_t), M_CXGBE, in sbuf_cim_la()
9136 mtx_lock(&sc->reg_lock); in sbuf_cim_la()
9140 rc = -t4_cim_read(sc, A_UP_UP_DBG_LA_CFG, 1, &cfg); in sbuf_cim_la()
9142 rc = -t4_cim_read_la(sc, buf, NULL); in sbuf_cim_la()
9144 mtx_unlock(&sc->reg_lock); in sbuf_cim_la()
9177 device_get_nameunit(sc->dev), in dump_cim_regs()
9184 device_get_nameunit(sc->dev), in dump_cim_regs()
9200 device_get_nameunit(sc->dev)); in dump_cimla()
9208 device_get_nameunit(sc->dev), sbuf_data(&sb)); in dump_cimla()
9217 atomic_set_int(&sc->error_flags, ADAP_CIM_ERR); in t4_os_cim_err()
9237 mtx_lock(&sc->reg_lock); in sysctl_cim_ma_la()
9242 mtx_unlock(&sc->reg_lock); in sysctl_cim_ma_la()
9285 mtx_lock(&sc->reg_lock); in sysctl_cim_pif_la()
9290 mtx_unlock(&sc->reg_lock); in sysctl_cim_pif_la()
9328 cim_num_obq = sc->chip_params->cim_num_obq; in sysctl_cim_qcfg()
9338 mtx_lock(&sc->reg_lock); in sysctl_cim_qcfg()
9342 rc = -t4_cim_read(sc, ibq_rdaddr, 4 * nq, stat); in sysctl_cim_qcfg()
9344 rc = -t4_cim_read(sc, obq_rdaddr, 2 * cim_num_obq, in sysctl_cim_qcfg()
9350 mtx_unlock(&sc->reg_lock); in sysctl_cim_qcfg()
9369 wr[0] - base[i], G_QUESOPCNT(p[3]), G_QUEEOPCNT(p[3]), in sysctl_cim_qcfg()
9391 mtx_lock(&sc->reg_lock); in sysctl_cpl_stats()
9396 mtx_unlock(&sc->reg_lock); in sysctl_cpl_stats()
9400 if (sc->chip_params->nchan > 2) { in sysctl_cpl_stats()
9434 mtx_lock(&sc->reg_lock); in sysctl_ddp_stats()
9439 mtx_unlock(&sc->reg_lock); in sysctl_ddp_stats()
9464 mtx_lock(&sc->reg_lock); in sysctl_tid_stats()
9469 mtx_unlock(&sc->reg_lock); in sysctl_tid_stats()
9523 struct devlog_params *dparams = &sc->params.devlog; in sbuf_devlog()
9527 if (dparams->addr == 0) in sbuf_devlog()
9531 buf = malloc(dparams->size, M_CXGBE, M_ZERO | flags); in sbuf_devlog()
9535 mtx_lock(&sc->reg_lock); in sbuf_devlog()
9539 rc = read_via_memwin(sc, 1, dparams->addr, (void *)buf, in sbuf_devlog()
9540 dparams->size); in sbuf_devlog()
9541 mtx_unlock(&sc->reg_lock); in sbuf_devlog()
9545 nentries = dparams->size / sizeof(struct fw_devlog_e); in sbuf_devlog()
9549 if (e->timestamp == 0) in sbuf_devlog()
9552 e->timestamp = be64toh(e->timestamp); in sbuf_devlog()
9553 e->seqno = be32toh(e->seqno); in sbuf_devlog()
9555 e->params[j] = be32toh(e->params[j]); in sbuf_devlog()
9557 if (e->timestamp < ftstamp) { in sbuf_devlog()
9558 ftstamp = e->timestamp; in sbuf_devlog()
9572 if (e->timestamp == 0) in sbuf_devlog()
9576 e->seqno, e->timestamp, in sbuf_devlog()
9577 (e->level < nitems(devlog_level_strings) ? in sbuf_devlog()
9578 devlog_level_strings[e->level] : "UNKNOWN"), in sbuf_devlog()
9579 (e->facility < nitems(devlog_facility_strings) ? in sbuf_devlog()
9580 devlog_facility_strings[e->facility] : "UNKNOWN")); in sbuf_devlog()
9581 sbuf_printf(sb, e->fmt, e->params[0], e->params[1], in sbuf_devlog()
9582 e->params[2], e->params[3], e->params[4], in sbuf_devlog()
9583 e->params[5], e->params[6], e->params[7]); in sbuf_devlog()
9619 device_get_nameunit(sc->dev)); in dump_devlog()
9627 device_get_nameunit(sc->dev), sbuf_data(&sb)); in dump_devlog()
9640 int i, nchan = sc->chip_params->nchan; in sysctl_fcoe_stats()
9643 mtx_lock(&sc->reg_lock); in sysctl_fcoe_stats()
9650 mtx_unlock(&sc->reg_lock); in sysctl_fcoe_stats()
9699 mtx_lock(&sc->reg_lock); in sysctl_hw_sched()
9701 mtx_unlock(&sc->reg_lock); in sysctl_hw_sched()
9709 mtx_unlock(&sc->reg_lock); in sysctl_hw_sched()
9711 sbuf_printf(sb, "Scheduler Mode Channel Rate (Kbps) " in sysctl_hw_sched()
9716 sbuf_printf(sb, "\n %u %-5s %u ", i, in sysctl_hw_sched()
9764 for (i = 0; i < sc->chip_params->nchan; i += 2) { in sysctl_lb_stats()
9765 mtx_lock(&sc->reg_lock); in sysctl_lb_stats()
9772 mtx_unlock(&sc->reg_lock); in sysctl_lb_stats()
9782 sbuf_printf(sb, "\n%-17s %20ju %20ju", stat_name[j], in sysctl_lb_stats()
9798 struct link_config *lc = &pi->link_cfg; in sysctl_linkdnrc()
9805 if (lc->link_ok || lc->link_down_rc == 255) in sysctl_linkdnrc()
9808 sbuf_printf(sb, "%s", t4_link_down_rc_str(lc->link_down_rc)); in sysctl_linkdnrc()
9825 const u_int v1 = ((const struct mem_desc *)a)->base; in mem_desc_cmp()
9826 const u_int v2 = ((const struct mem_desc *)b)->base; in mem_desc_cmp()
9829 return (-1); in mem_desc_cmp()
9845 size = to - from + 1; in mem_region_show()
9850 sbuf_printf(sb, "%-15s %#x-%#x [%u]\n", name, from, to, size); in mem_region_show()
9870 "ULPTX state:", "On-chip queues:", in sysctl_meminfo()
9889 mtx_lock(&sc->reg_lock); in sysctl_meminfo()
9938 (md++)->base = t4_read_reg(sc, A_SGE_DBQ_CTXT_BADDR); in sysctl_meminfo()
9939 (md++)->base = t4_read_reg(sc, A_SGE_IMSG_CTXT_BADDR); in sysctl_meminfo()
9940 (md++)->base = t4_read_reg(sc, A_SGE_FLM_CACHE_BADDR); in sysctl_meminfo()
9941 (md++)->base = t4_read_reg(sc, A_TP_CMM_TCB_BASE); in sysctl_meminfo()
9942 (md++)->base = t4_read_reg(sc, A_TP_CMM_MM_BASE); in sysctl_meminfo()
9943 (md++)->base = t4_read_reg(sc, A_TP_CMM_TIMER_BASE); in sysctl_meminfo()
9944 (md++)->base = t4_read_reg(sc, A_TP_CMM_MM_RX_FLST_BASE); in sysctl_meminfo()
9945 (md++)->base = t4_read_reg(sc, A_TP_CMM_MM_TX_FLST_BASE); in sysctl_meminfo()
9946 (md++)->base = t4_read_reg(sc, A_TP_CMM_MM_PS_FLST_BASE); in sysctl_meminfo()
9949 md->base = t4_read_reg(sc, A_TP_PMM_TX_BASE); in sysctl_meminfo()
9950 md->limit = md->base - 1 + in sysctl_meminfo()
9955 md->base = t4_read_reg(sc, A_TP_PMM_RX_BASE); in sysctl_meminfo()
9956 md->limit = md->base - 1 + in sysctl_meminfo()
9963 md->base = t4_read_reg(sc, A_LE_DB_HASH_TID_BASE); in sysctl_meminfo()
9965 md->base = t4_read_reg(sc, A_LE_DB_HASH_TBL_BASE_ADDR); in sysctl_meminfo()
9966 md->limit = 0; in sysctl_meminfo()
9968 md->base = 0; in sysctl_meminfo()
9969 md->idx = nitems(region); /* hide it */ in sysctl_meminfo()
9974 md->base = t4_read_reg(sc, A_ULP_ ## reg ## _LLIMIT);\ in sysctl_meminfo()
9975 (md++)->limit = t4_read_reg(sc, A_ULP_ ## reg ## _ULIMIT) in sysctl_meminfo()
9985 if (sc->cryptocaps & FW_CAPS_CONFIG_TLSKEYS) { in sysctl_meminfo()
9990 md->base = 0; in sysctl_meminfo()
9992 md->idx = nitems(region); in sysctl_meminfo()
10005 md->base = t4_read_reg(sc, A_SGE_DBVFIFO_BADDR); in sysctl_meminfo()
10006 md->limit = md->base + size - 1; in sysctl_meminfo()
10008 md->idx = nitems(region); in sysctl_meminfo()
10012 md->base = t4_read_reg(sc, A_ULP_RX_CTX_BASE); in sysctl_meminfo()
10013 md->limit = 0; in sysctl_meminfo()
10015 md->base = t4_read_reg(sc, A_ULP_TX_ERR_TABLE_BASE); in sysctl_meminfo()
10016 md->limit = 0; in sysctl_meminfo()
10019 md->base = sc->vres.ocq.start; in sysctl_meminfo()
10020 if (sc->vres.ocq.size) in sysctl_meminfo()
10021 md->limit = md->base + sc->vres.ocq.size - 1; in sysctl_meminfo()
10023 md->idx = nitems(region); /* hide it */ in sysctl_meminfo()
10026 /* add any address-space holes, there can be up to 3 */ in sysctl_meminfo()
10027 for (n = 0; n < i - 1; n++) in sysctl_meminfo()
10029 (md++)->base = avail[n].limit; in sysctl_meminfo()
10031 (md++)->base = avail[n].limit; in sysctl_meminfo()
10033 n = md - mem; in sysctl_meminfo()
10039 avail[lo].limit - 1); in sysctl_meminfo()
10046 mem[i].limit = i < n - 1 ? mem[i + 1].base - 1 : ~0; in sysctl_meminfo()
10053 hi = t4_read_reg(sc, A_CIM_SDRAM_ADDR_SIZE) + lo - 1; in sysctl_meminfo()
10057 hi = t4_read_reg(sc, A_CIM_EXTMEM2_ADDR_SIZE) + lo - 1; in sysctl_meminfo()
10076 sbuf_printf(sb, "%u p-structs (%u free)\n", in sysctl_meminfo()
10096 for (i = 0; i < sc->chip_params->nchan; i++) { in sysctl_meminfo()
10114 mtx_unlock(&sc->reg_lock); in sysctl_meminfo()
10146 for (i = 0; i < sc->chip_params->mps_tcam_size; i++) { in sysctl_mps_tcam()
10151 mtx_lock(&sc->reg_lock); in sysctl_mps_tcam()
10158 mtx_unlock(&sc->reg_lock); in sysctl_mps_tcam()
10164 mtx_lock(&sc->reg_lock); in sysctl_mps_tcam()
10171 mtx_unlock(&sc->reg_lock); in sysctl_mps_tcam()
10179 (cls_lo & F_VF_VALID) ? G_VF(cls_lo) : -1); in sysctl_mps_tcam()
10201 rc = -t4_wr_mbox(sc, sc->mbox, &ldst_cmd, in sysctl_mps_tcam()
10249 for (i = 0; i < sc->chip_params->mps_tcam_size; i++) { in sysctl_mps_tcam_t6()
10260 ctl |= V_CTLTCAMINDEX(i - 256) | V_CTLTCAMSEL(1); in sysctl_mps_tcam_t6()
10261 mtx_lock(&sc->reg_lock); in sysctl_mps_tcam_t6()
10271 mtx_unlock(&sc->reg_lock); in sysctl_mps_tcam_t6()
10291 mtx_lock(&sc->reg_lock); in sysctl_mps_tcam_t6()
10301 mtx_unlock(&sc->reg_lock); in sysctl_mps_tcam_t6()
10316 mtx_lock(&sc->reg_lock); in sysctl_mps_tcam_t6()
10323 mtx_unlock(&sc->reg_lock); in sysctl_mps_tcam_t6()
10329 "%012jx %06x %06x - - %3c" in sysctl_mps_tcam_t6()
10335 cls_lo & F_T6_VF_VALID ? G_T6_VF(cls_lo) : -1); in sysctl_mps_tcam_t6()
10338 "%012jx - - ", i, addr[0], addr[1], in sysctl_mps_tcam_t6()
10345 sbuf_printf(sb, " - N "); in sysctl_mps_tcam_t6()
10347 sbuf_printf(sb, "- %3c %4x %3c %#x%4u%4d", in sysctl_mps_tcam_t6()
10351 cls_lo & F_T6_VF_VALID ? G_T6_VF(cls_lo) : -1); in sysctl_mps_tcam_t6()
10375 rc = -t4_wr_mbox(sc, sc->mbox, &ldst_cmd, in sysctl_mps_tcam_t6()
10419 mtx_lock(&sc->reg_lock); in sysctl_path_mtus()
10424 mtx_unlock(&sc->reg_lock); in sysctl_path_mtus()
10461 mtx_lock(&sc->reg_lock); in sysctl_pm_stats()
10468 mtx_unlock(&sc->reg_lock); in sysctl_pm_stats()
10478 sbuf_printf(sb, "\n%-13s %10u %20ju", tx_stats[i], tx_cnt[i], in sysctl_pm_stats()
10484 sbuf_printf(sb, "\n%-13s %10u %20ju", rx_stats[i], rx_cnt[i], in sysctl_pm_stats()
10491 sbuf_printf(sb, "\n%-13s %10u %20ju", tx_stats[i], tx_cnt[i], in sysctl_pm_stats()
10493 sbuf_printf(sb, "\n%-13s %10u %20ju", rx_stats[i], rx_cnt[i], in sysctl_pm_stats()
10501 sbuf_printf(sb, "\n%-13s %10u %20ju", tx_stats[i], tx_cnt[i], in sysctl_pm_stats()
10503 sbuf_printf(sb, "\n%-13s %10u %20ju", rx_stats[i], rx_cnt[i], in sysctl_pm_stats()
10522 mtx_lock(&sc->reg_lock); in sysctl_rdma_stats()
10527 mtx_unlock(&sc->reg_lock); in sysctl_rdma_stats()
10553 mtx_lock(&sc->reg_lock); in sysctl_tcp_stats()
10558 mtx_unlock(&sc->reg_lock); in sysctl_tcp_stats()
10590 struct tid_info *t = &sc->tids; in sysctl_tids()
10597 if (t->natids) { in sysctl_tids()
10598 sbuf_printf(sb, "ATID range: 0-%u, in use: %u\n", t->natids - 1, in sysctl_tids()
10599 t->atids_in_use); in sysctl_tids()
10602 if (t->nhpftids) { in sysctl_tids()
10603 sbuf_printf(sb, "HPFTID range: %u-%u, in use: %u\n", in sysctl_tids()
10604 t->hpftid_base, t->hpftid_end, t->hpftids_in_use); in sysctl_tids()
10607 if (t->ntids) { in sysctl_tids()
10610 mtx_lock(&sc->reg_lock); in sysctl_tids()
10623 mtx_unlock(&sc->reg_lock); in sysctl_tids()
10630 sbuf_printf(sb, "%u-%u, ", t->tid_base, x - 1); in sysctl_tids()
10631 sbuf_printf(sb, "%u-%u", y, t->ntids - 1); in sysctl_tids()
10633 sbuf_printf(sb, "%u-%u", t->tid_base, t->tid_base + in sysctl_tids()
10634 t->ntids - 1); in sysctl_tids()
10637 atomic_load_acq_int(&t->tids_in_use)); in sysctl_tids()
10640 if (t->nstids) { in sysctl_tids()
10641 sbuf_printf(sb, "STID range: %u-%u, in use: %u\n", t->stid_base, in sysctl_tids()
10642 t->stid_base + t->nstids - 1, t->stids_in_use); in sysctl_tids()
10645 if (t->nftids) { in sysctl_tids()
10646 sbuf_printf(sb, "FTID range: %u-%u, in use: %u\n", t->ftid_base, in sysctl_tids()
10647 t->ftid_end, t->ftids_in_use); in sysctl_tids()
10650 if (t->netids) { in sysctl_tids()
10651 sbuf_printf(sb, "ETID range: %u-%u, in use: %u\n", t->etid_base, in sysctl_tids()
10652 t->etid_base + t->netids - 1, t->etids_in_use); in sysctl_tids()
10655 mtx_lock(&sc->reg_lock); in sysctl_tids()
10662 mtx_unlock(&sc->reg_lock); in sysctl_tids()
10685 mtx_lock(&sc->reg_lock); in sysctl_tp_err_stats()
10690 mtx_unlock(&sc->reg_lock); in sysctl_tp_err_stats()
10698 if (sc->chip_params->nchan > 2) { in sysctl_tp_err_stats()
10763 mtx_lock(&sc->reg_lock); in sysctl_tnl_stats()
10768 mtx_unlock(&sc->reg_lock); in sysctl_tnl_stats()
10776 if (sc->chip_params->nchan > 2) { in sysctl_tnl_stats()
10803 struct tp_params *tpp = &sc->params.tp; in sysctl_tp_la_mask()
10807 mask = tpp->la_mask >> 16; in sysctl_tp_la_mask()
10809 if (rc != 0 || req->newptr == NULL) in sysctl_tp_la_mask()
10813 mtx_lock(&sc->reg_lock); in sysctl_tp_la_mask()
10817 tpp->la_mask = mask << 16; in sysctl_tp_la_mask()
10819 tpp->la_mask); in sysctl_tp_la_mask()
10821 mtx_unlock(&sc->reg_lock); in sysctl_tp_la_mask()
10838 while (f->name) { in field_desc_show()
10839 uint64_t mask = (1ULL << f->width) - 1; in field_desc_show()
10840 int len = snprintf(buf, sizeof(buf), "%s: %ju", f->name, in field_desc_show()
10841 ((uintmax_t)v >> f->start) & mask); in field_desc_show()
11001 if (idx < (TPLA_SIZE / 2 - 1) || p[1] != ~0ULL) in tp_la_show2()
11012 if (idx < (TPLA_SIZE / 2 - 1) || p[1] != ~0ULL) in tp_la_show3()
11033 mtx_lock(&sc->reg_lock); in sysctl_tp_la()
11052 mtx_unlock(&sc->reg_lock); in sysctl_tp_la()
11075 mtx_lock(&sc->reg_lock); in sysctl_tx_rate()
11080 mtx_unlock(&sc->reg_lock); in sysctl_tx_rate()
11088 if (sc->chip_params->nchan > 2) { in sysctl_tx_rate()
11125 mtx_lock(&sc->reg_lock); in sysctl_ulprx_la()
11130 mtx_unlock(&sc->reg_lock); in sysctl_ulprx_la()
11159 mtx_lock(&sc->reg_lock); in sysctl_wcwr_stats()
11167 mtx_unlock(&sc->reg_lock); in sysctl_wcwr_stats()
11204 rc = bus_get_cpus(sc->dev, op, sizeof(cpuset), &cpuset); in sysctl_cpus()
11227 val = atomic_load_int(&sc->num_resets); in sysctl_reset()
11229 if (rc != 0 || req->newptr == NULL) in sysctl_reset()
11234 atomic_store_int(&sc->num_resets, 0); in sysctl_reset()
11244 taskqueue_enqueue(reset_tq, &sc->reset_task); in sysctl_reset()
11256 v = sc->tt.tls; in sysctl_tls()
11258 if (rc != 0 || req->newptr == NULL) in sysctl_tls()
11261 if (v != 0 && !(sc->cryptocaps & FW_CAPS_CONFIG_TLSKEYS)) in sysctl_tls()
11270 sc->tt.tls = !!v; in sysctl_tls()
11272 for_each_vi(sc->port[i], j, vi) { in sysctl_tls()
11273 if (vi->flags & VI_INIT_DONE) in sysctl_tls()
11274 t4_update_fl_bufsize(vi->ifp); in sysctl_tls()
11304 u_int cclk_ps = 1000000000 / sc->params.vpd.cclk; in sysctl_tp_tick()
11306 mtx_lock(&sc->reg_lock); in sysctl_tp_tick()
11308 res = (u_int)-1; in sysctl_tp_tick()
11311 mtx_unlock(&sc->reg_lock); in sysctl_tp_tick()
11312 if (res == (u_int)-1) in sysctl_tp_tick()
11343 u_int cclk_ps = 1000000000 / sc->params.vpd.cclk; in sysctl_tp_dack_timer()
11345 mtx_lock(&sc->reg_lock); in sysctl_tp_dack_timer()
11354 mtx_unlock(&sc->reg_lock); in sysctl_tp_dack_timer()
11370 u_int cclk_ps = 1000000000 / sc->params.vpd.cclk; in sysctl_tp_timer()
11377 mtx_lock(&sc->reg_lock); in sysctl_tp_timer()
11389 mtx_unlock(&sc->reg_lock); in sysctl_tp_timer()
11409 mtx_lock(&sc->reg_lock); in sysctl_tp_shift_cnt()
11416 mtx_unlock(&sc->reg_lock); in sysctl_tp_shift_cnt()
11434 mtx_lock(&sc->reg_lock); in sysctl_tp_backoff()
11441 mtx_unlock(&sc->reg_lock); in sysctl_tp_backoff()
11452 struct adapter *sc = vi->adapter; in sysctl_holdoff_tmr_idx_ofld()
11457 idx = vi->ofld_tmr_idx; in sysctl_holdoff_tmr_idx_ofld()
11460 if (rc != 0 || req->newptr == NULL) in sysctl_holdoff_tmr_idx_ofld()
11471 v = V_QINTR_TIMER_IDX(idx) | V_QINTR_CNT_EN(vi->ofld_pktc_idx != -1); in sysctl_holdoff_tmr_idx_ofld()
11474 atomic_store_rel_8(&ofld_rxq->iq.intr_params, v); in sysctl_holdoff_tmr_idx_ofld()
11476 ofld_rxq->iq.intr_params = v; in sysctl_holdoff_tmr_idx_ofld()
11479 vi->ofld_tmr_idx = idx; in sysctl_holdoff_tmr_idx_ofld()
11489 struct adapter *sc = vi->adapter; in sysctl_holdoff_pktc_idx_ofld()
11492 idx = vi->ofld_pktc_idx; in sysctl_holdoff_pktc_idx_ofld()
11495 if (rc != 0 || req->newptr == NULL) in sysctl_holdoff_pktc_idx_ofld()
11498 if (idx < -1 || idx >= SGE_NCOUNTERS) in sysctl_holdoff_pktc_idx_ofld()
11506 if (vi->flags & VI_INIT_DONE) in sysctl_holdoff_pktc_idx_ofld()
11509 vi->ofld_pktc_idx = idx; in sysctl_holdoff_pktc_idx_ofld()
11521 if (cntxt->cid > M_CTXTQID) in get_sge_context()
11524 if (cntxt->mem_id != CTXT_EGRESS && cntxt->mem_id != CTXT_INGRESS && in get_sge_context()
11525 cntxt->mem_id != CTXT_FLM && cntxt->mem_id != CTXT_CNM) in get_sge_context()
11537 if (sc->flags & FW_OK) { in get_sge_context()
11538 rc = -t4_sge_ctxt_rd(sc, sc->mbox, cntxt->cid, cntxt->mem_id, in get_sge_context()
11539 &cntxt->data[0]); in get_sge_context()
11548 rc = -t4_sge_ctxt_rd_bd(sc, cntxt->cid, cntxt->mem_id, &cntxt->data[0]); in get_sge_context()
11575 if (sc->flags & FULL_INIT_DONE && in load_fw()
11576 (sc->debug_flags & DF_LOAD_FW_ANYTIME) == 0) { in load_fw()
11581 fw_data = malloc(fw->len, M_CXGBE, M_WAITOK); in load_fw()
11583 rc = copyin(fw->data, fw_data, fw->len); in load_fw()
11585 rc = -t4_load_fw(sc, fw_data, fw->len); in load_fw()
11608 if (cfg->len == 0) { in load_cfg()
11610 rc = -t4_load_cfg(sc, NULL, 0); in load_cfg()
11614 cfg_data = malloc(cfg->len, M_CXGBE, M_WAITOK); in load_cfg()
11616 rc = copyin(cfg->data, cfg_data, cfg->len); in load_cfg()
11618 rc = -t4_load_cfg(sc, cfg_data, cfg->len); in load_cfg()
11633 if (br->len > 1024 * 1024) in load_boot()
11636 if (br->pf_offset == 0) { in load_boot()
11638 if (br->pfidx_addr > 7) in load_boot()
11640 offset = G_OFFSET(t4_read_reg(sc, PF_REG(br->pfidx_addr, in load_boot()
11642 } else if (br->pf_offset == 1) { in load_boot()
11644 offset = G_OFFSET(br->pfidx_addr); in load_boot()
11658 if (br->len == 0) { in load_boot()
11660 rc = -t4_load_boot(sc, NULL, offset, 0); in load_boot()
11664 br_data = malloc(br->len, M_CXGBE, M_WAITOK); in load_boot()
11666 rc = copyin(br->data, br_data, br->len); in load_boot()
11668 rc = -t4_load_boot(sc, br_data, offset, br->len); in load_boot()
11691 if (bc->len == 0) { in load_bootcfg()
11693 rc = -t4_load_bootcfg(sc, NULL, 0); in load_bootcfg()
11697 bc_data = malloc(bc->len, M_CXGBE, M_WAITOK); in load_bootcfg()
11699 rc = copyin(bc->data, bc_data, bc->len); in load_bootcfg()
11701 rc = -t4_load_bootcfg(sc, bc_data, bc->len); in load_bootcfg()
11717 buf = malloc(dump->len, M_CXGBE, M_NOWAIT | M_ZERO); in cudbg_dump()
11728 cudbg->adap = sc; in cudbg_dump()
11729 cudbg->print = (cudbg_print_cb)printf; in cudbg_dump()
11732 device_printf(sc->dev, "%s: wr_flash %u, len %u, data %p.\n", in cudbg_dump()
11733 __func__, dump->wr_flash, dump->len, dump->data); in cudbg_dump()
11736 if (dump->wr_flash) in cudbg_dump()
11737 cudbg->use_flash = 1; in cudbg_dump()
11738 MPASS(sizeof(cudbg->dbg_bitmap) == sizeof(dump->bitmap)); in cudbg_dump()
11739 memcpy(cudbg->dbg_bitmap, dump->bitmap, sizeof(cudbg->dbg_bitmap)); in cudbg_dump()
11741 rc = cudbg_collect(handle, buf, &dump->len); in cudbg_dump()
11745 rc = copyout(buf, dump->data, dump->len); in cudbg_dump()
11761 r = &op->rule[0]; in free_offload_policy()
11762 for (i = 0; i < op->nrules; i++, r++) { in free_offload_policy()
11763 free(r->bpf_prog.bf_insns, M_CXGBE); in free_offload_policy()
11765 free(op->rule, M_CXGBE); in free_offload_policy()
11782 if (uop->nrules == 0) { in set_offload_policy()
11786 } else if (uop->nrules > 256) { /* arbitrary */ in set_offload_policy()
11792 op->nrules = uop->nrules; in set_offload_policy()
11793 len = op->nrules * sizeof(struct offload_rule); in set_offload_policy()
11794 op->rule = malloc(len, M_CXGBE, M_ZERO | M_WAITOK); in set_offload_policy()
11795 rc = copyin(uop->rule, op->rule, len); in set_offload_policy()
11797 free(op->rule, M_CXGBE); in set_offload_policy()
11802 r = &op->rule[0]; in set_offload_policy()
11803 for (i = 0; i < op->nrules; i++, r++) { in set_offload_policy()
11806 if (r->open_type != OPEN_TYPE_LISTEN && in set_offload_policy()
11807 r->open_type != OPEN_TYPE_ACTIVE && in set_offload_policy()
11808 r->open_type != OPEN_TYPE_PASSIVE && in set_offload_policy()
11809 r->open_type != OPEN_TYPE_DONTCARE) { in set_offload_policy()
11816 op->nrules = i; in set_offload_policy()
11822 s = &r->settings; in set_offload_policy()
11823 if ((s->offload != 0 && s->offload != 1) || in set_offload_policy()
11824 s->cong_algo < -1 || s->cong_algo > CONG_ALG_HIGHSPEED || in set_offload_policy()
11825 s->sched_class < -1 || in set_offload_policy()
11826 s->sched_class >= sc->params.nsched_cls) { in set_offload_policy()
11831 bf = &r->bpf_prog; in set_offload_policy()
11832 u = bf->bf_insns; /* userspace ptr */ in set_offload_policy()
11833 bf->bf_insns = NULL; in set_offload_policy()
11834 if (bf->bf_len == 0) { in set_offload_policy()
11838 len = bf->bf_len * sizeof(*bf->bf_insns); in set_offload_policy()
11839 bf->bf_insns = malloc(len, M_CXGBE, M_ZERO | M_WAITOK); in set_offload_policy()
11840 rc = copyin(u, bf->bf_insns, len); in set_offload_policy()
11844 if (!bpf_validate(bf->bf_insns, bf->bf_len)) { in set_offload_policy()
11850 rw_wlock(&sc->policy_lock); in set_offload_policy()
11851 old = sc->policy; in set_offload_policy()
11852 sc->policy = op; in set_offload_policy()
11853 rw_wunlock(&sc->policy_lock); in set_offload_policy()
11868 mtx_lock(&sc->reg_lock); in read_card_mem()
11872 rc = validate_mem_range(sc, mr->addr, mr->len); in read_card_mem()
11873 mtx_unlock(&sc->reg_lock); in read_card_mem()
11877 buf = malloc(min(mr->len, MAX_READ_BUF_SIZE), M_CXGBE, M_WAITOK); in read_card_mem()
11878 addr = mr->addr; in read_card_mem()
11879 remaining = mr->len; in read_card_mem()
11880 dst = (void *)mr->data; in read_card_mem()
11884 mtx_lock(&sc->reg_lock); in read_card_mem()
11889 mtx_unlock(&sc->reg_lock); in read_card_mem()
11898 remaining -= n; in read_card_mem()
11912 if (i2cd->len == 0 || i2cd->port_id >= sc->params.nports) in read_i2c()
11915 if (i2cd->len > sizeof(i2cd->data)) in read_i2c()
11924 rc = -t4_i2c_rd(sc, sc->mbox, i2cd->port_id, i2cd->dev_addr, in read_i2c()
11925 i2cd->offset, i2cd->len, &i2cd->data[0]); in read_i2c()
11947 if (port_id >= sc->params.nports) in clear_stats()
11949 pi = sc->port[port_id]; in clear_stats()
11953 mtx_lock(&sc->reg_lock); in clear_stats()
11956 t4_clr_port_stats(sc, pi->tx_chan); in clear_stats()
11958 if (pi->fcs_reg != -1) in clear_stats()
11959 pi->fcs_base = t4_read_reg64(sc, pi->fcs_reg); in clear_stats()
11961 pi->stats.rx_fcs_err = 0; in clear_stats()
11964 if (vi->flags & VI_INIT_DONE) in clear_stats()
11965 t4_clr_vi_stats(sc, vi->vin); in clear_stats()
11967 chan_map = pi->rx_e_chan_map; in clear_stats()
11970 i = ffs(chan_map) - 1; in clear_stats()
11976 mtx_unlock(&sc->reg_lock); in clear_stats()
11977 pi->tx_parse_error = 0; in clear_stats()
11978 pi->tnl_cong_drops = 0; in clear_stats()
11985 if (vi->flags & VI_INIT_DONE) { in clear_stats()
11989 rxq->lro.lro_queued = 0; in clear_stats()
11990 rxq->lro.lro_flushed = 0; in clear_stats()
11992 rxq->rxcsum = 0; in clear_stats()
11993 rxq->vlan_extraction = 0; in clear_stats()
11994 rxq->vxlan_rxcsum = 0; in clear_stats()
11996 rxq->fl.cl_allocated = 0; in clear_stats()
11997 rxq->fl.cl_recycled = 0; in clear_stats()
11998 rxq->fl.cl_fast_recycled = 0; in clear_stats()
12002 txq->txcsum = 0; in clear_stats()
12003 txq->tso_wrs = 0; in clear_stats()
12004 txq->vlan_insertion = 0; in clear_stats()
12005 txq->imm_wrs = 0; in clear_stats()
12006 txq->sgl_wrs = 0; in clear_stats()
12007 txq->txpkt_wrs = 0; in clear_stats()
12008 txq->txpkts0_wrs = 0; in clear_stats()
12009 txq->txpkts1_wrs = 0; in clear_stats()
12010 txq->txpkts0_pkts = 0; in clear_stats()
12011 txq->txpkts1_pkts = 0; in clear_stats()
12012 txq->txpkts_flush = 0; in clear_stats()
12013 txq->raw_wrs = 0; in clear_stats()
12014 txq->vxlan_tso_wrs = 0; in clear_stats()
12015 txq->vxlan_txcsum = 0; in clear_stats()
12016 txq->kern_tls_records = 0; in clear_stats()
12017 txq->kern_tls_short = 0; in clear_stats()
12018 txq->kern_tls_partial = 0; in clear_stats()
12019 txq->kern_tls_full = 0; in clear_stats()
12020 txq->kern_tls_octets = 0; in clear_stats()
12021 txq->kern_tls_waste = 0; in clear_stats()
12022 txq->kern_tls_options = 0; in clear_stats()
12023 txq->kern_tls_header = 0; in clear_stats()
12024 txq->kern_tls_fin = 0; in clear_stats()
12025 txq->kern_tls_fin_short = 0; in clear_stats()
12026 txq->kern_tls_cbc = 0; in clear_stats()
12027 txq->kern_tls_gcm = 0; in clear_stats()
12028 mp_ring_reset_stats(txq->r); in clear_stats()
12033 ofld_txq->wrq.tx_wrs_direct = 0; in clear_stats()
12034 ofld_txq->wrq.tx_wrs_copied = 0; in clear_stats()
12035 counter_u64_zero(ofld_txq->tx_iscsi_pdus); in clear_stats()
12036 counter_u64_zero(ofld_txq->tx_iscsi_octets); in clear_stats()
12037 counter_u64_zero(ofld_txq->tx_iscsi_iso_wrs); in clear_stats()
12038 counter_u64_zero(ofld_txq->tx_aio_jobs); in clear_stats()
12039 counter_u64_zero(ofld_txq->tx_aio_octets); in clear_stats()
12040 counter_u64_zero(ofld_txq->tx_toe_tls_records); in clear_stats()
12041 counter_u64_zero(ofld_txq->tx_toe_tls_octets); in clear_stats()
12046 ofld_rxq->fl.cl_allocated = 0; in clear_stats()
12047 ofld_rxq->fl.cl_recycled = 0; in clear_stats()
12048 ofld_rxq->fl.cl_fast_recycled = 0; in clear_stats()
12050 ofld_rxq->rx_iscsi_ddp_setup_ok); in clear_stats()
12052 ofld_rxq->rx_iscsi_ddp_setup_error); in clear_stats()
12053 ofld_rxq->rx_iscsi_ddp_pdus = 0; in clear_stats()
12054 ofld_rxq->rx_iscsi_ddp_octets = 0; in clear_stats()
12055 ofld_rxq->rx_iscsi_fl_pdus = 0; in clear_stats()
12056 ofld_rxq->rx_iscsi_fl_octets = 0; in clear_stats()
12057 ofld_rxq->rx_aio_ddp_jobs = 0; in clear_stats()
12058 ofld_rxq->rx_aio_ddp_octets = 0; in clear_stats()
12059 ofld_rxq->rx_toe_tls_records = 0; in clear_stats()
12060 ofld_rxq->rx_toe_tls_octets = 0; in clear_stats()
12061 ofld_rxq->rx_toe_ddp_octets = 0; in clear_stats()
12062 counter_u64_zero(ofld_rxq->ddp_buffer_alloc); in clear_stats()
12063 counter_u64_zero(ofld_rxq->ddp_buffer_reuse); in clear_stats()
12064 counter_u64_zero(ofld_rxq->ddp_buffer_free); in clear_stats()
12069 wrq = &sc->sge.ctrlq[pi->port_id]; in clear_stats()
12070 wrq->tx_wrs_direct = 0; in clear_stats()
12071 wrq->tx_wrs_copied = 0; in clear_stats()
12085 bcopy(&ca->addr[0], &in6.s6_addr[0], sizeof(in6.s6_addr)); in hold_clip_addr()
12101 bcopy(&ca->addr[0], &in6.s6_addr[0], sizeof(in6.s6_addr)); in release_clip_addr()
12113 return (pci_find_cap(sc->dev, cap, &i) == 0 ? i : 0); in t4_os_find_pci_capability()
12122 dev = sc->dev; in t4_os_pci_save_state()
12135 dev = sc->dev; in t4_os_pci_restore_state()
12145 struct adapter *sc = pi->adapter; in t4_os_portmod_changed()
12152 KASSERT((pi->flags & FIXED_IFMEDIA) == 0, in t4_os_portmod_changed()
12153 ("%s: port_type %u", __func__, pi->port_type)); in t4_os_portmod_changed()
12155 vi = &pi->vi[0]; in t4_os_portmod_changed()
12159 if (pi->mod_type != FW_PORT_MOD_TYPE_NONE) { in t4_os_portmod_changed()
12167 ifp = vi->ifp; in t4_os_portmod_changed()
12168 if (pi->mod_type == FW_PORT_MOD_TYPE_NONE) in t4_os_portmod_changed()
12170 else if (pi->mod_type == FW_PORT_MOD_TYPE_UNKNOWN) in t4_os_portmod_changed()
12172 else if (pi->mod_type == FW_PORT_MOD_TYPE_NOTSUPPORTED) in t4_os_portmod_changed()
12174 else if (pi->mod_type > 0 && pi->mod_type < nitems(mod_str)) { in t4_os_portmod_changed()
12176 port_top_speed(pi), mod_str[pi->mod_type]); in t4_os_portmod_changed()
12179 pi->mod_type); in t4_os_portmod_changed()
12188 struct link_config *lc = &pi->link_cfg; in t4_os_link_changed()
12189 struct adapter *sc = pi->adapter; in t4_os_link_changed()
12195 if (lc->link_ok) { in t4_os_link_changed()
12196 if (lc->speed > 25000 || in t4_os_link_changed()
12197 (lc->speed == 25000 && lc->fec == FEC_RS)) { in t4_os_link_changed()
12198 pi->fcs_reg = T5_PORT_REG(pi->tx_chan, in t4_os_link_changed()
12201 pi->fcs_reg = T5_PORT_REG(pi->tx_chan, in t4_os_link_changed()
12204 pi->fcs_base = t4_read_reg64(sc, pi->fcs_reg); in t4_os_link_changed()
12205 pi->stats.rx_fcs_err = 0; in t4_os_link_changed()
12207 pi->fcs_reg = -1; in t4_os_link_changed()
12210 MPASS(pi->fcs_reg != -1); in t4_os_link_changed()
12211 MPASS(pi->fcs_base == 0); in t4_os_link_changed()
12215 ifp = vi->ifp; in t4_os_link_changed()
12219 if (lc->link_ok) { in t4_os_link_changed()
12220 if_setbaudrate(ifp, IF_Mbps(lc->speed)); in t4_os_link_changed()
12237 * in - the only guarantee is that sc->sc_lock is a valid lock. in t4_iterate()
12249 struct adapter *sc = dev->si_drv1; in t4_ioctl()
12259 if ((edata->addr & 0x3) != 0 || edata->addr >= sc->mmio_len) in t4_ioctl()
12262 mtx_lock(&sc->reg_lock); in t4_ioctl()
12265 else if (edata->size == 4) in t4_ioctl()
12266 edata->val = t4_read_reg(sc, edata->addr); in t4_ioctl()
12267 else if (edata->size == 8) in t4_ioctl()
12268 edata->val = t4_read_reg64(sc, edata->addr); in t4_ioctl()
12271 mtx_unlock(&sc->reg_lock); in t4_ioctl()
12278 if ((edata->addr & 0x3) != 0 || edata->addr >= sc->mmio_len) in t4_ioctl()
12281 mtx_lock(&sc->reg_lock); in t4_ioctl()
12284 else if (edata->size == 4) { in t4_ioctl()
12285 if (edata->val & 0xffffffff00000000) in t4_ioctl()
12287 t4_write_reg(sc, edata->addr, (uint32_t) edata->val); in t4_ioctl()
12288 } else if (edata->size == 8) in t4_ioctl()
12289 t4_write_reg64(sc, edata->addr, edata->val); in t4_ioctl()
12292 mtx_unlock(&sc->reg_lock); in t4_ioctl()
12301 if (regs->len < reglen) { in t4_ioctl()
12302 regs->len = reglen; /* hint to the caller */ in t4_ioctl()
12306 regs->len = reglen; in t4_ioctl()
12308 mtx_lock(&sc->reg_lock); in t4_ioctl()
12313 mtx_unlock(&sc->reg_lock); in t4_ioctl()
12315 rc = copyout(buf, regs->data, reglen); in t4_ioctl()
12397 struct port_info *pi = vi->pi; in toe_capability()
12398 struct adapter *sc = pi->adapter; in toe_capability()
12409 if (sc->flags & KERN_TLS_ON && is_t6(sc)) { in toe_capability()
12420 p = sc->port[i]; in toe_capability()
12422 if (if_getcapenable(v->ifp) & IFCAP_TXTLS) { in toe_capability()
12425 device_get_nameunit(v->dev)); in toe_capability()
12441 if ((if_getcapenable(vi->ifp) & IFCAP_TOE) != 0) { in toe_capability()
12451 if (!(vi->flags & VI_INIT_DONE) && ((rc = vi_init(vi)) != 0)) in toe_capability()
12453 if (!(pi->vi[0].flags & VI_INIT_DONE) && in toe_capability()
12454 ((rc = vi_init(&pi->vi[0])) != 0)) in toe_capability()
12457 if (isset(&sc->offload_map, pi->port_id)) { in toe_capability()
12459 MPASS(pi->uld_vis > 0); in toe_capability()
12460 pi->uld_vis++; in toe_capability()
12473 KASSERT(sc->tom_softc != NULL, in toe_capability()
12485 if (pi->uld_vis++ == 0) in toe_capability()
12486 setbit(&sc->offload_map, pi->port_id); in toe_capability()
12488 if ((if_getcapenable(vi->ifp) & IFCAP_TOE) == 0) { in toe_capability()
12492 MPASS(isset(&sc->offload_map, pi->port_id)); in toe_capability()
12493 MPASS(pi->uld_vis > 0); in toe_capability()
12494 if (--pi->uld_vis == 0) in toe_capability()
12495 clrbit(&sc->offload_map, pi->port_id); in toe_capability()
12546 if (!(sc->flags & FULL_INIT_DONE)) { in t4_activate_uld()
12556 rc = t4_uld_list[id]->uld_activate(sc); in t4_activate_uld()
12558 setbit(&sc->active_ulds, id); in t4_activate_uld()
12579 rc = t4_uld_list[id]->uld_deactivate(sc); in t4_deactivate_uld()
12581 clrbit(&sc->active_ulds, id); in t4_deactivate_uld()
12600 rc = t4_uld_list[i]->uld_deactivate(sc); in deactivate_all_uld()
12603 clrbit(&sc->active_ulds, i); in deactivate_all_uld()
12621 t4_uld_list[i]->uld_stop == NULL) in stop_all_uld()
12623 (void) t4_uld_list[i]->uld_stop(sc); in stop_all_uld()
12639 t4_uld_list[i]->uld_restart == NULL) in restart_all_uld()
12641 (void) t4_uld_list[i]->uld_restart(sc); in restart_all_uld()
12653 return (isset(&sc->active_ulds, id)); in uld_active()
12671 if (sc->flags & KERN_TLS_ON) in ktls_capability()
12673 if (sc->offload_map != 0) { in ktls_capability()
12702 nq = *t < 0 ? -*t : c; in calculate_nqueues()
12745 if (t4_toecaps_allowed == -1) in tweak_tunables()
12748 if (t4_toecaps_allowed == -1) in tweak_tunables()
12753 if (t4_rdmacaps_allowed == -1) { in tweak_tunables()
12758 if (t4_iscsicaps_allowed == -1) { in tweak_tunables()
12767 if (t4_pktc_idx_ofld < -1 || t4_pktc_idx_ofld >= SGE_NCOUNTERS) in tweak_tunables()
12770 if (t4_rdmacaps_allowed == -1) in tweak_tunables()
12773 if (t4_iscsicaps_allowed == -1) in tweak_tunables()
12787 if (t4_pktc_idx < -1 || t4_pktc_idx >= SGE_NCOUNTERS) in tweak_tunables()
12801 * Number of VIs to create per-port. The first VI is the "main" regular in tweak_tunables()
12833 base = sc->memwin[2].mw_base; in t4_dump_mem()
12839 pf = V_PFNUM(sc->pf); in t4_dump_mem()
12842 off = addr - win_pos; in t4_dump_mem()
12857 len -= sizeof(buf); in t4_dump_mem()
12878 struct devlog_params *dparams = &sc->params.devlog; in t4_dump_devlog()
12883 if (dparams->start == 0) { in t4_dump_devlog()
12888 nentries = dparams->size / sizeof(struct fw_devlog_e); in t4_dump_devlog()
12889 m = fwmtype_to_hwmtype(dparams->memtype); in t4_dump_devlog()
12892 first = -1; in t4_dump_devlog()
12894 rc = -t4_mem_read(sc, m, dparams->start + i * sizeof(e), in t4_dump_devlog()
12909 if (first == -1) in t4_dump_devlog()
12914 rc = -t4_mem_read(sc, m, dparams->start + i * sizeof(e), in t4_dump_devlog()
13070 t4_write_reg(sc, A_MPS_RX_VXLAN_TYPE, V_VXLAN(sc->vxlan_port) | in enable_vxlan_rx()
13073 pi = sc->port[i]; in enable_vxlan_rx()
13074 if (pi->vxlan_tcam_entry == true) in enable_vxlan_rx()
13076 rc = t4_alloc_raw_mac_filt(sc, pi->vi[0].viid, match_all_mac, in enable_vxlan_rx()
13077 match_all_mac, sc->rawf_base + pi->port_id, 1, pi->port_id, in enable_vxlan_rx()
13080 rc = -rc; in enable_vxlan_rx()
13081 CH_ERR(&pi->vi[0], in enable_vxlan_rx()
13084 MPASS(rc == sc->rawf_base + pi->port_id); in enable_vxlan_rx()
13085 pi->vxlan_tcam_entry = true; in enable_vxlan_rx()
13095 if (sc->nrawf == 0 || chip_id(sc) <= CHELSIO_T5) in t4_vxlan_start()
13100 if (sc->vxlan_refcount == 0) { in t4_vxlan_start()
13101 sc->vxlan_port = v->port; in t4_vxlan_start()
13102 sc->vxlan_refcount = 1; in t4_vxlan_start()
13105 } else if (sc->vxlan_port == v->port) { in t4_vxlan_start()
13106 sc->vxlan_refcount++; in t4_vxlan_start()
13110 sc->vxlan_port, v->port); in t4_vxlan_start()
13120 if (sc->nrawf == 0 || chip_id(sc) <= CHELSIO_T5) in t4_vxlan_stop()
13130 if (sc->vxlan_port != v->port) in t4_vxlan_stop()
13132 if (sc->vxlan_refcount == 0) { in t4_vxlan_stop()
13134 "ignoring attempt to stop it again.\n", sc->vxlan_port); in t4_vxlan_stop()
13135 } else if (--sc->vxlan_refcount == 0 && !hw_off_limits(sc)) in t4_vxlan_stop()
13228 if (--loaded == 0) { in mod_event()