Lines Matching +full:partial +full:- +full:fpga +full:- +full:config
1 /*-
2 * SPDX-License-Identifier: BSD-2-Clause
306 * Each tunable is set to a default value here if it's known at compile-time.
307 * Otherwise it is set to -n as an indication to tweak_tunables() that it should
324 int t4_ntxq = -NTXQ;
330 int t4_nrxq = -NRXQ;
336 static int t4_ntxq_vi = -NTXQ_VI;
341 static int t4_nrxq_vi = -NRXQ_VI;
347 0, "Reserve TX queue 0 of each VI for non-flowid packets");
351 static int t4_nofldtxq = -NOFLDTXQ;
356 static int t4_nofldtxq_vi = -NOFLDTXQ_VI;
363 static int t4_nofldrxq = -NOFLDRXQ;
368 static int t4_nofldrxq_vi = -NOFLDRXQ_VI;
377 #define PKTC_IDX_OFLD (-1)
382 /* 0 means chip/fw default, non-zero number is value in microseconds */
387 /* 0 means chip/fw default, non-zero number is value in microseconds */
392 /* 0 means chip/fw default, non-zero number is # of keepalives before abort */
397 /* 0 means chip/fw default, non-zero number is value in microseconds */
402 /* 0 means chip/fw default, non-zero number is value in microseconds */
407 /* 0 means chip/fw default, non-zero number is # of rexmt before abort */
412 /* -1 means chip/fw default, other values are raw backoff values to use */
414 -1, -1, -1, -1, -1, -1, -1, -1, -1, -1, -1, -1, -1, -1, -1, -1
470 static int t4_nnmtxq = -NNMTXQ;
475 static int t4_nnmrxq = -NNMRXQ;
480 static int t4_nnmtxq_vi = -NNMTXQ_VI;
485 static int t4_nnmrxq_vi = -NNMRXQ_VI;
499 #define PKTC_IDX (-1)
517 * Interrupt types allowed (bits 0, 1, 2 = INTx, MSI, MSI-X respectively).
521 0, "Interrupt types allowed (bit 0 = INTx, 1 = MSI, 2 = MSI-X)");
527 #define BUILTIN_CF "built-in"
530 #define FPGA_CF "fpga"
551 * -1 to run with the firmware default. Same as FEC_AUTO (bit 5)
554 static int t4_fec = -1;
559 t4_fec_bits = "\20\1RS-FEC\2FC-FEC\3NO-FEC\4RSVD1\5RSVD2\6auto\7module";
565 * -1 to set FORCE_FEC iff requested_fec != AUTO. Multiple FEC bits are okay.
572 static int t4_force_fec = -1;
578 * -1 to run with the firmware default.
582 static int t4_autoneg = -1;
587 * Firmware auto-install by driver during attach (0, 1, 2 = prohibited, allowed,
588 * encouraged respectively). '-n' is the same as 'n' except the firmware
593 "Firmware auto-install (0 = prohibited, 1 = allowed, 2 = encouraged)");
612 static int t4_nvmecaps_allowed = -1;
626 static int t4_toecaps_allowed = -1;
630 static int t4_rdmacaps_allowed = -1;
634 static int t4_cryptocaps_allowed = -1;
638 static int t4_iscsicaps_allowed = -1;
661 * -1: driver should figure out a good value.
666 static int pcie_relaxed_ordering = -1;
692 * Set to non-zero to enable the attack filter. A packet that matches any of
765 &t4_tls_short_records, 0, "Use cipher-only mode for short records.");
769 &t4_tls_partial_ghash, 0, "Use partial GHASH for AES-GCM records.");
784 uint16_t intr_type; /* INTx, MSI, or MSI-X */
954 {0xa000, "Chelsio Terminator 4 FPGA"},
955 {0x4400, "Chelsio T440-dbg"},
956 {0x4401, "Chelsio T420-CR"},
957 {0x4402, "Chelsio T422-CR"},
958 {0x4403, "Chelsio T440-CR"},
959 {0x4404, "Chelsio T420-BCH"},
960 {0x4405, "Chelsio T440-BCH"},
961 {0x4406, "Chelsio T440-CH"},
962 {0x4407, "Chelsio T420-SO"},
963 {0x4408, "Chelsio T420-CX"},
964 {0x4409, "Chelsio T420-BT"},
965 {0x440a, "Chelsio T404-BT"},
966 {0x440e, "Chelsio T440-LP-CR"},
968 {0xb000, "Chelsio Terminator 5 FPGA"},
969 {0x5400, "Chelsio T580-dbg"},
970 {0x5401, "Chelsio T520-CR"}, /* 2 x 10G */
971 {0x5402, "Chelsio T522-CR"}, /* 2 x 10G, 2 X 1G */
972 {0x5403, "Chelsio T540-CR"}, /* 4 x 10G */
973 {0x5407, "Chelsio T520-SO"}, /* 2 x 10G, nomem */
974 {0x5409, "Chelsio T520-BT"}, /* 2 x 10GBaseT */
975 {0x540a, "Chelsio T504-BT"}, /* 4 x 1G */
976 {0x540d, "Chelsio T580-CR"}, /* 2 x 40G */
977 {0x540e, "Chelsio T540-LP-CR"}, /* 4 x 10G */
978 {0x5410, "Chelsio T580-LP-CR"}, /* 2 x 40G */
979 {0x5411, "Chelsio T520-LL-CR"}, /* 2 x 10G */
980 {0x5412, "Chelsio T560-CR"}, /* 1 x 40G, 2 x 10G */
981 {0x5414, "Chelsio T580-LP-SO-CR"}, /* 2 x 40G, nomem */
982 {0x5415, "Chelsio T502-BT"}, /* 2 x 1G */
983 {0x5418, "Chelsio T540-BT"}, /* 4 x 10GBaseT */
984 {0x5419, "Chelsio T540-LP-BT"}, /* 4 x 10GBaseT */
985 {0x541a, "Chelsio T540-SO-BT"}, /* 4 x 10GBaseT, nomem */
986 {0x541b, "Chelsio T540-SO-CR"}, /* 4 x 10G, nomem */
989 {0x5483, "Custom T540-CR"},
990 {0x5484, "Custom T540-BT"},
992 {0xc006, "Chelsio Terminator 6 FPGA"}, /* T6 PE10K6 FPGA (PF0) */
993 {0x6400, "Chelsio T6-DBG-25"}, /* 2 x 10/25G, debug */
994 {0x6401, "Chelsio T6225-CR"}, /* 2 x 10/25G */
995 {0x6402, "Chelsio T6225-SO-CR"}, /* 2 x 10/25G, nomem */
996 {0x6403, "Chelsio T6425-CR"}, /* 4 x 10/25G */
997 {0x6404, "Chelsio T6425-SO-CR"}, /* 4 x 10/25G, nomem */
998 {0x6405, "Chelsio T6225-SO-OCP3"}, /* 2 x 10/25G, nomem */
999 {0x6406, "Chelsio T6225-OCP3"}, /* 2 x 10/25G */
1000 {0x6407, "Chelsio T62100-LP-CR"}, /* 2 x 40/50/100G */
1001 {0x6408, "Chelsio T62100-SO-CR"}, /* 2 x 40/50/100G, nomem */
1002 {0x6409, "Chelsio T6210-BT"}, /* 2 x 10GBASE-T */
1003 {0x640d, "Chelsio T62100-CR"}, /* 2 x 40/50/100G */
1004 {0x6410, "Chelsio T6-DBG-100"}, /* 2 x 40/50/100G, debug */
1005 {0x6411, "Chelsio T6225-LL-CR"}, /* 2 x 10/25G */
1006 {0x6414, "Chelsio T62100-SO-OCP3"}, /* 2 x 40/50/100G, nomem */
1007 {0x6415, "Chelsio T6201-BT"}, /* 2 x 1000BASE-T */
1010 {0x6480, "Custom T6225-CR"},
1011 {0x6481, "Custom T62100-CR"},
1012 {0x6482, "Custom T6225-CR"},
1013 {0x6483, "Custom T62100-CR"},
1014 {0x6484, "Custom T64100-CR"},
1015 {0x6485, "Custom T6240-SO"},
1016 {0x6486, "Custom T6225-SO-CR"},
1017 {0x6487, "Custom T6225-CR"},
1019 {0xd000, "Chelsio Terminator 7 FPGA"}, /* T7 PE12K FPGA */
1020 {0x7400, "Chelsio T72200-DBG"}, /* 2 x 200G, debug */
1027 {0x7407, "Chelsio T72200-FH"}, /* 2 x 40/100/200G, 2 mem */
1029 {0x7409, "Chelsio S7210-BT"}, /* 2 x 10GBASE-T, nomem */
1030 {0x740a, "Chelsio T7450-RC"}, /* 4 x 10/25/50G, 1 mem, RC */
1031 {0x740b, "Chelsio T72200-RC"}, /* 2 x 40/100/200G, 1 mem, RC */
1032 {0x740c, "Chelsio T72200-FH-RC"}, /* 2 x 40/100/200G, 2 mem, RC */
1033 {0x740d, "Chelsio S72200-OCP3"}, /* 2 x 40/100/200G OCP3 */
1034 {0x740e, "Chelsio S7450-OCP3"}, /* 4 x 1/20/25/50G OCP3 */
1035 {0x740f, "Chelsio S7410-BT-OCP3"}, /* 4 x 10GBASE-T OCP3 */
1036 {0x7410, "Chelsio S7210-BT-A"}, /* 2 x 10GBASE-T */
1064 /* Attach only to PF0 of the FPGA */ in t4_probe()
1089 /* Attach only to PF0 of the FPGA */ in t5_probe()
1134 /* Attach only to PF0 of the FPGA */ in ch_probe()
1214 device_printf(sc->dev, "chip id %d is not supported.\n", id); in t4_init_devnames()
1215 sc->names = NULL; in t4_init_devnames()
1216 } else if (id - CHELSIO_T4 < nitems(devnames)) in t4_init_devnames()
1217 sc->names = &devnames[id - CHELSIO_T4]; in t4_init_devnames()
1219 sc->names = &devnames[nitems(devnames) - 1]; in t4_init_devnames()
1230 parent = device_get_nameunit(sc->dev); in t4_ifnet_unit()
1231 name = sc->names->ifnet_name; in t4_ifnet_unit()
1234 value == pi->port_id) in t4_ifnet_unit()
1237 return (-1); in t4_ifnet_unit()
1255 cur = &sc->cal_info[sc->cal_current]; in t4_calibration()
1256 next_up = (sc->cal_current + 1) % CNT_CAL_INFO; in t4_calibration()
1257 nex = &sc->cal_info[next_up]; in t4_calibration()
1258 if (__predict_false(sc->cal_count == 0)) { in t4_calibration()
1260 cur->hw_cur = hw; in t4_calibration()
1261 cur->sbt_cur = sbt; in t4_calibration()
1262 sc->cal_count++; in t4_calibration()
1266 if (cur->hw_cur == hw) { in t4_calibration()
1268 sc->cal_count = 0; in t4_calibration()
1269 atomic_store_rel_int(&cur->gen, 0); in t4_calibration()
1273 seqc_write_begin(&nex->gen); in t4_calibration()
1274 nex->hw_prev = cur->hw_cur; in t4_calibration()
1275 nex->sbt_prev = cur->sbt_cur; in t4_calibration()
1276 nex->hw_cur = hw; in t4_calibration()
1277 nex->sbt_cur = sbt; in t4_calibration()
1278 seqc_write_end(&nex->gen); in t4_calibration()
1279 sc->cal_current = next_up; in t4_calibration()
1281 callout_reset_sbt_curcpu(&sc->cal_callout, SBT_1S, 0, t4_calibration, in t4_calibration()
1296 sc->cal_info[i].gen = 0; in t4_calibration_start()
1298 sc->cal_current = 0; in t4_calibration_start()
1299 sc->cal_count = 0; in t4_calibration_start()
1300 sc->cal_gen = 0; in t4_calibration_start()
1325 sc->dev = dev; in t4_attach()
1326 sysctl_ctx_init(&sc->ctx); in t4_attach()
1327 TUNABLE_INT_FETCH("hw.cxgbe.dflags", &sc->debug_flags); in t4_attach()
1328 if (TUNABLE_INT_FETCH("hw.cxgbe.iflags", &sc->intr_flags) == 0) in t4_attach()
1329 sc->intr_flags = IHF_INTR_CLEAR_ON_INIT | IHF_CLR_ALL_UNIGNORED; in t4_attach()
1339 sc->params.pci.mps = 128 << ((v & PCIEM_CTL_MAX_PAYLOAD) >> 5); in t4_attach()
1351 sc->sge_gts_reg = MYPF_REG(A_SGE_PF_GTS); in t4_attach()
1352 sc->sge_kdoorbell_reg = MYPF_REG(A_SGE_PF_KDOORBELL); in t4_attach()
1353 sc->traceq = -1; in t4_attach()
1354 mtx_init(&sc->ifp_lock, sc->ifp_lockname, 0, MTX_DEF); in t4_attach()
1355 snprintf(sc->ifp_lockname, sizeof(sc->ifp_lockname), "%s tracer", in t4_attach()
1358 snprintf(sc->lockname, sizeof(sc->lockname), "%s", in t4_attach()
1360 mtx_init(&sc->sc_lock, sc->lockname, 0, MTX_DEF); in t4_attach()
1363 mtx_init(&sc->sfl_lock, "starving freelists", 0, MTX_DEF); in t4_attach()
1364 TAILQ_INIT(&sc->sfl); in t4_attach()
1365 callout_init_mtx(&sc->sfl_callout, &sc->sfl_lock, 0); in t4_attach()
1367 mtx_init(&sc->reg_lock, "indirect register access", 0, MTX_DEF); in t4_attach()
1369 sc->policy = NULL; in t4_attach()
1370 rw_init(&sc->policy_lock, "connection offload policy"); in t4_attach()
1372 callout_init(&sc->ktls_tick, 1); in t4_attach()
1374 callout_init(&sc->cal_callout, 1); in t4_attach()
1376 refcount_init(&sc->vxlan_refcount, 0); in t4_attach()
1378 TASK_INIT(&sc->reset_task, 0, reset_adapter_task, sc); in t4_attach()
1379 TASK_INIT(&sc->fatal_error_task, 0, fatal_error_task, sc); in t4_attach()
1381 sc->ctrlq_oid = SYSCTL_ADD_NODE(&sc->ctx, in t4_attach()
1382 SYSCTL_CHILDREN(device_get_sysctl_tree(sc->dev)), OID_AUTO, "ctrlq", in t4_attach()
1384 sc->fwq_oid = SYSCTL_ADD_NODE(&sc->ctx, in t4_attach()
1385 SYSCTL_CHILDREN(device_get_sysctl_tree(sc->dev)), OID_AUTO, "fwq", in t4_attach()
1392 memset(sc->chan_map, 0xff, sizeof(sc->chan_map)); in t4_attach()
1393 memset(sc->port_map, 0xff, sizeof(sc->port_map)); in t4_attach()
1397 rc = -t4_prep_adapter(sc, buf); in t4_attach()
1411 sc->pf = chip_id(sc) <= CHELSIO_T5 ? G_SOURCEPF(j) : G_T6_SOURCEPF(j); in t4_attach()
1412 sc->mbox = sc->pf; in t4_attach()
1415 if (sc->names == NULL) { in t4_attach()
1434 rc = make_dev_s(&mda, &sc->cdev, "%s", device_get_nameunit(dev)); in t4_attach()
1457 MPASS(sc->flags & FW_OK); in t4_attach()
1463 if (sc->flags & MASTER_PF) { in t4_attach()
1490 * First pass over all the ports - allocate VIs and initialize some in t4_attach()
1497 sc->port[i] = pi; in t4_attach()
1500 pi->adapter = sc; in t4_attach()
1501 pi->port_id = i; in t4_attach()
1504 * pi->nvi's final value is known. in t4_attach()
1506 pi->vi = malloc(sizeof(struct vi_info) * t4_num_vis, M_CXGBE, in t4_attach()
1513 rc = -t4_port_init(sc, sc->mbox, sc->pf, 0, i); in t4_attach()
1517 free(pi->vi, M_CXGBE); in t4_attach()
1519 sc->port[i] = NULL; in t4_attach()
1523 if (is_bt(pi->port_type)) in t4_attach()
1524 setbit(&sc->bt_map, pi->hw_port); in t4_attach()
1526 MPASS(!isset(&sc->bt_map, pi->hw_port)); in t4_attach()
1528 snprintf(pi->lockname, sizeof(pi->lockname), "%sp%d", in t4_attach()
1530 mtx_init(&pi->pi_lock, pi->lockname, 0, MTX_DEF); in t4_attach()
1531 for (j = 0; j < sc->params.tp.lb_nchan; j++) in t4_attach()
1532 sc->chan_map[pi->tx_chan + j] = i; in t4_attach()
1533 sc->port_map[pi->hw_port] = i; in t4_attach()
1542 pi->fcs_reg = -1; in t4_attach()
1544 pi->fcs_reg = A_MPS_PORT_STAT_RX_PORT_CRC_ERROR_L; in t4_attach()
1545 pi->fcs_base = 0; in t4_attach()
1548 ifmedia_init(&pi->media, IFM_IMASK, cxgbe_media_change, in t4_attach()
1556 pi->flags |= FIXED_IFMEDIA; in t4_attach()
1559 pi->dev = device_add_child(dev, sc->names->ifnet_name, in t4_attach()
1561 if (pi->dev == NULL) { in t4_attach()
1567 pi->vi[0].dev = pi->dev; in t4_attach()
1568 device_set_softc(pi->dev, pi); in t4_attach()
1574 nports = sc->params.nports; in t4_attach()
1580 sc->intr_type = iaq.intr_type; in t4_attach()
1581 sc->intr_count = iaq.nirq; in t4_attach()
1583 s = &sc->sge; in t4_attach()
1584 s->nctrlq = max(sc->params.nports, sc->params.ncores); in t4_attach()
1585 s->nrxq = nports * iaq.nrxq; in t4_attach()
1586 s->ntxq = nports * iaq.ntxq; in t4_attach()
1588 s->nrxq += nports * (num_vis - 1) * iaq.nrxq_vi; in t4_attach()
1589 s->ntxq += nports * (num_vis - 1) * iaq.ntxq_vi; in t4_attach()
1591 s->neq = s->ntxq + s->nrxq; /* the free list in an rxq is an eq */ in t4_attach()
1592 s->neq += nports; /* ctrl queues: 1 per port */ in t4_attach()
1593 s->niq = s->nrxq + 1; /* 1 extra for firmware event queue */ in t4_attach()
1596 s->nofldtxq = nports * iaq.nofldtxq; in t4_attach()
1598 s->nofldtxq += nports * (num_vis - 1) * iaq.nofldtxq_vi; in t4_attach()
1599 s->neq += s->nofldtxq; in t4_attach()
1601 s->ofld_txq = malloc(s->nofldtxq * sizeof(struct sge_ofld_txq), in t4_attach()
1607 s->nofldrxq = nports * iaq.nofldrxq; in t4_attach()
1609 s->nofldrxq += nports * (num_vis - 1) * iaq.nofldrxq_vi; in t4_attach()
1610 s->neq += s->nofldrxq; /* free list */ in t4_attach()
1611 s->niq += s->nofldrxq; in t4_attach()
1613 s->ofld_rxq = malloc(s->nofldrxq * sizeof(struct sge_ofld_rxq), in t4_attach()
1618 s->nnmrxq = 0; in t4_attach()
1619 s->nnmtxq = 0; in t4_attach()
1621 s->nnmrxq += nports * iaq.nnmrxq; in t4_attach()
1622 s->nnmtxq += nports * iaq.nnmtxq; in t4_attach()
1625 s->nnmrxq += nports * (num_vis - 1) * iaq.nnmrxq_vi; in t4_attach()
1626 s->nnmtxq += nports * (num_vis - 1) * iaq.nnmtxq_vi; in t4_attach()
1628 s->neq += s->nnmtxq + s->nnmrxq; in t4_attach()
1629 s->niq += s->nnmrxq; in t4_attach()
1631 s->nm_rxq = malloc(s->nnmrxq * sizeof(struct sge_nm_rxq), in t4_attach()
1633 s->nm_txq = malloc(s->nnmtxq * sizeof(struct sge_nm_txq), in t4_attach()
1636 MPASS(s->niq <= s->iqmap_sz); in t4_attach()
1637 MPASS(s->neq <= s->eqmap_sz); in t4_attach()
1639 s->ctrlq = malloc(s->nctrlq * sizeof(struct sge_wrq), M_CXGBE, in t4_attach()
1641 s->rxq = malloc(s->nrxq * sizeof(struct sge_rxq), M_CXGBE, in t4_attach()
1643 s->txq = malloc(s->ntxq * sizeof(struct sge_txq), M_CXGBE, in t4_attach()
1645 s->iqmap = malloc(s->iqmap_sz * sizeof(struct sge_iq *), M_CXGBE, in t4_attach()
1647 s->eqmap = malloc(s->eqmap_sz * sizeof(struct sge_eq *), M_CXGBE, in t4_attach()
1650 sc->irq = malloc(sc->intr_count * sizeof(struct irq), M_CXGBE, in t4_attach()
1663 if (sc->vres.key.size != 0) in t4_attach()
1664 sc->key_map = vmem_create("T4TLS key map", sc->vres.key.start, in t4_attach()
1665 sc->vres.key.size, 32, 0, M_FIRSTFIT | M_WAITOK); in t4_attach()
1683 struct port_info *pi = sc->port[i]; in t4_attach()
1689 pi->nvi = num_vis; in t4_attach()
1691 vi->pi = pi; in t4_attach()
1692 vi->adapter = sc; in t4_attach()
1693 vi->first_intr = -1; in t4_attach()
1694 vi->qsize_rxq = t4_qsize_rxq; in t4_attach()
1695 vi->qsize_txq = t4_qsize_txq; in t4_attach()
1697 vi->first_rxq = rqidx; in t4_attach()
1698 vi->first_txq = tqidx; in t4_attach()
1699 vi->tmr_idx = t4_tmr_idx; in t4_attach()
1700 vi->pktc_idx = t4_pktc_idx; in t4_attach()
1701 vi->nrxq = j == 0 ? iaq.nrxq : iaq.nrxq_vi; in t4_attach()
1702 vi->ntxq = j == 0 ? iaq.ntxq : iaq.ntxq_vi; in t4_attach()
1704 rqidx += vi->nrxq; in t4_attach()
1705 tqidx += vi->ntxq; in t4_attach()
1707 if (j == 0 && vi->ntxq > 1) in t4_attach()
1708 vi->rsrv_noflowq = t4_rsrv_noflowq ? 1 : 0; in t4_attach()
1710 vi->rsrv_noflowq = 0; in t4_attach()
1713 vi->first_ofld_txq = ofld_tqidx; in t4_attach()
1714 vi->nofldtxq = j == 0 ? iaq.nofldtxq : iaq.nofldtxq_vi; in t4_attach()
1715 ofld_tqidx += vi->nofldtxq; in t4_attach()
1718 vi->ofld_tmr_idx = t4_tmr_idx_ofld; in t4_attach()
1719 vi->ofld_pktc_idx = t4_pktc_idx_ofld; in t4_attach()
1720 vi->first_ofld_rxq = ofld_rqidx; in t4_attach()
1721 vi->nofldrxq = j == 0 ? iaq.nofldrxq : iaq.nofldrxq_vi; in t4_attach()
1723 ofld_rqidx += vi->nofldrxq; in t4_attach()
1726 vi->first_nm_rxq = nm_rqidx; in t4_attach()
1727 vi->first_nm_txq = nm_tqidx; in t4_attach()
1729 vi->nnmrxq = iaq.nnmrxq; in t4_attach()
1730 vi->nnmtxq = iaq.nnmtxq; in t4_attach()
1732 vi->nnmrxq = iaq.nnmrxq_vi; in t4_attach()
1733 vi->nnmtxq = iaq.nnmtxq_vi; in t4_attach()
1735 nm_rqidx += vi->nnmrxq; in t4_attach()
1736 nm_tqidx += vi->nnmtxq; in t4_attach()
1751 * Ensure thread-safe mailbox access (in debug builds). in t4_attach()
1757 sc->flags |= CHK_MBOX_ACCESS; in t4_attach()
1764 sc->params.pci.speed, sc->params.pci.width, sc->params.nports, in t4_attach()
1765 sc->intr_count, sc->intr_type == INTR_MSIX ? "MSI-X" : in t4_attach()
1766 (sc->intr_type == INTR_MSI ? "MSI" : "INTx"), in t4_attach()
1767 sc->intr_count > 1 ? "s" : "", sc->sge.neq, sc->sge.niq); in t4_attach()
1774 if (rc != 0 && sc->cdev) { in t4_attach()
1798 pi = sc->port[i]; in t4_child_location()
1799 if (pi != NULL && pi->dev == dev) { in t4_child_location()
1800 sbuf_printf(sb, "port=%d", pi->port_id); in t4_child_location()
1813 if (sc->flags & FW_OK) in t4_ready()
1827 pi = sc->port[port]; in t4_read_port_device()
1828 if (pi == NULL || pi->dev == NULL) in t4_read_port_device()
1830 *child = pi->dev; in t4_read_port_device()
1894 if (sc->cdev) { in t4_detach_common()
1895 destroy_dev(sc->cdev); in t4_detach_common()
1896 sc->cdev = NULL; in t4_detach_common()
1903 sc->flags &= ~CHK_MBOX_ACCESS; in t4_detach_common()
1904 if (sc->flags & FULL_INIT_DONE) { in t4_detach_common()
1905 if (!(sc->flags & IS_VF)) in t4_detach_common()
1918 for (i = 0; i < sc->intr_count; i++) in t4_detach_common()
1919 t4_free_irq(sc, &sc->irq[i]); in t4_detach_common()
1921 if ((sc->flags & (IS_VF | FW_OK)) == FW_OK) in t4_detach_common()
1925 pi = sc->port[i]; in t4_detach_common()
1927 t4_free_vi(sc, sc->mbox, sc->pf, 0, pi->vi[0].viid); in t4_detach_common()
1929 mtx_destroy(&pi->pi_lock); in t4_detach_common()
1930 free(pi->vi, M_CXGBE); in t4_detach_common()
1934 callout_stop(&sc->cal_callout); in t4_detach_common()
1935 callout_drain(&sc->cal_callout); in t4_detach_common()
1937 sysctl_ctx_free(&sc->ctx); in t4_detach_common()
1940 if ((sc->flags & (IS_VF | FW_OK)) == FW_OK) in t4_detach_common()
1941 t4_fw_bye(sc, sc->mbox); in t4_detach_common()
1943 if (sc->intr_type == INTR_MSI || sc->intr_type == INTR_MSIX) in t4_detach_common()
1946 if (sc->regs_res) in t4_detach_common()
1947 bus_release_resource(dev, SYS_RES_MEMORY, sc->regs_rid, in t4_detach_common()
1948 sc->regs_res); in t4_detach_common()
1950 if (sc->udbs_res) in t4_detach_common()
1951 bus_release_resource(dev, SYS_RES_MEMORY, sc->udbs_rid, in t4_detach_common()
1952 sc->udbs_res); in t4_detach_common()
1954 if (sc->msix_res) in t4_detach_common()
1955 bus_release_resource(dev, SYS_RES_MEMORY, sc->msix_rid, in t4_detach_common()
1956 sc->msix_res); in t4_detach_common()
1958 if (sc->l2t) in t4_detach_common()
1960 if (sc->smt) in t4_detach_common()
1961 t4_free_smt(sc->smt); in t4_detach_common()
1966 if (sc->key_map) in t4_detach_common()
1967 vmem_destroy(sc->key_map); in t4_detach_common()
1974 free(sc->sge.ofld_txq, M_CXGBE); in t4_detach_common()
1977 free(sc->sge.ofld_rxq, M_CXGBE); in t4_detach_common()
1980 free(sc->sge.nm_rxq, M_CXGBE); in t4_detach_common()
1981 free(sc->sge.nm_txq, M_CXGBE); in t4_detach_common()
1983 free(sc->irq, M_CXGBE); in t4_detach_common()
1984 free(sc->sge.rxq, M_CXGBE); in t4_detach_common()
1985 free(sc->sge.txq, M_CXGBE); in t4_detach_common()
1986 free(sc->sge.ctrlq, M_CXGBE); in t4_detach_common()
1987 free(sc->sge.iqmap, M_CXGBE); in t4_detach_common()
1988 free(sc->sge.eqmap, M_CXGBE); in t4_detach_common()
1989 free(sc->tids.ftid_tab, M_CXGBE); in t4_detach_common()
1990 free(sc->tids.hpftid_tab, M_CXGBE); in t4_detach_common()
1991 free_hftid_hash(&sc->tids); in t4_detach_common()
1992 free(sc->tids.tid_tab, M_CXGBE); in t4_detach_common()
1995 callout_drain(&sc->ktls_tick); in t4_detach_common()
1996 callout_drain(&sc->sfl_callout); in t4_detach_common()
1997 if (mtx_initialized(&sc->tids.ftid_lock)) { in t4_detach_common()
1998 mtx_destroy(&sc->tids.ftid_lock); in t4_detach_common()
1999 cv_destroy(&sc->tids.ftid_cv); in t4_detach_common()
2001 if (mtx_initialized(&sc->tids.atid_lock)) in t4_detach_common()
2002 mtx_destroy(&sc->tids.atid_lock); in t4_detach_common()
2003 if (mtx_initialized(&sc->ifp_lock)) in t4_detach_common()
2004 mtx_destroy(&sc->ifp_lock); in t4_detach_common()
2006 if (rw_initialized(&sc->policy_lock)) { in t4_detach_common()
2007 rw_destroy(&sc->policy_lock); in t4_detach_common()
2009 if (sc->policy != NULL) in t4_detach_common()
2010 free_offload_policy(sc->policy); in t4_detach_common()
2015 struct memwin *mw = &sc->memwin[i]; in t4_detach_common()
2017 if (rw_initialized(&mw->mw_lock)) in t4_detach_common()
2018 rw_destroy(&mw->mw_lock); in t4_detach_common()
2021 mtx_destroy(&sc->sfl_lock); in t4_detach_common()
2022 mtx_destroy(&sc->reg_lock); in t4_detach_common()
2023 mtx_destroy(&sc->sc_lock); in t4_detach_common()
2036 if (atomic_testandset_int(&sc->error_flags, ilog2(ADAP_STOPPED))) { in stop_adapter()
2038 __func__, curthread, sc->flags, sc->error_flags); in stop_adapter()
2042 sc->flags, sc->error_flags); in stop_adapter()
2045 pi = sc->port[i]; in stop_adapter()
2049 if (pi->up_vis > 0 && pi->link_cfg.link_ok) { in stop_adapter()
2056 pi->link_cfg.link_ok = false; in stop_adapter()
2070 if (!atomic_testandclear_int(&sc->error_flags, ilog2(ADAP_STOPPED))) { in restart_adapter()
2072 __func__, curthread, sc->flags, sc->error_flags); in restart_adapter()
2076 sc->flags, sc->error_flags); in restart_adapter()
2079 MPASS((sc->flags & FW_OK) == 0); in restart_adapter()
2080 MPASS((sc->flags & MASTER_PF) == 0); in restart_adapter()
2081 MPASS(sc->reset_thread == NULL); in restart_adapter()
2084 * The adapter is supposed to be back on PCIE with its config space and in restart_adapter()
2088 sc->reset_thread = curthread; in restart_adapter()
2092 sc->reset_thread = NULL; in restart_adapter()
2093 atomic_set_int(&sc->error_flags, ADAP_STOPPED); in restart_adapter()
2096 atomic_clear_int(&sc->error_flags, ADAP_FATAL_ERR); in restart_adapter()
2097 atomic_add_int(&sc->incarnation, 1); in restart_adapter()
2098 atomic_add_int(&sc->num_resets, 1); in restart_adapter()
2109 MPASS(sc->reset_thread == curthread); in set_adapter_hwstatus()
2110 mtx_lock(&sc->reg_lock); in set_adapter_hwstatus()
2111 atomic_clear_int(&sc->error_flags, HW_OFF_LIMITS); in set_adapter_hwstatus()
2112 mtx_unlock(&sc->reg_lock); in set_adapter_hwstatus()
2116 mtx_lock(&sc->reg_lock); in set_adapter_hwstatus()
2117 atomic_set_int(&sc->error_flags, HW_OFF_LIMITS); in set_adapter_hwstatus()
2118 mtx_unlock(&sc->reg_lock); in set_adapter_hwstatus()
2119 sc->flags &= ~(FW_OK | MASTER_PF); in set_adapter_hwstatus()
2120 sc->reset_thread = NULL; in set_adapter_hwstatus()
2158 pi = sc->port[i]; in stop_lld()
2161 pi->vxlan_tcam_entry = false; in stop_lld()
2163 vi->xact_addr_filt = -1; in stop_lld()
2164 mtx_lock(&vi->tick_mtx); in stop_lld()
2165 vi->flags |= VI_SKIP_STATS; in stop_lld()
2166 mtx_unlock(&vi->tick_mtx); in stop_lld()
2167 if (!(vi->flags & VI_INIT_DONE)) in stop_lld()
2170 ifp = vi->ifp; in stop_lld()
2172 mtx_lock(&vi->tick_mtx); in stop_lld()
2173 callout_stop(&vi->tick); in stop_lld()
2174 mtx_unlock(&vi->tick_mtx); in stop_lld()
2175 callout_drain(&vi->tick); in stop_lld()
2183 txq->eq.flags &= ~(EQ_ENABLED | EQ_HW_ALLOCATED); in stop_lld()
2188 TXQ_LOCK(&ofld_txq->wrq); in stop_lld()
2189 ofld_txq->wrq.eq.flags &= ~EQ_HW_ALLOCATED; in stop_lld()
2190 TXQ_UNLOCK(&ofld_txq->wrq); in stop_lld()
2194 rxq->iq.flags &= ~IQ_HW_ALLOCATED; in stop_lld()
2198 ofld_rxq->iq.flags &= ~IQ_HW_ALLOCATED; in stop_lld()
2205 if (sc->flags & FULL_INIT_DONE) { in stop_lld()
2207 wrq = &sc->sge.ctrlq[i]; in stop_lld()
2209 wrq->eq.flags &= ~EQ_HW_ALLOCATED; in stop_lld()
2214 if (pi->flags & HAS_TRACEQ) { in stop_lld()
2215 pi->flags &= ~HAS_TRACEQ; in stop_lld()
2216 sc->traceq = -1; in stop_lld()
2217 sc->tracer_valid = 0; in stop_lld()
2218 sc->tracer_enabled = 0; in stop_lld()
2221 if (sc->flags & FULL_INIT_DONE) { in stop_lld()
2223 sc->sge.fwq.flags &= ~IQ_HW_ALLOCATED; in stop_lld()
2224 quiesce_iq_fl(sc, &sc->sge.fwq, NULL); in stop_lld()
2228 callout_stop(&sc->cal_callout); in stop_lld()
2229 callout_drain(&sc->cal_callout); in stop_lld()
2303 o->flags = sc->flags; in save_caps_and_params()
2305 o->nbmcaps = sc->nbmcaps; in save_caps_and_params()
2306 o->linkcaps = sc->linkcaps; in save_caps_and_params()
2307 o->switchcaps = sc->switchcaps; in save_caps_and_params()
2308 o->nvmecaps = sc->nvmecaps; in save_caps_and_params()
2309 o->niccaps = sc->niccaps; in save_caps_and_params()
2310 o->toecaps = sc->toecaps; in save_caps_and_params()
2311 o->rdmacaps = sc->rdmacaps; in save_caps_and_params()
2312 o->cryptocaps = sc->cryptocaps; in save_caps_and_params()
2313 o->iscsicaps = sc->iscsicaps; in save_caps_and_params()
2314 o->fcoecaps = sc->fcoecaps; in save_caps_and_params()
2316 o->cfcsum = sc->cfcsum; in save_caps_and_params()
2317 MPASS(sizeof(o->cfg_file) == sizeof(sc->cfg_file)); in save_caps_and_params()
2318 memcpy(o->cfg_file, sc->cfg_file, sizeof(o->cfg_file)); in save_caps_and_params()
2320 o->params = sc->params; in save_caps_and_params()
2321 o->vres = sc->vres; in save_caps_and_params()
2322 o->tids = sc->tids; in save_caps_and_params()
2323 o->sge = sc->sge; in save_caps_and_params()
2325 o->rawf_base = sc->rawf_base; in save_caps_and_params()
2326 o->nrawf = sc->nrawf; in save_caps_and_params()
2338 if (o->c##caps != sc->c##caps) { \ in compare_caps_and_params()
2339 CH_ERR(sc, "%scaps 0x%04x -> 0x%04x.\n", #c, o->c##caps, \ in compare_caps_and_params()
2340 sc->c##caps); \ in compare_caps_and_params()
2356 /* Firmware config file */ in compare_caps_and_params()
2357 if (o->cfcsum != sc->cfcsum) { in compare_caps_and_params()
2358 CH_ERR(sc, "config file %s (0x%x) -> %s (0x%x)\n", o->cfg_file, in compare_caps_and_params()
2359 o->cfcsum, sc->cfg_file, sc->cfcsum); in compare_caps_and_params()
2364 if (o->p != sc->p) { \ in compare_caps_and_params()
2365 CH_ERR(sc, #name " %d -> %d\n", o->p, sc->p); \ in compare_caps_and_params()
2457 MPASS(sc->flags & FW_OK); in restart_lld()
2459 if (sc->flags & MASTER_PF) { in restart_lld()
2478 pi = sc->port[i]; in restart_lld()
2480 MPASS(pi->vi != NULL); in restart_lld()
2481 MPASS(pi->vi[0].dev == pi->dev); in restart_lld()
2483 rc = -t4_port_init(sc, sc->mbox, sc->pf, 0, i); in restart_lld()
2486 "failed to re-initialize port %d: %d\n", i, rc); in restart_lld()
2489 MPASS(sc->chan_map[pi->tx_chan] == i); in restart_lld()
2501 "failed to re-allocate extra VI: %d\n", rc); in restart_lld()
2514 if (sc->flags & FULL_INIT_DONE) { in restart_lld()
2517 CH_ERR(sc, "failed to re-initialize adapter: %d\n", rc); in restart_lld()
2521 if (sc->vxlan_refcount > 0) in restart_lld()
2525 pi = sc->port[i]; in restart_lld()
2527 mtx_lock(&vi->tick_mtx); in restart_lld()
2528 vi->flags &= ~VI_SKIP_STATS; in restart_lld()
2529 mtx_unlock(&vi->tick_mtx); in restart_lld()
2530 if (!(vi->flags & VI_INIT_DONE)) in restart_lld()
2534 CH_ERR(vi, "failed to re-initialize " in restart_lld()
2538 if (sc->traceq < 0 && IS_MAIN_VI(vi)) { in restart_lld()
2539 sc->traceq = sc->sge.rxq[vi->first_rxq].iq.abs_id; in restart_lld()
2540 t4_set_trace_rss_control(sc, pi->tx_chan, sc->traceq); in restart_lld()
2541 pi->flags |= HAS_TRACEQ; in restart_lld()
2544 ifp = vi->ifp; in restart_lld()
2556 CH_ERR(vi, "failed to re-configure MAC: %d\n", rc); in restart_lld()
2559 rc = -t4_enable_vi(sc, sc->mbox, vi->viid, true, in restart_lld()
2562 CH_ERR(vi, "failed to re-enable VI: %d\n", rc); in restart_lld()
2567 txq->eq.flags |= EQ_ENABLED; in restart_lld()
2570 mtx_lock(&vi->tick_mtx); in restart_lld()
2571 callout_schedule(&vi->tick, hz); in restart_lld()
2572 mtx_unlock(&vi->tick_mtx); in restart_lld()
2575 if (pi->up_vis > 0) { in restart_lld()
2580 if (pi->link_cfg.link_ok) in restart_lld()
2588 pi = sc->port[i]; in restart_lld()
2590 if (!(vi->flags & VI_INIT_DONE)) in restart_lld()
2592 ifp = vi->ifp; in restart_lld()
2597 CH_ERR(vi, "failed to re-configure MCAST MACs: %d\n", rc); in restart_lld()
2662 MPASS(sc->error_flags & HW_OFF_LIMITS); in reset_adapter_with_pl_rst()
2663 bus_space_write_4(sc->bt, sc->bh, A_PL_RST, in reset_adapter_with_pl_rst()
2672 device_t pdev = device_get_parent(sc->dev); in reset_adapter_with_pcie_sbr()
2718 device_t pdev = device_get_parent(sc->dev); in reset_adapter_with_pcie_link_bounce()
2793 const int flags = sc->flags; in reset_adapter_task()
2794 const int eflags = sc->error_flags; in reset_adapter_task()
2802 "flags 0x%08x -> 0x%08x, err_flags 0x%08x -> 0x%08x.\n", in reset_adapter_task()
2803 rc, flags, sc->flags, eflags, sc->error_flags); in reset_adapter_task()
2812 device_set_descf(dev, "port %d", pi->port_id); in cxgbe_probe()
2828 struct sysctl_ctx_list *ctx = &vi->ctx; in cxgbe_vi_attach()
2831 struct adapter *sc = vi->adapter; in cxgbe_vi_attach()
2834 children = SYSCTL_CHILDREN(device_get_sysctl_tree(vi->dev)); in cxgbe_vi_attach()
2835 vi->rxq_oid = SYSCTL_ADD_NODE(ctx, children, OID_AUTO, "rxq", in cxgbe_vi_attach()
2837 vi->txq_oid = SYSCTL_ADD_NODE(ctx, children, OID_AUTO, "txq", in cxgbe_vi_attach()
2840 vi->nm_rxq_oid = SYSCTL_ADD_NODE(ctx, children, OID_AUTO, "nm_rxq", in cxgbe_vi_attach()
2842 vi->nm_txq_oid = SYSCTL_ADD_NODE(ctx, children, OID_AUTO, "nm_txq", in cxgbe_vi_attach()
2846 vi->ofld_rxq_oid = SYSCTL_ADD_NODE(ctx, children, OID_AUTO, "ofld_rxq", in cxgbe_vi_attach()
2850 vi->ofld_txq_oid = SYSCTL_ADD_NODE(ctx, children, OID_AUTO, "ofld_txq", in cxgbe_vi_attach()
2854 vi->xact_addr_filt = -1; in cxgbe_vi_attach()
2855 mtx_init(&vi->tick_mtx, "vi tick", NULL, MTX_DEF); in cxgbe_vi_attach()
2856 callout_init_mtx(&vi->tick, &vi->tick_mtx, 0); in cxgbe_vi_attach()
2857 if (sc->flags & IS_VF || t4_tx_vm_wr != 0) in cxgbe_vi_attach()
2858 vi->flags |= TX_USES_VM_WR; in cxgbe_vi_attach()
2862 vi->ifp = ifp; in cxgbe_vi_attach()
2872 if (vi->pi->nvi > 1 || sc->flags & IS_VF) in cxgbe_vi_attach()
2896 if (vi->nofldrxq != 0) in cxgbe_vi_attach()
2900 if (is_ethoffload(sc) && vi->nofldtxq != 0) { in cxgbe_vi_attach()
2907 if (vi->flags & TX_USES_VM_WR) in cxgbe_vi_attach()
2912 if (is_ethoffload(sc) && vi->nofldtxq != 0) in cxgbe_vi_attach()
2919 if (sc->flags & KERN_TLS_ON || !is_t6(sc)) in cxgbe_vi_attach()
2924 ether_ifattach(ifp, vi->hw_addr); in cxgbe_vi_attach()
2926 if (vi->nnmrxq != 0) in cxgbe_vi_attach()
2930 sbuf_printf(sb, "%d txq, %d rxq (NIC)", vi->ntxq, vi->nrxq); in cxgbe_vi_attach()
2934 sbuf_printf(sb, "; %d txq (TOE)", vi->nofldtxq); in cxgbe_vi_attach()
2937 sbuf_printf(sb, "; %d txq (TOE/ETHOFLD)", vi->nofldtxq); in cxgbe_vi_attach()
2940 sbuf_printf(sb, "; %d txq (ETHOFLD)", vi->nofldtxq); in cxgbe_vi_attach()
2946 sbuf_printf(sb, ", %d rxq (TOE)", vi->nofldrxq); in cxgbe_vi_attach()
2951 vi->nnmtxq, vi->nnmrxq); in cxgbe_vi_attach()
2963 vi->pfil = pfil_head_register(&pa); in cxgbe_vi_attach()
2970 struct adapter *sc = pi->adapter; in cxgbe_attach()
2974 sysctl_ctx_init(&pi->ctx); in cxgbe_attach()
2976 cxgbe_vi_attach(dev, &pi->vi[0]); in cxgbe_attach()
2981 vi->dev = device_add_child(dev, sc->names->vi_ifnet_name, DEVICE_UNIT_ANY); in cxgbe_attach()
2982 if (vi->dev == NULL) { in cxgbe_attach()
2986 device_set_softc(vi->dev, vi); in cxgbe_attach()
2999 if_t ifp = vi->ifp; in cxgbe_vi_detach()
3001 if (vi->pfil != NULL) { in cxgbe_vi_detach()
3002 pfil_head_unregister(vi->pfil); in cxgbe_vi_detach()
3003 vi->pfil = NULL; in cxgbe_vi_detach()
3014 callout_drain(&vi->tick); in cxgbe_vi_detach()
3015 mtx_destroy(&vi->tick_mtx); in cxgbe_vi_detach()
3016 sysctl_ctx_free(&vi->ctx); in cxgbe_vi_detach()
3019 if_free(vi->ifp); in cxgbe_vi_detach()
3020 vi->ifp = NULL; in cxgbe_vi_detach()
3027 struct adapter *sc = pi->adapter; in cxgbe_detach()
3035 sysctl_ctx_free(&pi->ctx); in cxgbe_detach()
3036 begin_vi_detach(sc, &pi->vi[0]); in cxgbe_detach()
3037 if (pi->flags & HAS_TRACEQ) { in cxgbe_detach()
3038 sc->traceq = -1; /* cloner should not create ifnet */ in cxgbe_detach()
3041 cxgbe_vi_detach(&pi->vi[0]); in cxgbe_detach()
3042 ifmedia_removeall(&pi->media); in cxgbe_detach()
3043 end_vi_detach(sc, &pi->vi[0]); in cxgbe_detach()
3052 struct adapter *sc = vi->adapter; in cxgbe_init()
3065 struct port_info *pi = vi->pi; in cxgbe_ioctl()
3066 struct adapter *sc = pi->adapter; in cxgbe_ioctl()
3072 mtu = ifr->ifr_mtu; in cxgbe_ioctl()
3080 if (vi->flags & VI_INIT_DONE) { in cxgbe_ioctl()
3101 flags = vi->if_flags; in cxgbe_ioctl()
3110 vi->if_flags = if_getflags(ifp); in cxgbe_ioctl()
3139 mask = ifr_nv->reqcap ^ if_getcapenable(ifp); in cxgbe_ioctl()
3140 mask2 = ifr_nv->reqcap2 ^ if_getcapenable2(ifp); in cxgbe_ioctl()
3142 mask = ifr->ifr_reqcap ^ if_getcapenable(ifp); in cxgbe_ioctl()
3154 "tso4 disabled due to -txcsum.\n"); in cxgbe_ioctl()
3166 "tso6 disabled due to -txcsum6.\n"); in cxgbe_ioctl()
3206 rxq->iq.flags |= IQ_LRO_ENABLED; in cxgbe_ioctl()
3208 rxq->iq.flags &= ~IQ_LRO_ENABLED; in cxgbe_ioctl()
3231 /* Need to find out how to disable auto-mtu-inflation */ in cxgbe_ioctl()
3248 rxq->iq.flags |= IQ_RX_TIMESTAMP; in cxgbe_ioctl()
3250 rxq->iq.flags &= ~IQ_RX_TIMESTAMP; in cxgbe_ioctl()
3292 rc = ifmedia_ioctl(ifp, ifr, &pi->media, cmd); in cxgbe_ioctl()
3315 rc = -t4_i2c_rd(sc, sc->mbox, pi->port_id, i2c.dev_addr, in cxgbe_ioctl()
3334 struct port_info *pi = vi->pi; in cxgbe_transmit()
3341 MPASS(m->m_nextpkt == NULL); /* not quite ready for this yet */ in cxgbe_transmit()
3343 if (m->m_pkthdr.csum_flags & CSUM_SND_TAG) in cxgbe_transmit()
3344 MPASS(m->m_pkthdr.snd_tag->ifp == ifp); in cxgbe_transmit()
3347 if (__predict_false(pi->link_cfg.link_ok == false)) { in cxgbe_transmit()
3352 rc = parse_pkt(&m, vi->flags & TX_USES_VM_WR); in cxgbe_transmit()
3361 atomic_add_int(&pi->tx_parse_error, 1); /* rare, atomic is ok */ in cxgbe_transmit()
3366 sc = vi->adapter; in cxgbe_transmit()
3367 txq = &sc->sge.txq[vi->first_txq]; in cxgbe_transmit()
3369 txq += ((m->m_pkthdr.flowid % (vi->ntxq - vi->rsrv_noflowq)) + in cxgbe_transmit()
3370 vi->rsrv_noflowq); in cxgbe_transmit()
3373 rc = mp_ring_enqueue(txq->r, items, 1, 256); in cxgbe_transmit()
3388 if (vi->flags & VI_INIT_DONE) { in cxgbe_qflush()
3391 txq->eq.flags |= EQ_QFLUSH; in cxgbe_qflush()
3393 while (!mp_ring_is_idle(txq->r)) { in cxgbe_qflush()
3394 mp_ring_check_drainage(txq->r, 4096); in cxgbe_qflush()
3398 txq->eq.flags &= ~EQ_QFLUSH; in cxgbe_qflush()
3409 struct fw_vi_stats_vf *s = &vi->stats; in vi_get_counter()
3411 mtx_lock(&vi->tick_mtx); in vi_get_counter()
3413 mtx_unlock(&vi->tick_mtx); in vi_get_counter()
3417 return (s->rx_bcast_frames + s->rx_mcast_frames + in vi_get_counter()
3418 s->rx_ucast_frames); in vi_get_counter()
3420 return (s->rx_err_frames); in vi_get_counter()
3422 return (s->tx_bcast_frames + s->tx_mcast_frames + in vi_get_counter()
3423 s->tx_ucast_frames + s->tx_offload_frames); in vi_get_counter()
3425 return (s->tx_drop_frames); in vi_get_counter()
3427 return (s->rx_bcast_bytes + s->rx_mcast_bytes + in vi_get_counter()
3428 s->rx_ucast_bytes); in vi_get_counter()
3430 return (s->tx_bcast_bytes + s->tx_mcast_bytes + in vi_get_counter()
3431 s->tx_ucast_bytes + s->tx_offload_bytes); in vi_get_counter()
3433 return (s->rx_mcast_frames); in vi_get_counter()
3435 return (s->tx_mcast_frames); in vi_get_counter()
3440 if (vi->flags & VI_INIT_DONE) { in vi_get_counter()
3445 drops += counter_u64_fetch(txq->r->dropped); in vi_get_counter()
3461 struct port_info *pi = vi->pi; in cxgbe_get_counter()
3462 struct port_stats *s = &pi->stats; in cxgbe_get_counter()
3464 mtx_lock(&vi->tick_mtx); in cxgbe_get_counter()
3466 mtx_unlock(&vi->tick_mtx); in cxgbe_get_counter()
3470 return (s->rx_frames); in cxgbe_get_counter()
3473 return (s->rx_jabber + s->rx_runt + s->rx_too_long + in cxgbe_get_counter()
3474 s->rx_fcs_err + s->rx_len_err); in cxgbe_get_counter()
3477 return (s->tx_frames); in cxgbe_get_counter()
3480 return (s->tx_error_frames); in cxgbe_get_counter()
3483 return (s->rx_octets); in cxgbe_get_counter()
3486 return (s->tx_octets); in cxgbe_get_counter()
3489 return (s->rx_mcast_frames); in cxgbe_get_counter()
3492 return (s->tx_mcast_frames); in cxgbe_get_counter()
3495 return (s->rx_ovflow0 + s->rx_ovflow1 + s->rx_ovflow2 + in cxgbe_get_counter()
3496 s->rx_ovflow3 + s->rx_trunc0 + s->rx_trunc1 + s->rx_trunc2 + in cxgbe_get_counter()
3497 s->rx_trunc3 + pi->tnl_cong_drops); in cxgbe_get_counter()
3502 drops = s->tx_drop; in cxgbe_get_counter()
3503 if (vi->flags & VI_INIT_DONE) { in cxgbe_get_counter()
3508 drops += counter_u64_fetch(txq->r->dropped); in cxgbe_get_counter()
3527 switch (params->hdr.type) { in cxgbe_snd_tag_alloc()
3538 if (is_t6(vi->pi->adapter)) in cxgbe_snd_tag_alloc()
3560 struct port_info *pi = vi->pi; in cxgbe_media_change()
3561 struct ifmedia *ifm = &pi->media; in cxgbe_media_change()
3562 struct link_config *lc = &pi->link_cfg; in cxgbe_media_change()
3563 struct adapter *sc = pi->adapter; in cxgbe_media_change()
3570 if (IFM_SUBTYPE(ifm->ifm_media) == IFM_AUTO) { in cxgbe_media_change()
3572 if (!(lc->pcaps & FW_PORT_CAP32_ANEG)) { in cxgbe_media_change()
3576 lc->requested_aneg = AUTONEG_ENABLE; in cxgbe_media_change()
3577 lc->requested_speed = 0; in cxgbe_media_change()
3578 lc->requested_fc |= PAUSE_AUTONEG; in cxgbe_media_change()
3580 lc->requested_aneg = AUTONEG_DISABLE; in cxgbe_media_change()
3581 lc->requested_speed = in cxgbe_media_change()
3582 ifmedia_baudrate(ifm->ifm_media) / 1000000; in cxgbe_media_change()
3583 lc->requested_fc = 0; in cxgbe_media_change()
3584 if (IFM_OPTIONS(ifm->ifm_media) & IFM_ETH_RXPAUSE) in cxgbe_media_change()
3585 lc->requested_fc |= PAUSE_RX; in cxgbe_media_change()
3586 if (IFM_OPTIONS(ifm->ifm_media) & IFM_ETH_TXPAUSE) in cxgbe_media_change()
3587 lc->requested_fc |= PAUSE_TX; in cxgbe_media_change()
3589 if (pi->up_vis > 0 && hw_all_ok(sc)) { in cxgbe_media_change()
3610 switch(pi->port_type) { in port_mword()
3672 switch (pi->mod_type) { in port_mword()
3763 if (chip_id(pi->adapter) >= CHELSIO_T7) in port_mword()
3777 struct port_info *pi = vi->pi; in cxgbe_media_status()
3778 struct adapter *sc = pi->adapter; in cxgbe_media_status()
3779 struct link_config *lc = &pi->link_cfg; in cxgbe_media_status()
3785 if (pi->up_vis == 0 && hw_all_ok(sc)) { in cxgbe_media_status()
3798 ifmr->ifm_status = IFM_AVALID; in cxgbe_media_status()
3799 if (lc->link_ok == false) in cxgbe_media_status()
3801 ifmr->ifm_status |= IFM_ACTIVE; in cxgbe_media_status()
3804 ifmr->ifm_active = IFM_ETHER | IFM_FDX; in cxgbe_media_status()
3805 ifmr->ifm_active &= ~(IFM_ETH_TXPAUSE | IFM_ETH_RXPAUSE); in cxgbe_media_status()
3806 if (lc->fc & PAUSE_RX) in cxgbe_media_status()
3807 ifmr->ifm_active |= IFM_ETH_RXPAUSE; in cxgbe_media_status()
3808 if (lc->fc & PAUSE_TX) in cxgbe_media_status()
3809 ifmr->ifm_active |= IFM_ETH_TXPAUSE; in cxgbe_media_status()
3810 ifmr->ifm_active |= port_mword(pi, speed_to_fwcap(lc->speed)); in cxgbe_media_status()
3821 device_set_descf(dev, "port %d vi %td", vi->pi->port_id, in vcxgbe_probe()
3822 vi - vi->pi->vi); in vcxgbe_probe()
3835 index = vi - pi->vi; in alloc_extra_vi()
3839 device_get_nameunit(vi->dev))); in alloc_extra_vi()
3841 rc = t4_alloc_vi_func(sc, sc->mbox, pi->hw_port, sc->pf, 0, 1, in alloc_extra_vi()
3842 vi->hw_addr, &vi->rss_size, &vi->vfvld, &vi->vin, func, 0); in alloc_extra_vi()
3845 "for port %d: %d\n", index, pi->port_id, -rc); in alloc_extra_vi()
3846 return (-rc); in alloc_extra_vi()
3848 vi->viid = rc; in alloc_extra_vi()
3850 if (vi->rss_size == 1) { in alloc_extra_vi()
3857 device_printf(vi->dev, "RSS table not available.\n"); in alloc_extra_vi()
3858 vi->rss_base = 0xffff; in alloc_extra_vi()
3865 V_FW_PARAMS_PARAM_YZ(vi->viid); in alloc_extra_vi()
3866 rc = t4_query_params(sc, sc->mbox, sc->pf, 0, 1, ¶m, &val); in alloc_extra_vi()
3868 vi->rss_base = 0xffff; in alloc_extra_vi()
3870 MPASS((val >> 16) == vi->rss_size); in alloc_extra_vi()
3871 vi->rss_base = val & 0xffff; in alloc_extra_vi()
3886 pi = vi->pi; in vcxgbe_attach()
3887 sc = pi->adapter; in vcxgbe_attach()
3909 sc = vi->adapter; in vcxgbe_detach()
3913 t4_free_vi(sc, sc->mbox, sc->pf, 0, vi->viid); in vcxgbe_detach()
3927 panic("%s: panic on fatal error", device_get_nameunit(sc->dev)); in delayed_panic()
3936 if (atomic_testandclear_int(&sc->error_flags, ilog2(ADAP_CIM_ERR))) { in fatal_error_task()
3962 if (atomic_testandset_int(&sc->error_flags, ilog2(ADAP_FATAL_ERR))) in t4_fatal_err()
3973 t4_slow_intr_handler(sc, sc->intr_flags); in t4_fatal_err()
3974 atomic_set_int(&sc->error_flags, ADAP_CIM_ERR); in t4_fatal_err()
3978 device_get_nameunit(sc->dev), fw_error); in t4_fatal_err()
3979 taskqueue_enqueue(reset_tq, &sc->fatal_error_task); in t4_fatal_err()
3993 sc->regs_rid = PCIR_BAR(0); in t4_map_bars_0_and_4()
3994 sc->regs_res = bus_alloc_resource_any(sc->dev, SYS_RES_MEMORY, in t4_map_bars_0_and_4()
3995 &sc->regs_rid, RF_ACTIVE); in t4_map_bars_0_and_4()
3996 if (sc->regs_res == NULL) { in t4_map_bars_0_and_4()
3997 device_printf(sc->dev, "cannot map registers.\n"); in t4_map_bars_0_and_4()
4000 sc->bt = rman_get_bustag(sc->regs_res); in t4_map_bars_0_and_4()
4001 sc->bh = rman_get_bushandle(sc->regs_res); in t4_map_bars_0_and_4()
4002 sc->mmio_len = rman_get_size(sc->regs_res); in t4_map_bars_0_and_4()
4003 setbit(&sc->doorbells, DOORBELL_KDB); in t4_map_bars_0_and_4()
4005 sc->msix_rid = PCIR_BAR(4); in t4_map_bars_0_and_4()
4006 sc->msix_res = bus_alloc_resource_any(sc->dev, SYS_RES_MEMORY, in t4_map_bars_0_and_4()
4007 &sc->msix_rid, RF_ACTIVE); in t4_map_bars_0_and_4()
4008 if (sc->msix_res == NULL) { in t4_map_bars_0_and_4()
4009 device_printf(sc->dev, "cannot map MSI-X BAR.\n"); in t4_map_bars_0_and_4()
4024 if (is_t4(sc) && sc->rdmacaps == 0) in t4_map_bar_2()
4027 sc->udbs_rid = PCIR_BAR(2); in t4_map_bar_2()
4028 sc->udbs_res = bus_alloc_resource_any(sc->dev, SYS_RES_MEMORY, in t4_map_bar_2()
4029 &sc->udbs_rid, RF_ACTIVE); in t4_map_bar_2()
4030 if (sc->udbs_res == NULL) { in t4_map_bar_2()
4031 device_printf(sc->dev, "cannot map doorbell BAR.\n"); in t4_map_bar_2()
4034 sc->udbs_base = rman_get_virtual(sc->udbs_res); in t4_map_bar_2()
4037 setbit(&sc->doorbells, DOORBELL_UDB); in t4_map_bar_2()
4051 rc = pmap_change_attr((vm_offset_t)sc->udbs_base, in t4_map_bar_2()
4052 rman_get_size(sc->udbs_res), PAT_WRITE_COMBINING); in t4_map_bar_2()
4054 clrbit(&sc->doorbells, DOORBELL_UDB); in t4_map_bar_2()
4055 setbit(&sc->doorbells, DOORBELL_WCWR); in t4_map_bar_2()
4056 setbit(&sc->doorbells, DOORBELL_UDBWC); in t4_map_bar_2()
4058 device_printf(sc->dev, in t4_map_bar_2()
4069 sc->iwt.wc_en = isset(&sc->doorbells, DOORBELL_UDBWC) ? 1 : 0; in t4_map_bar_2()
4077 if ((sc->doorbells & t4_doorbells_allowed) != 0) { in t4_adj_doorbells()
4078 sc->doorbells &= t4_doorbells_allowed; in t4_adj_doorbells()
4082 sc->doorbells, t4_doorbells_allowed); in t4_adj_doorbells()
4130 for (i = 0, mw = &sc->memwin[0]; i < NUM_MEMWIN; i++, mw_init++, mw++) { in setup_memwin()
4131 if (!rw_initialized(&mw->mw_lock)) { in setup_memwin()
4132 rw_init(&mw->mw_lock, "memory window access"); in setup_memwin()
4133 mw->mw_base = mw_init->base; in setup_memwin()
4134 mw->mw_aperture = mw_init->aperture; in setup_memwin()
4135 mw->mw_curpos = 0; in setup_memwin()
4140 t4_write_reg(sc, reg, (mw->mw_base + bar0) | V_BIR(0) | in setup_memwin()
4141 V_WINDOW(ilog2(mw->mw_aperture) - 10)); in setup_memwin()
4142 rw_wlock(&mw->mw_lock); in setup_memwin()
4143 position_memwin(sc, i, mw->mw_curpos); in setup_memwin()
4144 rw_wunlock(&mw->mw_lock); in setup_memwin()
4154 * address prior to the requested address. mw->mw_curpos always has the actual
4164 mw = &sc->memwin[idx]; in position_memwin()
4165 rw_assert(&mw->mw_lock, RA_WLOCKED); in position_memwin()
4169 mw->mw_curpos = addr & ~0xf; /* start must be 16B aligned */ in position_memwin()
4171 pf = V_PFNUM(sc->pf); in position_memwin()
4172 mw->mw_curpos = addr & ~0x7f; /* start must be 128B aligned */ in position_memwin()
4176 val = (mw->mw_curpos >> X_T7_MEMOFST_SHIFT) | pf; in position_memwin()
4179 val = mw->mw_curpos | pf; in position_memwin()
4198 mw = &sc->memwin[idx]; in rw_via_memwin()
4200 rw_rlock(&mw->mw_lock); in rw_via_memwin()
4201 mw_end = mw->mw_curpos + mw->mw_aperture; in rw_via_memwin()
4202 if (addr >= mw_end || addr < mw->mw_curpos) { in rw_via_memwin()
4204 if (!rw_try_upgrade(&mw->mw_lock)) { in rw_via_memwin()
4205 rw_runlock(&mw->mw_lock); in rw_via_memwin()
4206 rw_wlock(&mw->mw_lock); in rw_via_memwin()
4208 rw_assert(&mw->mw_lock, RA_WLOCKED); in rw_via_memwin()
4210 rw_downgrade(&mw->mw_lock); in rw_via_memwin()
4211 mw_end = mw->mw_curpos + mw->mw_aperture; in rw_via_memwin()
4213 rw_assert(&mw->mw_lock, RA_RLOCKED); in rw_via_memwin()
4216 v = t4_read_reg(sc, mw->mw_base + addr - in rw_via_memwin()
4217 mw->mw_curpos); in rw_via_memwin()
4221 t4_write_reg(sc, mw->mw_base + addr - in rw_via_memwin()
4222 mw->mw_curpos, htole32(v)); in rw_via_memwin()
4225 len -= 4; in rw_via_memwin()
4227 rw_runlock(&mw->mw_lock); in rw_via_memwin()
4242 t = &sc->tids; in t4_init_atid_table()
4243 if (t->natids == 0) in t4_init_atid_table()
4246 MPASS(t->atid_tab == NULL); in t4_init_atid_table()
4248 t->atid_tab = malloc(t->natids * sizeof(*t->atid_tab), M_CXGBE, in t4_init_atid_table()
4250 mtx_init(&t->atid_lock, "atid lock", NULL, MTX_DEF); in t4_init_atid_table()
4251 t->afree = t->atid_tab; in t4_init_atid_table()
4252 t->atids_in_use = 0; in t4_init_atid_table()
4253 t->atid_alloc_stopped = false; in t4_init_atid_table()
4254 for (i = 1; i < t->natids; i++) in t4_init_atid_table()
4255 t->atid_tab[i - 1].next = &t->atid_tab[i]; in t4_init_atid_table()
4256 t->atid_tab[t->natids - 1].next = NULL; in t4_init_atid_table()
4264 t = &sc->tids; in t4_free_atid_table()
4266 KASSERT(t->atids_in_use == 0, in t4_free_atid_table()
4267 ("%s: %d atids still in use.", __func__, t->atids_in_use)); in t4_free_atid_table()
4269 if (mtx_initialized(&t->atid_lock)) in t4_free_atid_table()
4270 mtx_destroy(&t->atid_lock); in t4_free_atid_table()
4271 free(t->atid_tab, M_CXGBE); in t4_free_atid_table()
4272 t->atid_tab = NULL; in t4_free_atid_table()
4278 struct tid_info *t = &sc->tids; in stop_atid_allocator()
4280 if (t->natids == 0) in stop_atid_allocator()
4282 mtx_lock(&t->atid_lock); in stop_atid_allocator()
4283 t->atid_alloc_stopped = true; in stop_atid_allocator()
4284 mtx_unlock(&t->atid_lock); in stop_atid_allocator()
4290 struct tid_info *t = &sc->tids; in restart_atid_allocator()
4292 if (t->natids == 0) in restart_atid_allocator()
4294 mtx_lock(&t->atid_lock); in restart_atid_allocator()
4295 KASSERT(t->atids_in_use == 0, in restart_atid_allocator()
4296 ("%s: %d atids still in use.", __func__, t->atids_in_use)); in restart_atid_allocator()
4297 t->atid_alloc_stopped = false; in restart_atid_allocator()
4298 mtx_unlock(&t->atid_lock); in restart_atid_allocator()
4304 struct tid_info *t = &sc->tids; in alloc_atid()
4305 int atid = -1; in alloc_atid()
4307 mtx_lock(&t->atid_lock); in alloc_atid()
4308 if (t->afree && !t->atid_alloc_stopped) { in alloc_atid()
4309 union aopen_entry *p = t->afree; in alloc_atid()
4311 atid = p - t->atid_tab; in alloc_atid()
4313 t->afree = p->next; in alloc_atid()
4314 p->data = ctx; in alloc_atid()
4315 t->atids_in_use++; in alloc_atid()
4317 mtx_unlock(&t->atid_lock); in alloc_atid()
4324 struct tid_info *t = &sc->tids; in lookup_atid()
4326 return (t->atid_tab[atid].data); in lookup_atid()
4332 struct tid_info *t = &sc->tids; in free_atid()
4333 union aopen_entry *p = &t->atid_tab[atid]; in free_atid()
4335 mtx_lock(&t->atid_lock); in free_atid()
4336 p->next = t->afree; in free_atid()
4337 t->afree = p; in free_atid()
4338 t->atids_in_use--; in free_atid()
4339 mtx_unlock(&t->atid_lock); in free_atid()
4370 return ((const struct t4_range *)a)->start - in t4_range_cmp()
4371 ((const struct t4_range *)b)->start; in t4_range_cmp()
4397 r->size = G_EDRAM0_SIZE(addr_len) << 20; in validate_mem_range()
4398 if (r->size > 0) { in validate_mem_range()
4399 r->start = G_EDRAM0_BASE(addr_len) << 20; in validate_mem_range()
4400 if (addr >= r->start && in validate_mem_range()
4401 addr + len <= r->start + r->size) in validate_mem_range()
4409 r->size = G_EDRAM1_SIZE(addr_len) << 20; in validate_mem_range()
4410 if (r->size > 0) { in validate_mem_range()
4411 r->start = G_EDRAM1_BASE(addr_len) << 20; in validate_mem_range()
4412 if (addr >= r->start && in validate_mem_range()
4413 addr + len <= r->start + r->size) in validate_mem_range()
4421 r->size = G_EXT_MEM_SIZE(addr_len) << 20; in validate_mem_range()
4422 if (r->size > 0) { in validate_mem_range()
4423 r->start = G_EXT_MEM_BASE(addr_len) << 20; in validate_mem_range()
4424 if (addr >= r->start && in validate_mem_range()
4425 addr + len <= r->start + r->size) in validate_mem_range()
4433 r->size = G_EXT_MEM1_SIZE(addr_len) << 20; in validate_mem_range()
4434 if (r->size > 0) { in validate_mem_range()
4435 r->start = G_EXT_MEM1_BASE(addr_len) << 20; in validate_mem_range()
4436 if (addr >= r->start && in validate_mem_range()
4437 addr + len <= r->start + r->size) in validate_mem_range()
4449 /* Start from index 0 and examine the next n - 1 entries. */ in validate_mem_range()
4451 for (remaining = n - 1; remaining > 0; remaining--, r++) { in validate_mem_range()
4453 MPASS(r->size > 0); /* r is a valid entry. */ in validate_mem_range()
4455 MPASS(next->size > 0); /* and so is the next one. */ in validate_mem_range()
4457 while (r->start + r->size >= next->start) { in validate_mem_range()
4459 r->size = max(r->start + r->size, in validate_mem_range()
4460 next->start + next->size) - r->start; in validate_mem_range()
4461 n--; /* One fewer entry in total. */ in validate_mem_range()
4462 if (--remaining == 0) in validate_mem_range()
4472 MPASS(next->size > 0); /* must be valid */ in validate_mem_range()
4476 * This so that the foo->size assertion in the in validate_mem_range()
4482 bzero(&mem_ranges[n], (nitems(mem_ranges) - n) * in validate_mem_range()
4492 if (addr >= r->start && in validate_mem_range()
4493 addr + len <= r->start + r->size) in validate_mem_range()
4571 struct devlog_params *dparams = &sc->params.devlog; in fixup_devlog_params()
4574 rc = validate_mt_off_len(sc, dparams->memtype, dparams->start, in fixup_devlog_params()
4575 dparams->size, &dparams->addr); in fixup_devlog_params()
4584 iaq->nirq = T4_EXTRA_INTR; in update_nirq()
4585 iaq->nirq += nports * max(iaq->nrxq, iaq->nnmrxq); in update_nirq()
4586 iaq->nirq += nports * iaq->nofldrxq; in update_nirq()
4587 iaq->nirq += nports * (iaq->num_vis - 1) * in update_nirq()
4588 max(iaq->nrxq_vi, iaq->nnmrxq_vi); in update_nirq()
4589 iaq->nirq += nports * (iaq->num_vis - 1) * iaq->nofldrxq_vi; in update_nirq()
4600 const int nports = sc->params.nports; in calculate_iaq()
4606 iaq->intr_type = itype; in calculate_iaq()
4607 iaq->num_vis = t4_num_vis; in calculate_iaq()
4608 iaq->ntxq = t4_ntxq; in calculate_iaq()
4609 iaq->ntxq_vi = t4_ntxq_vi; in calculate_iaq()
4610 iaq->nrxq = t4_nrxq; in calculate_iaq()
4611 iaq->nrxq_vi = t4_nrxq_vi; in calculate_iaq()
4614 if (sc->params.tid_qid_sel_mask == 0) { in calculate_iaq()
4615 iaq->nofldtxq = t4_nofldtxq; in calculate_iaq()
4616 iaq->nofldtxq_vi = t4_nofldtxq_vi; in calculate_iaq()
4618 iaq->nofldtxq = roundup(t4_nofldtxq, sc->params.ncores); in calculate_iaq()
4619 iaq->nofldtxq_vi = roundup(t4_nofldtxq_vi, in calculate_iaq()
4620 sc->params.ncores); in calculate_iaq()
4621 if (iaq->nofldtxq != t4_nofldtxq) in calculate_iaq()
4622 device_printf(sc->dev, in calculate_iaq()
4623 "nofldtxq updated (%d -> %d) for correct" in calculate_iaq()
4625 t4_nofldtxq, iaq->nofldtxq, in calculate_iaq()
4626 sc->params.ncores); in calculate_iaq()
4627 if (iaq->num_vis > 1 && in calculate_iaq()
4628 iaq->nofldtxq_vi != t4_nofldtxq_vi) in calculate_iaq()
4629 device_printf(sc->dev, in calculate_iaq()
4630 "nofldtxq_vi updated (%d -> %d) for correct" in calculate_iaq()
4632 t4_nofldtxq_vi, iaq->nofldtxq_vi, in calculate_iaq()
4633 sc->params.ncores); in calculate_iaq()
4639 iaq->nofldrxq = t4_nofldrxq; in calculate_iaq()
4640 iaq->nofldrxq_vi = t4_nofldrxq_vi; in calculate_iaq()
4645 iaq->nnmtxq = t4_nnmtxq; in calculate_iaq()
4646 iaq->nnmrxq = t4_nnmrxq; in calculate_iaq()
4649 iaq->nnmtxq_vi = t4_nnmtxq_vi; in calculate_iaq()
4650 iaq->nnmrxq_vi = t4_nnmrxq_vi; in calculate_iaq()
4655 if (iaq->nirq <= navail && in calculate_iaq()
4656 (itype != INTR_MSI || powerof2(iaq->nirq))) { in calculate_iaq()
4658 * This is the normal case -- there are enough interrupts for in calculate_iaq()
4668 while (iaq->num_vis > 1) { in calculate_iaq()
4669 iaq->num_vis--; in calculate_iaq()
4671 if (iaq->nirq <= navail && in calculate_iaq()
4672 (itype != INTR_MSI || powerof2(iaq->nirq))) { in calculate_iaq()
4673 device_printf(sc->dev, "virtual interfaces per port " in calculate_iaq()
4677 iaq->num_vis, t4_num_vis, iaq->nrxq, iaq->nofldrxq, in calculate_iaq()
4678 iaq->nrxq_vi, iaq->nofldrxq_vi, iaq->nnmrxq_vi, in calculate_iaq()
4679 itype, navail, iaq->nirq); in calculate_iaq()
4687 MPASS(iaq->num_vis == 1); in calculate_iaq()
4688 iaq->ntxq_vi = iaq->nrxq_vi = 0; in calculate_iaq()
4689 iaq->nofldtxq_vi = iaq->nofldrxq_vi = 0; in calculate_iaq()
4690 iaq->nnmtxq_vi = iaq->nnmrxq_vi = 0; in calculate_iaq()
4691 if (iaq->num_vis != t4_num_vis) { in calculate_iaq()
4692 device_printf(sc->dev, "extra virtual interfaces disabled. " in calculate_iaq()
4695 iaq->nrxq, iaq->nofldrxq, iaq->nrxq_vi, iaq->nofldrxq_vi, in calculate_iaq()
4696 iaq->nnmrxq_vi, itype, navail, iaq->nirq); in calculate_iaq()
4705 if (iaq->nrxq > 1) { in calculate_iaq()
4706 iaq->nrxq = rounddown_pow_of_two(iaq->nrxq - 1); in calculate_iaq()
4707 if (iaq->nnmrxq > iaq->nrxq) in calculate_iaq()
4708 iaq->nnmrxq = iaq->nrxq; in calculate_iaq()
4710 if (iaq->nofldrxq > 1) in calculate_iaq()
4711 iaq->nofldrxq >>= 1; in calculate_iaq()
4713 old_nirq = iaq->nirq; in calculate_iaq()
4715 if (iaq->nirq <= navail && in calculate_iaq()
4716 (itype != INTR_MSI || powerof2(iaq->nirq))) { in calculate_iaq()
4717 device_printf(sc->dev, "running with reduced number of " in calculate_iaq()
4720 "itype %d, navail %u, nirq %d.\n", iaq->nrxq, in calculate_iaq()
4721 iaq->nofldrxq, itype, navail, iaq->nirq); in calculate_iaq()
4724 } while (old_nirq != iaq->nirq); in calculate_iaq()
4727 device_printf(sc->dev, "running with minimal number of queues. " in calculate_iaq()
4729 iaq->nirq = 1; in calculate_iaq()
4730 iaq->nrxq = 1; in calculate_iaq()
4731 iaq->ntxq = 1; in calculate_iaq()
4732 if (iaq->nofldrxq > 0) { in calculate_iaq()
4733 iaq->nofldrxq = 1; in calculate_iaq()
4734 iaq->nofldtxq = 1; in calculate_iaq()
4735 if (sc->params.tid_qid_sel_mask == 0) in calculate_iaq()
4736 iaq->nofldtxq = 1; in calculate_iaq()
4738 iaq->nofldtxq = sc->params.ncores; in calculate_iaq()
4740 iaq->nnmtxq = 0; in calculate_iaq()
4741 iaq->nnmrxq = 0; in calculate_iaq()
4743 MPASS(iaq->num_vis > 0); in calculate_iaq()
4744 if (iaq->num_vis > 1) { in calculate_iaq()
4745 MPASS(iaq->nrxq_vi > 0); in calculate_iaq()
4746 MPASS(iaq->ntxq_vi > 0); in calculate_iaq()
4748 MPASS(iaq->nirq > 0); in calculate_iaq()
4749 MPASS(iaq->nrxq > 0); in calculate_iaq()
4750 MPASS(iaq->ntxq > 0); in calculate_iaq()
4752 MPASS(powerof2(iaq->nirq)); in calculate_iaq()
4753 if (sc->params.tid_qid_sel_mask != 0) in calculate_iaq()
4754 MPASS(iaq->nofldtxq % sc->params.ncores == 0); in calculate_iaq()
4768 navail = pci_msix_count(sc->dev); in cfg_itype_and_nqueues()
4770 navail = pci_msi_count(sc->dev); in cfg_itype_and_nqueues()
4778 nalloc = iaq->nirq; in cfg_itype_and_nqueues()
4781 rc = pci_alloc_msix(sc->dev, &nalloc); in cfg_itype_and_nqueues()
4783 rc = pci_alloc_msi(sc->dev, &nalloc); in cfg_itype_and_nqueues()
4786 if (nalloc == iaq->nirq) in cfg_itype_and_nqueues()
4793 device_printf(sc->dev, "fewer vectors than requested, " in cfg_itype_and_nqueues()
4795 itype, iaq->nirq, nalloc); in cfg_itype_and_nqueues()
4796 pci_release_msi(sc->dev); in cfg_itype_and_nqueues()
4801 device_printf(sc->dev, in cfg_itype_and_nqueues()
4803 itype, rc, iaq->nirq, nalloc); in cfg_itype_and_nqueues()
4806 device_printf(sc->dev, in cfg_itype_and_nqueues()
4808 "allowed=%d, msi-x=%d, msi=%d, intx=1", t4_intr_types, in cfg_itype_and_nqueues()
4809 pci_msix_count(sc->dev), pci_msi_count(sc->dev)); in cfg_itype_and_nqueues()
4936 if (hdr1->chip == hdr2->chip && hdr1->fw_ver == hdr2->fw_ver) in fw_compatible()
4943 #define SAME_INTF(x) (hdr1->intfver_##x == hdr2->intfver_##x) in fw_compatible()
4944 if (hdr1->chip == hdr2->chip && SAME_INTF(nic) && SAME_INTF(vnic) && in fw_compatible()
4965 device_printf(sc->dev, in load_fw_module()
4971 *dcfg = firmware_get(fw_info->kld_name); in load_fw_module()
4974 *fw = firmware_get(fw_info->fw_mod_name); in load_fw_module()
5003 const uint32_t c = be32toh(card_fw->fw_ver); in install_kld_firmware()
5011 fw_install = t4_fw_install < 0 ? -t4_fw_install : t4_fw_install; in install_kld_firmware()
5017 device_printf(sc->dev, in install_kld_firmware()
5019 " will use compiled-in firmware version for" in install_kld_firmware()
5023 memcpy(&bundled_fw, fw->data, sizeof(bundled_fw)); in install_kld_firmware()
5032 if ((sc->flags & FW_OK) == 0) { in install_kld_firmware()
5068 device_printf(sc->dev, "firmware on card (%u.%u.%u.%u) is %s, " in install_kld_firmware()
5084 device_printf(sc->dev, in install_kld_firmware()
5091 device_printf(sc->dev, "firmware on card (%u.%u.%u.%u) is %s, " in install_kld_firmware()
5096 rc = sc->flags & FW_OK ? 0 : ENOENT; in install_kld_firmware()
5099 k = be32toh(((const struct fw_hdr *)fw->data)->fw_ver); in install_kld_firmware()
5102 device_printf(sc->dev, in install_kld_firmware()
5109 rc = sc->flags & FW_OK ? 0 : EINVAL; in install_kld_firmware()
5113 device_printf(sc->dev, "firmware on card (%u.%u.%u.%u) is %s, " in install_kld_firmware()
5120 rc = -t4_fw_upgrade(sc, sc->mbox, fw->data, fw->datasize, 0); in install_kld_firmware()
5122 device_printf(sc->dev, "failed to install firmware: %d\n", rc); in install_kld_firmware()
5126 memcpy(card_fw, fw->data, sizeof(*card_fw)); in install_kld_firmware()
5151 device_printf(sc->dev, in contact_firmware()
5156 drv_fw = &fw_info->fw_h; in contact_firmware()
5161 rc = -t4_get_fw_hdr(sc, card_fw); in contact_firmware()
5163 device_printf(sc->dev, in contact_firmware()
5176 rc = t4_fw_hello(sc, sc->mbox, sc->mbox, MASTER_MAY, &state); in contact_firmware()
5178 rc = -rc; in contact_firmware()
5179 device_printf(sc->dev, in contact_firmware()
5189 MPASS(be32toh(card_fw->flags) & FW_HDR_FLAGS_RESET_HALT); in contact_firmware()
5190 sc->flags |= FW_OK; /* The firmware responded to the FW_HELLO. */ in contact_firmware()
5192 if (rc == sc->pf) { in contact_firmware()
5193 sc->flags |= MASTER_PF; in contact_firmware()
5206 device_printf(sc->dev, "couldn't be master(%d), " in contact_firmware()
5216 device_printf(sc->dev, "PF%d is master, device state %d. " in contact_firmware()
5218 snprintf(sc->cfg_file, sizeof(sc->cfg_file), "pf%d", rc); in contact_firmware()
5219 sc->cfcsum = 0; in contact_firmware()
5223 if (rc != 0 && sc->flags & FW_OK) { in contact_firmware()
5224 t4_fw_bye(sc, sc->mbox); in contact_firmware()
5225 sc->flags &= ~FW_OK; in contact_firmware()
5245 if (pci_get_device(sc->dev) == 0x440a) in copy_cfg_file_to_card()
5253 device_printf(sc->dev, in copy_cfg_file_to_card()
5254 "KLD with default config is not available.\n"); in copy_cfg_file_to_card()
5258 cfdata = dcfg->data; in copy_cfg_file_to_card()
5259 cflen = dcfg->datasize & ~3; in copy_cfg_file_to_card()
5265 device_printf(sc->dev, in copy_cfg_file_to_card()
5271 snprintf(s, sizeof(s), "%s_%s", fw_info->kld_name, cfg_file); in copy_cfg_file_to_card()
5275 device_printf(sc->dev, in copy_cfg_file_to_card()
5281 cfdata = rcfg->data; in copy_cfg_file_to_card()
5282 cflen = rcfg->datasize & ~3; in copy_cfg_file_to_card()
5286 device_printf(sc->dev, in copy_cfg_file_to_card()
5287 "config file too long (%d, max allowed is %d).\n", in copy_cfg_file_to_card()
5295 device_printf(sc->dev, in copy_cfg_file_to_card()
5344 rc = -t4_fw_reset(sc, sc->mbox, F_PIORSTMODE | F_PIORST); in apply_cfg_and_initialize()
5346 device_printf(sc->dev, "firmware reset failed: %d.\n", rc); in apply_cfg_and_initialize()
5366 * Ask the firmware where it wants us to upload the config file. in apply_cfg_and_initialize()
5369 rc = -t4_query_params(sc, sc->mbox, sc->pf, 0, 1, ¶m, &val); in apply_cfg_and_initialize()
5371 /* No support for config file? Shouldn't happen. */ in apply_cfg_and_initialize()
5372 device_printf(sc->dev, in apply_cfg_and_initialize()
5373 "failed to query config file location: %d.\n", rc); in apply_cfg_and_initialize()
5385 device_printf(sc->dev, in apply_cfg_and_initialize()
5386 "failed to upload config file to card: %d.\n", rc); in apply_cfg_and_initialize()
5390 rc = -t4_wr_mbox(sc, sc->mbox, &caps, sizeof(caps), &caps); in apply_cfg_and_initialize()
5392 device_printf(sc->dev, "failed to pre-process config file: %d " in apply_cfg_and_initialize()
5400 device_printf(sc->dev, in apply_cfg_and_initialize()
5401 "WARNING: config file checksum mismatch: %08x %08x\n", in apply_cfg_and_initialize()
5404 sc->cfcsum = cfcsum; in apply_cfg_and_initialize()
5405 snprintf(sc->cfg_file, sizeof(sc->cfg_file), "%s", cfg_file); in apply_cfg_and_initialize()
5412 caps.x##caps &= htobe16(caps_allowed->x##caps); \ in apply_cfg_and_initialize()
5427 * TOE and hashfilters are mutually exclusive. It is a config in apply_cfg_and_initialize()
5429 * to cope with the situation in non-debug builds by disabling in apply_cfg_and_initialize()
5443 rc = -t4_wr_mbox(sc, sc->mbox, &caps, sizeof(caps), NULL); in apply_cfg_and_initialize()
5445 device_printf(sc->dev, in apply_cfg_and_initialize()
5446 "failed to process config file: %d.\n", rc); in apply_cfg_and_initialize()
5454 rc = -t4_fw_initialize(sc, sc->mbox); in apply_cfg_and_initialize()
5456 device_printf(sc->dev, "fw_initialize failed: %d.\n", rc); in apply_cfg_and_initialize()
5475 MPASS(sc->flags & MASTER_PF); in partition_resources()
5491 fallback = sc->debug_flags & DF_DISABLE_CFG_RETRY ? false : true; in partition_resources()
5497 device_printf(sc->dev, in partition_resources()
5523 snprintf(sc->fw_version, sizeof(sc->fw_version), "%u.%u.%u.%u", in get_params__pre_init()
5524 G_FW_HDR_FW_VER_MAJOR(sc->params.fw_vers), in get_params__pre_init()
5525 G_FW_HDR_FW_VER_MINOR(sc->params.fw_vers), in get_params__pre_init()
5526 G_FW_HDR_FW_VER_MICRO(sc->params.fw_vers), in get_params__pre_init()
5527 G_FW_HDR_FW_VER_BUILD(sc->params.fw_vers)); in get_params__pre_init()
5529 snprintf(sc->bs_version, sizeof(sc->bs_version), "%u.%u.%u.%u", in get_params__pre_init()
5530 G_FW_HDR_FW_VER_MAJOR(sc->params.bs_vers), in get_params__pre_init()
5531 G_FW_HDR_FW_VER_MINOR(sc->params.bs_vers), in get_params__pre_init()
5532 G_FW_HDR_FW_VER_MICRO(sc->params.bs_vers), in get_params__pre_init()
5533 G_FW_HDR_FW_VER_BUILD(sc->params.bs_vers)); in get_params__pre_init()
5535 snprintf(sc->tp_version, sizeof(sc->tp_version), "%u.%u.%u.%u", in get_params__pre_init()
5536 G_FW_HDR_FW_VER_MAJOR(sc->params.tp_vers), in get_params__pre_init()
5537 G_FW_HDR_FW_VER_MINOR(sc->params.tp_vers), in get_params__pre_init()
5538 G_FW_HDR_FW_VER_MICRO(sc->params.tp_vers), in get_params__pre_init()
5539 G_FW_HDR_FW_VER_BUILD(sc->params.tp_vers)); in get_params__pre_init()
5541 snprintf(sc->er_version, sizeof(sc->er_version), "%u.%u.%u.%u", in get_params__pre_init()
5542 G_FW_HDR_FW_VER_MAJOR(sc->params.er_vers), in get_params__pre_init()
5543 G_FW_HDR_FW_VER_MINOR(sc->params.er_vers), in get_params__pre_init()
5544 G_FW_HDR_FW_VER_MICRO(sc->params.er_vers), in get_params__pre_init()
5545 G_FW_HDR_FW_VER_BUILD(sc->params.er_vers)); in get_params__pre_init()
5549 rc = -t4_query_params(sc, sc->mbox, sc->pf, 0, 2, param, val); in get_params__pre_init()
5551 device_printf(sc->dev, in get_params__pre_init()
5556 sc->params.portvec = val[0]; in get_params__pre_init()
5557 sc->params.nports = bitcount32(val[0]); in get_params__pre_init()
5558 sc->params.vpd.cclk = val[1]; in get_params__pre_init()
5561 rc = -t4_init_devlog_ncores_params(sc, 1); in get_params__pre_init()
5565 device_printf(sc->dev, in get_params__pre_init()
5585 rc = -t4_set_params(sc, sc->mbox, sc->pf, 0, 1, ¶m, &val); in set_params__pre_init()
5588 sc->params.fw_vers < FW_VERSION32(1, 20, 1, 0)) { in set_params__pre_init()
5592 device_printf(sc->dev, in set_params__pre_init()
5598 rc = -t4_query_params(sc, sc->mbox, sc->pf, 0, 1, ¶m, &val); in set_params__pre_init()
5600 rc = -t4_set_params(sc, sc->mbox, sc->pf, 0, 1, ¶m, in set_params__pre_init()
5603 device_printf(sc->dev, in set_params__pre_init()
5612 rc = -t4_set_params(sc, sc->mbox, sc->pf, 0, 1, ¶m, &val); in set_params__pre_init()
5614 sc->params.viid_smt_extn_support = true; in set_params__pre_init()
5616 sc->params.viid_smt_extn_support = false; in set_params__pre_init()
5641 rc = -t4_query_params(sc, sc->mbox, sc->pf, 0, 7, param, val); in get_params__post_init()
5643 device_printf(sc->dev, in get_params__post_init()
5648 sc->sge.iq_start = val[0]; in get_params__post_init()
5649 sc->sge.eq_start = val[1]; in get_params__post_init()
5651 sc->tids.ftid_base = val[2]; in get_params__post_init()
5652 sc->tids.ftid_end = val[3]; in get_params__post_init()
5653 sc->tids.nftids = val[3] - val[2] + 1; in get_params__post_init()
5655 sc->vres.l2t.start = val[4]; in get_params__post_init()
5656 sc->vres.l2t.size = val[5] - val[4] + 1; in get_params__post_init()
5658 if (sc->vres.l2t.size > 0) in get_params__post_init()
5660 sc->params.core_vdd = val[6]; in get_params__post_init()
5664 rc = -t4_query_params(sc, sc->mbox, sc->pf, 0, 2, param, val); in get_params__post_init()
5666 device_printf(sc->dev, in get_params__post_init()
5670 MPASS((int)val[0] >= sc->sge.iq_start); in get_params__post_init()
5671 sc->sge.iqmap_sz = val[0] - sc->sge.iq_start + 1; in get_params__post_init()
5672 MPASS((int)val[1] >= sc->sge.eq_start); in get_params__post_init()
5673 sc->sge.eqmap_sz = val[1] - sc->sge.eq_start + 1; in get_params__post_init()
5677 sc->tids.tid_base = t4_read_reg(sc, in get_params__post_init()
5682 rc = -t4_query_params(sc, sc->mbox, sc->pf, 0, 2, param, val); in get_params__post_init()
5684 device_printf(sc->dev, in get_params__post_init()
5689 sc->tids.hpftid_base = val[0]; in get_params__post_init()
5690 sc->tids.hpftid_end = val[1]; in get_params__post_init()
5691 sc->tids.nhpftids = val[1] - val[0] + 1; in get_params__post_init()
5697 MPASS(sc->tids.hpftid_base == 0); in get_params__post_init()
5698 MPASS(sc->tids.tid_base == sc->tids.nhpftids); in get_params__post_init()
5703 rc = -t4_query_params(sc, sc->mbox, sc->pf, 0, 2, param, val); in get_params__post_init()
5705 device_printf(sc->dev, in get_params__post_init()
5710 sc->rawf_base = val[0]; in get_params__post_init()
5711 sc->nrawf = val[1] - val[0] + 1; in get_params__post_init()
5715 if (sc->params.ncores > 1) { in get_params__post_init()
5719 rc = -t4_query_params(sc, sc->mbox, sc->pf, 0, 1, param, val); in get_params__post_init()
5720 sc->params.tid_qid_sel_mask = rc == 0 ? val[0] : 0; in get_params__post_init()
5734 rc = -t4_query_params(sc, sc->mbox, sc->pf, 0, 1, param, val); in get_params__post_init()
5736 sc->params.mps_bg_map = val[0]; in get_params__post_init()
5738 sc->params.mps_bg_map = UINT32_MAX; /* Not a legal value. */ in get_params__post_init()
5742 rc = -t4_query_params(sc, sc->mbox, sc->pf, 0, 1, param, val); in get_params__post_init()
5744 sc->params.tp_ch_map = val[0]; in get_params__post_init()
5746 sc->params.tp_ch_map = UINT32_MAX; /* Not a legal value. */ in get_params__post_init()
5750 rc = -t4_query_params(sc, sc->mbox, sc->pf, 0, 1, param, val); in get_params__post_init()
5752 sc->params.tx_tp_ch_map = val[0]; in get_params__post_init()
5754 sc->params.tx_tp_ch_map = UINT32_MAX; /* Not a legal value. */ in get_params__post_init()
5761 rc = -t4_query_params(sc, sc->mbox, sc->pf, 0, 1, param, val); in get_params__post_init()
5763 sc->params.filter2_wr_support = val[0] != 0; in get_params__post_init()
5765 sc->params.filter2_wr_support = 0; in get_params__post_init()
5772 rc = -t4_query_params(sc, sc->mbox, sc->pf, 0, 1, param, val); in get_params__post_init()
5774 sc->params.ulptx_memwrite_dsgl = val[0] != 0; in get_params__post_init()
5776 sc->params.ulptx_memwrite_dsgl = false; in get_params__post_init()
5780 rc = -t4_query_params(sc, sc->mbox, sc->pf, 0, 1, param, val); in get_params__post_init()
5782 sc->params.fr_nsmr_tpte_wr_support = val[0] != 0; in get_params__post_init()
5784 sc->params.fr_nsmr_tpte_wr_support = false; in get_params__post_init()
5788 rc = -t4_query_params(sc, sc->mbox, sc->pf, 0, 1, param, val); in get_params__post_init()
5790 sc->params.dev_512sgl_mr = val[0] != 0; in get_params__post_init()
5792 sc->params.dev_512sgl_mr = false; in get_params__post_init()
5795 rc = -t4_query_params(sc, sc->mbox, sc->pf, 0, 1, param, val); in get_params__post_init()
5797 sc->params.max_pkts_per_eth_tx_pkts_wr = val[0]; in get_params__post_init()
5799 sc->params.max_pkts_per_eth_tx_pkts_wr = 15; in get_params__post_init()
5802 rc = -t4_query_params(sc, sc->mbox, sc->pf, 0, 1, param, val); in get_params__post_init()
5805 sc->params.nsched_cls = val[0]; in get_params__post_init()
5807 sc->params.nsched_cls = sc->chip_params->nsched_cls; in get_params__post_init()
5814 rc = -t4_wr_mbox(sc, sc->mbox, &caps, sizeof(caps), &caps); in get_params__post_init()
5816 device_printf(sc->dev, in get_params__post_init()
5822 sc->x = htobe16(caps.x); \ in get_params__post_init()
5835 if (sc->niccaps & FW_CAPS_CONFIG_NIC_HASHFILTER) { in get_params__post_init()
5837 MPASS(sc->toecaps == 0); in get_params__post_init()
5838 sc->toecaps = 0; in get_params__post_init()
5841 rc = -t4_query_params(sc, sc->mbox, sc->pf, 0, 1, param, val); in get_params__post_init()
5843 device_printf(sc->dev, in get_params__post_init()
5847 sc->tids.ntids = val[0]; in get_params__post_init()
5848 if (sc->params.fw_vers < FW_VERSION32(1, 20, 5, 0)) { in get_params__post_init()
5849 MPASS(sc->tids.ntids >= sc->tids.nhpftids); in get_params__post_init()
5850 sc->tids.ntids -= sc->tids.nhpftids; in get_params__post_init()
5852 sc->tids.natids = min(sc->tids.ntids / 2, MAX_ATIDS); in get_params__post_init()
5853 sc->params.hash_filter = 1; in get_params__post_init()
5855 if (sc->niccaps & FW_CAPS_CONFIG_NIC_ETHOFLD) { in get_params__post_init()
5859 rc = -t4_query_params(sc, sc->mbox, sc->pf, 0, 3, param, val); in get_params__post_init()
5861 device_printf(sc->dev, in get_params__post_init()
5866 sc->tids.etid_base = val[0]; in get_params__post_init()
5867 sc->tids.etid_end = val[1]; in get_params__post_init()
5868 sc->tids.netids = val[1] - val[0] + 1; in get_params__post_init()
5869 sc->params.eo_wr_cred = val[2]; in get_params__post_init()
5870 sc->params.ethoffload = 1; in get_params__post_init()
5873 if (sc->toecaps) { in get_params__post_init()
5874 /* query offload-related parameters */ in get_params__post_init()
5881 rc = -t4_query_params(sc, sc->mbox, sc->pf, 0, 6, param, val); in get_params__post_init()
5883 device_printf(sc->dev, in get_params__post_init()
5887 sc->tids.ntids = val[0]; in get_params__post_init()
5888 if (sc->params.fw_vers < FW_VERSION32(1, 20, 5, 0)) { in get_params__post_init()
5889 MPASS(sc->tids.ntids >= sc->tids.nhpftids); in get_params__post_init()
5890 sc->tids.ntids -= sc->tids.nhpftids; in get_params__post_init()
5892 sc->tids.natids = min(sc->tids.ntids / 2, MAX_ATIDS); in get_params__post_init()
5894 sc->tids.stid_base = val[1]; in get_params__post_init()
5895 sc->tids.nstids = val[2] - val[1] + 1; in get_params__post_init()
5897 sc->vres.ddp.start = val[3]; in get_params__post_init()
5898 sc->vres.ddp.size = val[4] - val[3] + 1; in get_params__post_init()
5899 sc->params.ofldq_wr_cred = val[5]; in get_params__post_init()
5900 sc->params.offload = 1; in get_params__post_init()
5903 * The firmware attempts memfree TOE configuration for -SO cards in get_params__post_init()
5905 * depends on the config file). It may not report 0 for other in get_params__post_init()
5910 sc->iscsicaps = 0; in get_params__post_init()
5911 sc->nvmecaps = 0; in get_params__post_init()
5912 sc->rdmacaps = 0; in get_params__post_init()
5914 if (sc->nvmecaps || sc->rdmacaps) { in get_params__post_init()
5919 rc = -t4_query_params(sc, sc->mbox, sc->pf, 0, 4, param, val); in get_params__post_init()
5921 device_printf(sc->dev, in get_params__post_init()
5925 sc->vres.stag.start = val[0]; in get_params__post_init()
5926 sc->vres.stag.size = val[1] - val[0] + 1; in get_params__post_init()
5927 sc->vres.pbl.start = val[2]; in get_params__post_init()
5928 sc->vres.pbl.size = val[3] - val[2] + 1; in get_params__post_init()
5930 if (sc->rdmacaps) { in get_params__post_init()
5937 rc = -t4_query_params(sc, sc->mbox, sc->pf, 0, 6, param, val); in get_params__post_init()
5939 device_printf(sc->dev, in get_params__post_init()
5943 sc->vres.rq.start = val[0]; in get_params__post_init()
5944 sc->vres.rq.size = val[1] - val[0] + 1; in get_params__post_init()
5945 sc->vres.qp.start = val[2]; in get_params__post_init()
5946 sc->vres.qp.size = val[3] - val[2] + 1; in get_params__post_init()
5947 sc->vres.cq.start = val[4]; in get_params__post_init()
5948 sc->vres.cq.size = val[5] - val[4] + 1; in get_params__post_init()
5956 rc = -t4_query_params(sc, sc->mbox, sc->pf, 0, 6, param, val); in get_params__post_init()
5958 device_printf(sc->dev, in get_params__post_init()
5962 sc->vres.ocq.start = val[0]; in get_params__post_init()
5963 sc->vres.ocq.size = val[1] - val[0] + 1; in get_params__post_init()
5964 sc->vres.srq.start = val[2]; in get_params__post_init()
5965 sc->vres.srq.size = val[3] - val[2] + 1; in get_params__post_init()
5966 sc->params.max_ordird_qp = val[4]; in get_params__post_init()
5967 sc->params.max_ird_adapter = val[5]; in get_params__post_init()
5969 if (sc->iscsicaps) { in get_params__post_init()
5972 rc = -t4_query_params(sc, sc->mbox, sc->pf, 0, 2, param, val); in get_params__post_init()
5974 device_printf(sc->dev, in get_params__post_init()
5978 sc->vres.iscsi.start = val[0]; in get_params__post_init()
5979 sc->vres.iscsi.size = val[1] - val[0] + 1; in get_params__post_init()
5981 if (sc->cryptocaps & FW_CAPS_CONFIG_TLSKEYS) { in get_params__post_init()
5984 rc = -t4_query_params(sc, sc->mbox, sc->pf, 0, 2, param, val); in get_params__post_init()
5986 device_printf(sc->dev, in get_params__post_init()
5990 sc->vres.key.start = val[0]; in get_params__post_init()
5991 sc->vres.key.size = val[1] - val[0] + 1; in get_params__post_init()
6000 t4_read_mtu_tbl(sc, sc->params.mtus, NULL); in get_params__post_init()
6001 t4_load_mtus(sc, sc->params.mtus, sc->params.a_wnd, sc->params.b_wnd); in get_params__post_init()
6022 callout_schedule_sbt(&sc->ktls_tick, SBT_1MS, 0, C_HARDCLOCK); in ktls_tick()
6034 rc = -t4_set_params(sc, sc->mbox, sc->pf, 0, 1, ¶m, ¶m); in t6_config_kern_tls()
6042 sc->flags |= KERN_TLS_ON; in t6_config_kern_tls()
6043 callout_reset_sbt(&sc->ktls_tick, SBT_1MS, 0, ktls_tick, sc, in t6_config_kern_tls()
6046 sc->flags &= ~KERN_TLS_ON; in t6_config_kern_tls()
6047 callout_stop(&sc->ktls_tick); in t6_config_kern_tls()
6065 (void)t4_set_params(sc, sc->mbox, sc->pf, 0, 1, ¶m, &val); in set_params__post_init()
6070 if (t4_set_params(sc, sc->mbox, sc->pf, 0, 1, ¶m, &val) == 0) in set_params__post_init()
6071 sc->params.port_caps32 = 1; in set_params__post_init()
6074 val = 1 << (G_MASKSIZE(t4_read_reg(sc, A_TP_RSS_CONFIG_TNL)) - 1); in set_params__post_init()
6076 V_MASKFILTER(val - 1)); in set_params__post_init()
6108 * recommended way to change the timers (the firmware config file is) so in set_params__post_init()
6152 if (t4_toe_rexmt_backoff[i] != -1) { in set_params__post_init()
6171 sc->tlst.inline_keys = t4_tls_inline_keys; in set_params__post_init()
6173 sc->tlst.combo_wrs = t4_tls_combo_wrs; in set_params__post_init()
6176 sc->tlst.short_records = t4_tls_short_records; in set_params__post_init()
6177 sc->tlst.partial_ghash = t4_tls_partial_ghash; in set_params__post_init()
6190 struct adapter_params *p = &sc->params; in t4_set_desc()
6192 device_set_descf(sc->dev, "Chelsio %s", p->vpd.id); in t4_set_desc()
6221 ifm = &pi->media; in set_current_media()
6222 if (ifm->ifm_cur != NULL && in set_current_media()
6223 IFM_SUBTYPE(ifm->ifm_cur->ifm_media) == IFM_NONE) in set_current_media()
6226 lc = &pi->link_cfg; in set_current_media()
6227 if (lc->requested_aneg != AUTONEG_DISABLE && in set_current_media()
6228 lc->pcaps & FW_PORT_CAP32_ANEG) { in set_current_media()
6233 if (lc->requested_fc & PAUSE_TX) in set_current_media()
6235 if (lc->requested_fc & PAUSE_RX) in set_current_media()
6237 if (lc->requested_speed == 0) in set_current_media()
6238 speed = port_top_speed(pi) * 1000; /* Gbps -> Mbps */ in set_current_media()
6240 speed = lc->requested_speed; in set_current_media()
6252 return (pi->port_type == FW_PORT_TYPE_BT_SGMII || in fixed_ifmedia()
6253 pi->port_type == FW_PORT_TYPE_BT_XFI || in fixed_ifmedia()
6254 pi->port_type == FW_PORT_TYPE_BT_XAUI || in fixed_ifmedia()
6255 pi->port_type == FW_PORT_TYPE_KX4 || in fixed_ifmedia()
6256 pi->port_type == FW_PORT_TYPE_KX || in fixed_ifmedia()
6257 pi->port_type == FW_PORT_TYPE_KR || in fixed_ifmedia()
6258 pi->port_type == FW_PORT_TYPE_BP_AP || in fixed_ifmedia()
6259 pi->port_type == FW_PORT_TYPE_BP4_AP || in fixed_ifmedia()
6260 pi->port_type == FW_PORT_TYPE_BP40_BA || in fixed_ifmedia()
6261 pi->port_type == FW_PORT_TYPE_KR4_100G || in fixed_ifmedia()
6262 pi->port_type == FW_PORT_TYPE_KR_SFP28 || in fixed_ifmedia()
6263 pi->port_type == FW_PORT_TYPE_KR_XLAUI); in fixed_ifmedia()
6276 if (pi->flags & FIXED_IFMEDIA) in build_medialist()
6282 ifm = &pi->media; in build_medialist()
6284 lc = &pi->link_cfg; in build_medialist()
6285 ss = G_FW_PORT_CAP32_SPEED(lc->pcaps); /* Supported Speeds */ in build_medialist()
6289 MPASS(LIST_EMPTY(&ifm->ifm_list)); in build_medialist()
6311 if (lc->pcaps & FW_PORT_CAP32_ANEG) in build_medialist()
6318 * Initialize the requested fields in the link config based on driver tunables.
6323 struct link_config *lc = &pi->link_cfg; in init_link_config()
6327 lc->requested_caps = 0; in init_link_config()
6328 lc->requested_speed = 0; in init_link_config()
6331 lc->requested_aneg = AUTONEG_DISABLE; in init_link_config()
6333 lc->requested_aneg = AUTONEG_ENABLE; in init_link_config()
6335 lc->requested_aneg = AUTONEG_AUTO; in init_link_config()
6337 lc->requested_fc = t4_pause_settings & (PAUSE_TX | PAUSE_RX | in init_link_config()
6341 lc->requested_fec = FEC_AUTO; in init_link_config()
6343 lc->requested_fec = FEC_NONE; in init_link_config()
6345 /* -1 is handled by the FEC_AUTO block above and not here. */ in init_link_config()
6346 lc->requested_fec = t4_fec & in init_link_config()
6348 if (lc->requested_fec == 0) in init_link_config()
6349 lc->requested_fec = FEC_AUTO; in init_link_config()
6352 lc->force_fec = -1; in init_link_config()
6354 lc->force_fec = 1; in init_link_config()
6356 lc->force_fec = 0; in init_link_config()
6367 struct link_config *lc = &pi->link_cfg; in fixup_link_config()
6373 if (lc->requested_speed != 0) { in fixup_link_config()
6374 fwspeed = speed_to_fwcap(lc->requested_speed); in fixup_link_config()
6375 if ((fwspeed & lc->pcaps) == 0) { in fixup_link_config()
6377 lc->requested_speed = 0; in fixup_link_config()
6382 MPASS(lc->requested_aneg == AUTONEG_ENABLE || in fixup_link_config()
6383 lc->requested_aneg == AUTONEG_DISABLE || in fixup_link_config()
6384 lc->requested_aneg == AUTONEG_AUTO); in fixup_link_config()
6385 if (lc->requested_aneg == AUTONEG_ENABLE && in fixup_link_config()
6386 !(lc->pcaps & FW_PORT_CAP32_ANEG)) { in fixup_link_config()
6388 lc->requested_aneg = AUTONEG_AUTO; in fixup_link_config()
6392 MPASS((lc->requested_fc & ~(PAUSE_TX | PAUSE_RX | PAUSE_AUTONEG)) == 0); in fixup_link_config()
6393 if (lc->requested_fc & PAUSE_TX && in fixup_link_config()
6394 !(lc->pcaps & FW_PORT_CAP32_FC_TX)) { in fixup_link_config()
6396 lc->requested_fc &= ~PAUSE_TX; in fixup_link_config()
6398 if (lc->requested_fc & PAUSE_RX && in fixup_link_config()
6399 !(lc->pcaps & FW_PORT_CAP32_FC_RX)) { in fixup_link_config()
6401 lc->requested_fc &= ~PAUSE_RX; in fixup_link_config()
6403 if (!(lc->requested_fc & PAUSE_AUTONEG) && in fixup_link_config()
6404 !(lc->pcaps & FW_PORT_CAP32_FORCE_PAUSE)) { in fixup_link_config()
6406 lc->requested_fc |= PAUSE_AUTONEG; in fixup_link_config()
6410 if ((lc->requested_fec & FEC_RS && in fixup_link_config()
6411 !(lc->pcaps & FW_PORT_CAP32_FEC_RS)) || in fixup_link_config()
6412 (lc->requested_fec & FEC_BASER_RS && in fixup_link_config()
6413 !(lc->pcaps & FW_PORT_CAP32_FEC_BASER_RS))) { in fixup_link_config()
6415 lc->requested_fec = FEC_AUTO; in fixup_link_config()
6428 struct adapter *sc = pi->adapter; in apply_link_config()
6429 struct link_config *lc = &pi->link_cfg; in apply_link_config()
6436 if (lc->requested_aneg == AUTONEG_ENABLE) in apply_link_config()
6437 MPASS(lc->pcaps & FW_PORT_CAP32_ANEG); in apply_link_config()
6438 if (!(lc->requested_fc & PAUSE_AUTONEG)) in apply_link_config()
6439 MPASS(lc->pcaps & FW_PORT_CAP32_FORCE_PAUSE); in apply_link_config()
6440 if (lc->requested_fc & PAUSE_TX) in apply_link_config()
6441 MPASS(lc->pcaps & FW_PORT_CAP32_FC_TX); in apply_link_config()
6442 if (lc->requested_fc & PAUSE_RX) in apply_link_config()
6443 MPASS(lc->pcaps & FW_PORT_CAP32_FC_RX); in apply_link_config()
6444 if (lc->requested_fec & FEC_RS) in apply_link_config()
6445 MPASS(lc->pcaps & FW_PORT_CAP32_FEC_RS); in apply_link_config()
6446 if (lc->requested_fec & FEC_BASER_RS) in apply_link_config()
6447 MPASS(lc->pcaps & FW_PORT_CAP32_FEC_BASER_RS); in apply_link_config()
6449 if (!(sc->flags & IS_VF)) { in apply_link_config()
6450 rc = -t4_link_l1cfg(sc, sc->mbox, pi->hw_port, lc); in apply_link_config()
6452 device_printf(pi->dev, "l1cfg failed: %d\n", rc); in apply_link_config()
6458 * An L1_CFG will almost always result in a link-change event if the in apply_link_config()
6466 if (lc->link_ok && !(lc->requested_fc & PAUSE_AUTONEG)) in apply_link_config()
6467 lc->fc = lc->requested_fc & (PAUSE_TX | PAUSE_RX); in apply_link_config()
6486 struct vi_info *vi = if_getsoftc(ctx->ifp); in add_maddr()
6487 struct port_info *pi = vi->pi; in add_maddr()
6488 struct adapter *sc = pi->adapter; in add_maddr()
6490 if (ctx->rc < 0) in add_maddr()
6493 ctx->mcaddr[ctx->i] = LLADDR(sdl); in add_maddr()
6494 MPASS(ETHER_IS_MULTICAST(ctx->mcaddr[ctx->i])); in add_maddr()
6495 ctx->i++; in add_maddr()
6497 if (ctx->i == FW_MAC_EXACT_CHUNK) { in add_maddr()
6498 ctx->rc = t4_alloc_mac_filt(sc, sc->mbox, vi->viid, ctx->del, in add_maddr()
6499 ctx->i, ctx->mcaddr, NULL, &ctx->hash, 0); in add_maddr()
6500 if (ctx->rc < 0) { in add_maddr()
6503 for (j = 0; j < ctx->i; j++) { in add_maddr()
6504 if_printf(ctx->ifp, in add_maddr()
6508 ctx->mcaddr[j][0], ctx->mcaddr[j][1], in add_maddr()
6509 ctx->mcaddr[j][2], ctx->mcaddr[j][3], in add_maddr()
6510 ctx->mcaddr[j][4], ctx->mcaddr[j][5], in add_maddr()
6511 -ctx->rc); in add_maddr()
6515 ctx->del = 0; in add_maddr()
6516 ctx->i = 0; in add_maddr()
6531 struct port_info *pi = vi->pi; in update_mac_settings()
6532 struct adapter *sc = pi->adapter; in update_mac_settings()
6533 int mtu = -1, promisc = -1, allmulti = -1, vlanex = -1; in update_mac_settings()
6552 rc = -t4_set_rxmode(sc, sc->mbox, vi->viid, mtu, promisc, in update_mac_settings()
6565 rc = t4_change_mac(sc, sc->mbox, vi->viid, vi->xact_addr_filt, in update_mac_settings()
6566 ucaddr, true, &vi->smt_idx); in update_mac_settings()
6568 rc = -rc; in update_mac_settings()
6572 vi->xact_addr_filt = rc; in update_mac_settings()
6597 rc = -ctx.rc; in update_mac_settings()
6601 rc = t4_alloc_mac_filt(sc, sc->mbox, vi->viid, in update_mac_settings()
6605 rc = -rc; in update_mac_settings()
6622 rc = -t4_set_addr_hash(sc, sc->mbox, vi->viid, 0, ctx.hash, 0); in update_mac_settings()
6628 pi->vxlan_tcam_entry = false; in update_mac_settings()
6632 if (IS_MAIN_VI(vi) && sc->vxlan_refcount > 0 && in update_mac_settings()
6633 pi->vxlan_tcam_entry == false) { in update_mac_settings()
6634 rc = t4_alloc_raw_mac_filt(sc, vi->viid, match_all_mac, in update_mac_settings()
6635 match_all_mac, sc->rawf_base + pi->port_id, 1, pi->port_id, in update_mac_settings()
6638 rc = -rc; in update_mac_settings()
6642 MPASS(rc == sc->rawf_base + pi->port_id); in update_mac_settings()
6644 pi->vxlan_tcam_entry = true; in update_mac_settings()
6683 if (mtx_sleep(&sc->flags, &sc->sc_lock, in begin_synchronized_op()
6693 sc->last_op = wmesg; in begin_synchronized_op()
6694 sc->last_op_thr = curthread; in begin_synchronized_op()
6695 sc->last_op_flags = flags; in begin_synchronized_op()
6715 wakeup(&sc->flags); in begin_vi_detach()
6717 mtx_sleep(&sc->flags, &sc->sc_lock, 0, "t4detach", 0); in begin_vi_detach()
6720 sc->last_op = "t4detach"; in begin_vi_detach()
6721 sc->last_op_thr = curthread; in begin_vi_detach()
6722 sc->last_op_flags = 0; in begin_vi_detach()
6734 wakeup(&sc->flags); in end_vi_detach()
6752 wakeup(&sc->flags); in end_synchronized_op()
6759 struct port_info *pi = vi->pi; in cxgbe_init_synchronized()
6760 struct adapter *sc = pi->adapter; in cxgbe_init_synchronized()
6761 if_t ifp = vi->ifp; in cxgbe_init_synchronized()
6770 if (!(sc->flags & FULL_INIT_DONE) && ((rc = adapter_init(sc)) != 0)) in cxgbe_init_synchronized()
6773 if (!(vi->flags & VI_INIT_DONE) && ((rc = vi_init(vi)) != 0)) in cxgbe_init_synchronized()
6781 if (pi->up_vis == 0) { in cxgbe_init_synchronized()
6788 rc = -t4_enable_vi(sc, sc->mbox, vi->viid, true, true); in cxgbe_init_synchronized()
6802 txq->eq.flags |= EQ_ENABLED; in cxgbe_init_synchronized()
6809 if (sc->traceq < 0 && IS_MAIN_VI(vi)) { in cxgbe_init_synchronized()
6810 sc->traceq = sc->sge.rxq[vi->first_rxq].iq.abs_id; in cxgbe_init_synchronized()
6811 t4_set_trace_rss_control(sc, pi->tx_chan, sc->traceq); in cxgbe_init_synchronized()
6812 pi->flags |= HAS_TRACEQ; in cxgbe_init_synchronized()
6816 pi->up_vis++; in cxgbe_init_synchronized()
6818 if (pi->link_cfg.link_ok) in cxgbe_init_synchronized()
6822 mtx_lock(&vi->tick_mtx); in cxgbe_init_synchronized()
6823 if (vi->pi->nvi > 1 || sc->flags & IS_VF) in cxgbe_init_synchronized()
6824 callout_reset(&vi->tick, hz, vi_tick, vi); in cxgbe_init_synchronized()
6826 callout_reset(&vi->tick, hz, cxgbe_tick, vi); in cxgbe_init_synchronized()
6827 mtx_unlock(&vi->tick_mtx); in cxgbe_init_synchronized()
6841 struct port_info *pi = vi->pi; in cxgbe_uninit_synchronized()
6842 struct adapter *sc = pi->adapter; in cxgbe_uninit_synchronized()
6843 if_t ifp = vi->ifp; in cxgbe_uninit_synchronized()
6849 if (!(vi->flags & VI_INIT_DONE)) { in cxgbe_uninit_synchronized()
6853 "vi->flags 0x%016lx, if_flags 0x%08x, " in cxgbe_uninit_synchronized()
6854 "if_drv_flags 0x%08x\n", vi->flags, if_getflags(ifp), in cxgbe_uninit_synchronized()
6867 rc = -t4_enable_vi(sc, sc->mbox, vi->viid, false, false); in cxgbe_uninit_synchronized()
6875 txq->eq.flags &= ~EQ_ENABLED; in cxgbe_uninit_synchronized()
6879 mtx_lock(&vi->tick_mtx); in cxgbe_uninit_synchronized()
6880 callout_stop(&vi->tick); in cxgbe_uninit_synchronized()
6881 mtx_unlock(&vi->tick_mtx); in cxgbe_uninit_synchronized()
6889 pi->up_vis--; in cxgbe_uninit_synchronized()
6890 if (pi->up_vis > 0) { in cxgbe_uninit_synchronized()
6895 pi->link_cfg.link_ok = false; in cxgbe_uninit_synchronized()
6896 pi->link_cfg.speed = 0; in cxgbe_uninit_synchronized()
6897 pi->link_cfg.link_down_rc = 255; in cxgbe_uninit_synchronized()
6906 * will walk the entire sc->irq list and clean up whatever is valid.
6916 struct sge *sge = &sc->sge; in t4_setup_intr_handlers()
6931 irq = &sc->irq[0]; in t4_setup_intr_handlers()
6932 rid = sc->intr_type == INTR_INTX ? 0 : 1; in t4_setup_intr_handlers()
6937 if (sc->flags & IS_VF) in t4_setup_intr_handlers()
6938 KASSERT(sc->intr_count >= T4VF_EXTRA_INTR + sc->params.nports, in t4_setup_intr_handlers()
6941 KASSERT(sc->intr_count >= T4_EXTRA_INTR + sc->params.nports, in t4_setup_intr_handlers()
6945 if (!(sc->flags & IS_VF)) { in t4_setup_intr_handlers()
6954 rc = t4_alloc_irq(sc, irq, rid, t4_intr_evt, &sge->fwq, "evt"); in t4_setup_intr_handlers()
6961 pi = sc->port[p]; in t4_setup_intr_handlers()
6963 vi->first_intr = rid - 1; in t4_setup_intr_handlers()
6965 if (vi->nnmrxq > 0) { in t4_setup_intr_handlers()
6966 int n = max(vi->nrxq, vi->nnmrxq); in t4_setup_intr_handlers()
6968 rxq = &sge->rxq[vi->first_rxq]; in t4_setup_intr_handlers()
6970 nm_rxq = &sge->nm_rxq[vi->first_nm_rxq]; in t4_setup_intr_handlers()
6975 if (q < vi->nrxq) in t4_setup_intr_handlers()
6976 irq->rxq = rxq++; in t4_setup_intr_handlers()
6978 if (q < vi->nnmrxq) in t4_setup_intr_handlers()
6979 irq->nm_rxq = nm_rxq++; in t4_setup_intr_handlers()
6981 if (irq->nm_rxq != NULL && in t4_setup_intr_handlers()
6982 irq->rxq == NULL) { in t4_setup_intr_handlers()
6985 t4_nm_intr, irq->nm_rxq, s); in t4_setup_intr_handlers()
6987 if (irq->nm_rxq != NULL && in t4_setup_intr_handlers()
6988 irq->rxq != NULL) { in t4_setup_intr_handlers()
6994 if (irq->rxq != NULL && in t4_setup_intr_handlers()
6995 irq->nm_rxq == NULL) { in t4_setup_intr_handlers()
6998 t4_intr, irq->rxq, s); in t4_setup_intr_handlers()
7003 if (q < vi->nrxq) { in t4_setup_intr_handlers()
7004 bus_bind_intr(sc->dev, irq->res, in t4_setup_intr_handlers()
7010 vi->nintr++; in t4_setup_intr_handlers()
7021 bus_bind_intr(sc->dev, irq->res, in t4_setup_intr_handlers()
7026 vi->nintr++; in t4_setup_intr_handlers()
7038 vi->nintr++; in t4_setup_intr_handlers()
7043 MPASS(irq == &sc->irq[sc->intr_count]); in t4_setup_intr_handlers()
7059 rss_key[i] = htobe32(raw_rss_key[nitems(rss_key) - 1 - i]); in write_global_rss_key()
7061 t4_write_rss_key(sc, &rss_key[0], -1, 1); in write_global_rss_key()
7081 MPASS(sc->params.nports <= nitems(sc->tq)); in adapter_full_init()
7082 for (i = 0; i < sc->params.nports; i++) { in adapter_full_init()
7083 if (sc->tq[i] != NULL) in adapter_full_init()
7085 sc->tq[i] = taskqueue_create("t4 taskq", M_NOWAIT, in adapter_full_init()
7086 taskqueue_thread_enqueue, &sc->tq[i]); in adapter_full_init()
7087 if (sc->tq[i] == NULL) { in adapter_full_init()
7091 taskqueue_start_threads(&sc->tq[i], 1, PI_NET, "%s tq%d", in adapter_full_init()
7092 device_get_nameunit(sc->dev), i); in adapter_full_init()
7095 if (!(sc->flags & IS_VF)) { in adapter_full_init()
7109 KASSERT((sc->flags & FULL_INIT_DONE) == 0, in adapter_init()
7116 sc->flags |= FULL_INIT_DONE; in adapter_init()
7131 for (i = 0; i < nitems(sc->tq); i++) { in adapter_full_uninit()
7132 if (sc->tq[i] == NULL) in adapter_full_uninit()
7134 taskqueue_free(sc->tq[i]); in adapter_full_uninit()
7135 sc->tq[i] = NULL; in adapter_full_uninit()
7138 sc->flags &= ~FULL_INIT_DONE; in adapter_full_uninit()
7182 * enabling any 4-tuple hash is nonsense configuration. in hashen_to_hashconfig()
7210 struct adapter *sc = vi->adapter; in vi_full_init()
7230 if (vi->nrxq > vi->rss_size) { in vi_full_init()
7232 "some queues will never receive traffic.\n", vi->nrxq, in vi_full_init()
7233 vi->rss_size); in vi_full_init()
7234 } else if (vi->rss_size % vi->nrxq) { in vi_full_init()
7236 "expect uneven traffic distribution.\n", vi->nrxq, in vi_full_init()
7237 vi->rss_size); in vi_full_init()
7240 if (vi->nrxq != nbuckets) { in vi_full_init()
7242 "performance will be impacted.\n", vi->nrxq, nbuckets); in vi_full_init()
7245 if (vi->rss == NULL) in vi_full_init()
7246 vi->rss = malloc(vi->rss_size * sizeof (*vi->rss), M_CXGBE, in vi_full_init()
7248 for (i = 0; i < vi->rss_size;) { in vi_full_init()
7251 j %= vi->nrxq; in vi_full_init()
7252 rxq = &sc->sge.rxq[vi->first_rxq + j]; in vi_full_init()
7253 vi->rss[i++] = rxq->iq.abs_id; in vi_full_init()
7256 vi->rss[i++] = rxq->iq.abs_id; in vi_full_init()
7257 if (i == vi->rss_size) in vi_full_init()
7263 rc = -t4_config_rss_range(sc, sc->mbox, vi->viid, 0, vi->rss_size, in vi_full_init()
7264 vi->rss, vi->rss_size); in vi_full_init()
7270 vi->hashen = hashconfig_to_hashen(hashconfig); in vi_full_init()
7273 * We may have had to enable some hashes even though the global config in vi_full_init()
7277 extra = hashen_to_hashconfig(vi->hashen) ^ hashconfig; in vi_full_init()
7290 "global RSS config (0x%x) cannot be accommodated.\n", in vi_full_init()
7294 CH_ALERT(vi, "IPv4 2-tuple hashing forced on.\n"); in vi_full_init()
7296 CH_ALERT(vi, "TCP/IPv4 4-tuple hashing forced on.\n"); in vi_full_init()
7298 CH_ALERT(vi, "IPv6 2-tuple hashing forced on.\n"); in vi_full_init()
7300 CH_ALERT(vi, "TCP/IPv6 4-tuple hashing forced on.\n"); in vi_full_init()
7302 CH_ALERT(vi, "UDP/IPv4 4-tuple hashing forced on.\n"); in vi_full_init()
7304 CH_ALERT(vi, "UDP/IPv6 4-tuple hashing forced on.\n"); in vi_full_init()
7306 rc = -t4_config_vi_rss(sc, sc->mbox, vi->viid, vi->hashen, vi->rss[0], in vi_full_init()
7309 CH_ERR(vi, "rss hash/defaultq config failed: %d\n", rc); in vi_full_init()
7321 ASSERT_SYNCHRONIZED_OP(vi->adapter); in vi_init()
7322 KASSERT((vi->flags & VI_INIT_DONE) == 0, in vi_init()
7329 vi->flags |= VI_INIT_DONE; in vi_init()
7341 if (vi->flags & VI_INIT_DONE) { in vi_full_uninit()
7343 free(vi->rss, M_CXGBE); in vi_full_uninit()
7344 free(vi->nm_rss, M_CXGBE); in vi_full_uninit()
7348 vi->flags &= ~VI_INIT_DONE; in vi_full_uninit()
7354 struct sge_eq *eq = &txq->eq; in quiesce_txq()
7355 struct sge_qstat *spg = (void *)&eq->desc[eq->sidx]; in quiesce_txq()
7357 MPASS(eq->flags & EQ_SW_ALLOCATED); in quiesce_txq()
7358 MPASS(!(eq->flags & EQ_ENABLED)); in quiesce_txq()
7361 while (!mp_ring_is_idle(txq->r)) { in quiesce_txq()
7362 mp_ring_check_drainage(txq->r, 4096); in quiesce_txq()
7365 MPASS(txq->txp.npkt == 0); in quiesce_txq()
7367 if (eq->flags & EQ_HW_ALLOCATED) { in quiesce_txq()
7373 while (spg->cidx != htobe16(eq->pidx)) in quiesce_txq()
7375 while (eq->cidx != eq->pidx) in quiesce_txq()
7383 while (eq->cidx != eq->pidx) { in quiesce_txq()
7387 txsd = &txq->sdesc[eq->cidx]; in quiesce_txq()
7388 for (m = txsd->m; m != NULL; m = nextpkt) { in quiesce_txq()
7389 nextpkt = m->m_nextpkt; in quiesce_txq()
7390 m->m_nextpkt = NULL; in quiesce_txq()
7393 IDXINCR(eq->cidx, txsd->desc_used, eq->sidx); in quiesce_txq()
7395 spg->pidx = spg->cidx = htobe16(eq->cidx); in quiesce_txq()
7406 while ((wr = STAILQ_FIRST(&wrq->wr_list)) != NULL) { in quiesce_wrq()
7407 STAILQ_REMOVE_HEAD(&wrq->wr_list, link); in quiesce_wrq()
7409 wrq->nwr_pending--; in quiesce_wrq()
7410 wrq->ndesc_needed -= howmany(wr->wr_len, EQ_ESIZE); in quiesce_wrq()
7414 MPASS(wrq->nwr_pending == 0); in quiesce_wrq()
7415 MPASS(wrq->ndesc_needed == 0); in quiesce_wrq()
7416 wrq->nwr_pending = 0; in quiesce_wrq()
7417 wrq->ndesc_needed = 0; in quiesce_wrq()
7425 while (!atomic_cmpset_int(&iq->state, IQS_IDLE, IQS_DISABLED)) in quiesce_iq_fl()
7429 MPASS(iq->flags & IQ_HAS_FL); in quiesce_iq_fl()
7431 mtx_lock(&sc->sfl_lock); in quiesce_iq_fl()
7433 fl->flags |= FL_DOOMED; in quiesce_iq_fl()
7435 callout_stop(&sc->sfl_callout); in quiesce_iq_fl()
7436 mtx_unlock(&sc->sfl_lock); in quiesce_iq_fl()
7438 KASSERT((fl->flags & FL_STARVING) == 0, in quiesce_iq_fl()
7442 if (!(iq->flags & IQ_HW_ALLOCATED)) in quiesce_iq_fl()
7456 struct adapter *sc = vi->adapter; in quiesce_vi()
7466 if (!(vi->flags & VI_INIT_DONE)) in quiesce_vi()
7475 quiesce_wrq(&ofld_txq->wrq); in quiesce_vi()
7480 quiesce_iq_fl(sc, &rxq->iq, &rxq->fl); in quiesce_vi()
7485 quiesce_iq_fl(sc, &ofld_rxq->iq, &ofld_rxq->fl); in quiesce_vi()
7496 irq->rid = rid; in t4_alloc_irq()
7497 irq->res = bus_alloc_resource_any(sc->dev, SYS_RES_IRQ, &irq->rid, in t4_alloc_irq()
7499 if (irq->res == NULL) { in t4_alloc_irq()
7500 device_printf(sc->dev, in t4_alloc_irq()
7505 rc = bus_setup_intr(sc->dev, irq->res, INTR_MPSAFE | INTR_TYPE_NET, in t4_alloc_irq()
7506 NULL, handler, arg, &irq->tag); in t4_alloc_irq()
7508 device_printf(sc->dev, in t4_alloc_irq()
7512 bus_describe_intr(sc->dev, irq->res, irq->tag, "%s", name); in t4_alloc_irq()
7520 if (irq->tag) in t4_free_irq()
7521 bus_teardown_intr(sc->dev, irq->res, irq->tag); in t4_free_irq()
7522 if (irq->res) in t4_free_irq()
7523 bus_release_resource(sc->dev, SYS_RES_IRQ, irq->rid, irq->res); in t4_free_irq()
7534 regs->version = chip_id(sc) | chip_rev(sc) << 10; in get_regs()
7535 t4_get_regs(sc, buf, regs->len); in get_regs()
7562 if (sc->flags & IS_VF) { in read_vf_stat()
7566 mtx_assert(&sc->reg_lock, MA_OWNED); in read_vf_stat()
7582 if (!(sc->flags & IS_VF)) in t4_get_vi_stats()
7583 mtx_lock(&sc->reg_lock); in t4_get_vi_stats()
7584 stats->tx_bcast_bytes = GET_STAT(TX_VF_BCAST_BYTES); in t4_get_vi_stats()
7585 stats->tx_bcast_frames = GET_STAT(TX_VF_BCAST_FRAMES); in t4_get_vi_stats()
7586 stats->tx_mcast_bytes = GET_STAT(TX_VF_MCAST_BYTES); in t4_get_vi_stats()
7587 stats->tx_mcast_frames = GET_STAT(TX_VF_MCAST_FRAMES); in t4_get_vi_stats()
7588 stats->tx_ucast_bytes = GET_STAT(TX_VF_UCAST_BYTES); in t4_get_vi_stats()
7589 stats->tx_ucast_frames = GET_STAT(TX_VF_UCAST_FRAMES); in t4_get_vi_stats()
7590 stats->tx_drop_frames = GET_STAT(TX_VF_DROP_FRAMES); in t4_get_vi_stats()
7591 stats->tx_offload_bytes = GET_STAT(TX_VF_OFFLOAD_BYTES); in t4_get_vi_stats()
7592 stats->tx_offload_frames = GET_STAT(TX_VF_OFFLOAD_FRAMES); in t4_get_vi_stats()
7593 stats->rx_bcast_bytes = GET_STAT(RX_VF_BCAST_BYTES); in t4_get_vi_stats()
7594 stats->rx_bcast_frames = GET_STAT(RX_VF_BCAST_FRAMES); in t4_get_vi_stats()
7595 stats->rx_mcast_bytes = GET_STAT(RX_VF_MCAST_BYTES); in t4_get_vi_stats()
7596 stats->rx_mcast_frames = GET_STAT(RX_VF_MCAST_FRAMES); in t4_get_vi_stats()
7597 stats->rx_ucast_bytes = GET_STAT(RX_VF_UCAST_BYTES); in t4_get_vi_stats()
7598 stats->rx_ucast_frames = GET_STAT(RX_VF_UCAST_FRAMES); in t4_get_vi_stats()
7599 stats->rx_err_frames = GET_STAT(RX_VF_ERR_FRAMES); in t4_get_vi_stats()
7600 if (!(sc->flags & IS_VF)) in t4_get_vi_stats()
7601 mtx_unlock(&sc->reg_lock); in t4_get_vi_stats()
7624 mtx_assert(&vi->tick_mtx, MA_OWNED); in vi_refresh_stats()
7626 if (vi->flags & VI_SKIP_STATS) in vi_refresh_stats()
7631 if (timevalcmp(&tv, &vi->last_refreshed, <)) in vi_refresh_stats()
7634 t4_get_vi_stats(vi->adapter, vi->vin, &vi->stats); in vi_refresh_stats()
7635 getmicrotime(&vi->last_refreshed); in vi_refresh_stats()
7647 mtx_assert(&vi->tick_mtx, MA_OWNED); in cxgbe_refresh_stats()
7649 if (vi->flags & VI_SKIP_STATS) in cxgbe_refresh_stats()
7654 if (timevalcmp(&tv, &vi->last_refreshed, <)) in cxgbe_refresh_stats()
7657 pi = vi->pi; in cxgbe_refresh_stats()
7658 sc = vi->adapter; in cxgbe_refresh_stats()
7660 t4_get_port_stats(sc, pi->hw_port, &pi->stats); in cxgbe_refresh_stats()
7661 chan_map = pi->rx_e_chan_map; in cxgbe_refresh_stats()
7663 i = ffs(chan_map) - 1; in cxgbe_refresh_stats()
7664 mtx_lock(&sc->reg_lock); in cxgbe_refresh_stats()
7667 mtx_unlock(&sc->reg_lock); in cxgbe_refresh_stats()
7671 pi->tnl_cong_drops = tnl_cong_drops; in cxgbe_refresh_stats()
7672 getmicrotime(&vi->last_refreshed); in cxgbe_refresh_stats()
7681 mtx_assert(&vi->tick_mtx, MA_OWNED); in cxgbe_tick()
7684 callout_schedule(&vi->tick, hz); in cxgbe_tick()
7692 mtx_assert(&vi->tick_mtx, MA_OWNED); in vi_tick()
7695 callout_schedule(&vi->tick, hz); in vi_tick()
7742 sc->params.ncores, "# of active CIM cores"); in cim_sysctls()
7744 for (i = 0; i < sc->params.ncores; i++) { in cim_sysctls()
7800 MPASS(qcount <= sc->chip_params->cim_num_ibq); in cim_sysctls()
7831 MPASS(qcount <= sc->chip_params->cim_num_obq); in cim_sysctls()
7868 struct sysctl_ctx_list *ctx = &sc->ctx; in t4_sysctls()
7876 oid = device_get_sysctl_tree(sc->dev); in t4_sysctls()
7879 sc->sc_do_rxcopy = 1; in t4_sysctls()
7881 &sc->sc_do_rxcopy, 1, "Do RX copy of small frames"); in t4_sysctls()
7884 sc->params.nports, "# of ports"); in t4_sysctls()
7888 (uintptr_t)&sc->doorbells, sysctl_bitfield_8b, "A", in t4_sysctls()
7892 sc->params.vpd.cclk, "core clock frequency (in KHz)"); in t4_sysctls()
7896 sc->params.sge.timer_val, sizeof(sc->params.sge.timer_val), in t4_sysctls()
7901 sc->params.sge.counter_val, sizeof(sc->params.sge.counter_val), in t4_sysctls()
7906 sc->lro_timeout = 100; in t4_sysctls()
7908 &sc->lro_timeout, 0, "lro inactive-flush timeout (in us)"); in t4_sysctls()
7911 &sc->debug_flags, 0, "flags to enable runtime debugging"); in t4_sysctls()
7914 &sc->intr_flags, 0, "flags for the slow interrupt handler"); in t4_sysctls()
7917 CTLFLAG_RD, sc->tp_version, 0, "TP microcode version"); in t4_sysctls()
7920 CTLFLAG_RD, sc->fw_version, 0, "firmware version"); in t4_sysctls()
7922 if (sc->flags & IS_VF) in t4_sysctls()
7929 CTLFLAG_RD, sc->params.vpd.sn, 0, "serial number"); in t4_sysctls()
7932 CTLFLAG_RD, sc->params.vpd.pn, 0, "part number"); in t4_sysctls()
7935 CTLFLAG_RD, sc->params.vpd.ec, 0, "engineering change"); in t4_sysctls()
7938 CTLFLAG_RD, sc->params.vpd.md, 0, "manufacturing diags version"); in t4_sysctls()
7941 CTLFLAG_RD, sc->params.vpd.na, 0, "network address"); in t4_sysctls()
7944 sc->er_version, 0, "expansion ROM version"); in t4_sysctls()
7947 sc->bs_version, 0, "bootstrap firmware version"); in t4_sysctls()
7950 NULL, sc->params.scfg_vers, "serial config version"); in t4_sysctls()
7953 NULL, sc->params.vpd_vers, "VPD version"); in t4_sysctls()
7956 CTLFLAG_RD, sc->cfg_file, 0, "configuration file"); in t4_sysctls()
7959 sc->cfcsum, "config file checksum"); in t4_sysctls()
7964 (uintptr_t)&sc->name, sysctl_bitfield_16b, "A", \ in t4_sysctls()
7980 NULL, sc->tids.nftids, "number of filters"); in t4_sysctls()
8002 &sc->swintr, 0, "software triggered interrupts"); in t4_sysctls()
8028 sysctl_ddp_stats, "A", "non-TCP DDP statistics"); in t4_sysctls()
8035 CTLTYPE_STRING | CTLFLAG_RD | CTLFLAG_MPSAFE, sc, -1, in t4_sysctls()
8134 CTLFLAG_RW, &sc->tlst.inline_keys, 0, "Always pass TLS " in t4_sysctls()
8140 CTLFLAG_RW, &sc->tlst.combo_wrs, 0, "Attempt to " in t4_sysctls()
8145 CTLFLAG_RW, &sc->tlst.short_records, 0, in t4_sysctls()
8146 "Use cipher-only mode for short records."); in t4_sysctls()
8148 CTLFLAG_RW, &sc->tlst.partial_ghash, 0, in t4_sysctls()
8149 "Use partial GHASH for AES-GCM records."); in t4_sysctls()
8166 sc->tt.cong_algorithm = -1; in t4_sysctls()
8168 CTLFLAG_RW, &sc->tt.cong_algorithm, 0, "congestion control " in t4_sysctls()
8169 "(-1 = default, 0 = reno, 1 = tahoe, 2 = newreno, " in t4_sysctls()
8172 sc->tt.sndbuf = -1; in t4_sysctls()
8174 &sc->tt.sndbuf, 0, "hardware send buffer"); in t4_sysctls()
8176 sc->tt.ddp = 0; in t4_sysctls()
8178 CTLFLAG_RW | CTLFLAG_SKIP, &sc->tt.ddp, 0, ""); in t4_sysctls()
8180 &sc->tt.ddp, 0, "Enable zero-copy aio_read(2)"); in t4_sysctls()
8182 sc->tt.rx_coalesce = -1; in t4_sysctls()
8184 CTLFLAG_RW, &sc->tt.rx_coalesce, 0, "receive coalescing"); in t4_sysctls()
8186 sc->tt.tls = 1; in t4_sysctls()
8191 sc->tt.tx_align = -1; in t4_sysctls()
8193 CTLFLAG_RW, &sc->tt.tx_align, 0, "chop and align payload"); in t4_sysctls()
8195 sc->tt.tx_zcopy = 0; in t4_sysctls()
8197 CTLFLAG_RW, &sc->tt.tx_zcopy, 0, in t4_sysctls()
8198 "Enable zero-copy aio_write(2)"); in t4_sysctls()
8200 sc->tt.cop_managed_offloading = !!t4_cop_managed_offloading; in t4_sysctls()
8203 &sc->tt.cop_managed_offloading, 0, in t4_sysctls()
8206 sc->tt.autorcvbuf_inc = 16 * 1024; in t4_sysctls()
8208 CTLFLAG_RW, &sc->tt.autorcvbuf_inc, 0, in t4_sysctls()
8211 sc->tt.update_hc_on_pmtu_change = 1; in t4_sysctls()
8214 &sc->tt.update_hc_on_pmtu_change, 0, in t4_sysctls()
8217 sc->tt.iso = 1; in t4_sysctls()
8219 &sc->tt.iso, 0, "Enable iSCSI segmentation offload"); in t4_sysctls()
8309 struct sysctl_ctx_list *ctx = &vi->ctx; in vi_sysctls()
8316 oid = device_get_sysctl_tree(vi->dev); in vi_sysctls()
8320 vi->viid, "VI identifer"); in vi_sysctls()
8322 &vi->nrxq, 0, "# of rx queues"); in vi_sysctls()
8324 &vi->ntxq, 0, "# of tx queues"); in vi_sysctls()
8326 &vi->first_rxq, 0, "index of first rx queue"); in vi_sysctls()
8328 &vi->first_txq, 0, "index of first tx queue"); in vi_sysctls()
8330 vi->rss_base, "start of RSS indirection table"); in vi_sysctls()
8332 vi->rss_size, "size of RSS indirection table"); in vi_sysctls()
8338 "Reserve queue 0 for non-flowid packets"); in vi_sysctls()
8341 if (vi->adapter->flags & IS_VF) { in vi_sysctls()
8342 MPASS(vi->flags & TX_USES_VM_WR); in vi_sysctls()
8352 if (vi->nofldrxq != 0) { in vi_sysctls()
8354 &vi->nofldrxq, 0, in vi_sysctls()
8357 CTLFLAG_RD, &vi->first_ofld_rxq, 0, in vi_sysctls()
8370 if (vi->nofldtxq != 0) { in vi_sysctls()
8372 &vi->nofldtxq, 0, in vi_sysctls()
8375 CTLFLAG_RD, &vi->first_ofld_txq, 0, in vi_sysctls()
8380 if (vi->nnmrxq != 0) { in vi_sysctls()
8382 &vi->nnmrxq, 0, "# of netmap rx queues"); in vi_sysctls()
8384 &vi->nnmtxq, 0, "# of netmap tx queues"); in vi_sysctls()
8386 CTLFLAG_RD, &vi->first_nm_rxq, 0, in vi_sysctls()
8389 CTLFLAG_RD, &vi->first_nm_txq, 0, in vi_sysctls()
8412 struct sysctl_ctx_list *ctx = &pi->ctx; in cxgbe_sysctls()
8415 struct adapter *sc = pi->adapter; in cxgbe_sysctls()
8423 oid = device_get_sysctl_tree(pi->dev); in cxgbe_sysctls()
8429 if (pi->port_type == FW_PORT_TYPE_BT_XAUI) { in cxgbe_sysctls()
8455 "autonegotiation (-1 = not supported)"); in cxgbe_sysctls()
8458 sysctl_force_fec, "I", "when to use FORCE_FEC bit for link config"); in cxgbe_sysctls()
8461 &pi->link_cfg.requested_caps, 0, "L1 config requested by driver"); in cxgbe_sysctls()
8463 &pi->link_cfg.pcaps, 0, "port capabilities"); in cxgbe_sysctls()
8465 &pi->link_cfg.acaps, 0, "advertised capabilities"); in cxgbe_sysctls()
8467 &pi->link_cfg.lpacaps, 0, "link partner advertised capabilities"); in cxgbe_sysctls()
8472 pi->mps_bg_map, "MPS buffer group map"); in cxgbe_sysctls()
8474 NULL, pi->rx_e_chan_map, "TP rx e-channel map"); in cxgbe_sysctls()
8476 pi->tx_chan, "TP tx c-channel"); in cxgbe_sysctls()
8478 pi->rx_chan, "TP rx c-channel"); in cxgbe_sysctls()
8480 if (sc->flags & IS_VF) in cxgbe_sysctls()
8491 CTLFLAG_RW, &pi->sched_params->pktsize, 0, in cxgbe_sysctls()
8492 "pktsize for per-flow cl-rl (0 means up to the driver )"); in cxgbe_sysctls()
8494 CTLFLAG_RW, &pi->sched_params->burstsize, 0, in cxgbe_sysctls()
8495 "burstsize for per-flow cl-rl (0 means up to the driver)"); in cxgbe_sysctls()
8496 for (i = 0; i < sc->params.nsched_cls; i++) { in cxgbe_sysctls()
8497 struct tx_cl_rl_params *tc = &pi->sched_params->cl_rl[i]; in cxgbe_sysctls()
8504 CTLFLAG_RD, &tc->state, 0, "current state"); in cxgbe_sysctls()
8507 (uintptr_t)&tc->flags, sysctl_bitfield_8b, "A", "flags"); in cxgbe_sysctls()
8509 CTLFLAG_RD, &tc->refcount, 0, "references to this class"); in cxgbe_sysctls()
8512 (pi->port_id << 16) | i, sysctl_tc_params, "A", in cxgbe_sysctls()
8523 &pi->tx_parse_error, 0, in cxgbe_sysctls()
8527 if (sc->params.tp.lb_mode) { \ in cxgbe_sysctls()
8535 t4_port_reg(sc, pi->tx_chan, A_MPS_PORT_STAT_##stat##_L), \ in cxgbe_sysctls()
8574 CTLFLAG_RD, &pi->stats.rx_fcs_err, in cxgbe_sysctls()
8607 if (pi->mps_bg_map & 1) { in cxgbe_sysctls()
8609 "# drops due to buffer-group 0 overflows"); in cxgbe_sysctls()
8611 "# of buffer-group 0 truncated packets"); in cxgbe_sysctls()
8613 if (pi->mps_bg_map & 2) { in cxgbe_sysctls()
8615 "# drops due to buffer-group 1 overflows"); in cxgbe_sysctls()
8617 "# of buffer-group 1 truncated packets"); in cxgbe_sysctls()
8619 if (pi->mps_bg_map & 4) { in cxgbe_sysctls()
8621 "# drops due to buffer-group 2 overflows"); in cxgbe_sysctls()
8623 "# of buffer-group 2 truncated packets"); in cxgbe_sysctls()
8625 if (pi->mps_bg_map & 8) { in cxgbe_sysctls()
8627 "# drops due to buffer-group 3 overflows"); in cxgbe_sysctls()
8629 "# of buffer-group 3 truncated packets"); in cxgbe_sysctls()
8641 for (i = arg1; arg2; arg2 -= sizeof(int), i++) { in sysctl_int_array()
8691 struct adapter *sc = pi->adapter; in sysctl_btphy()
8695 rc = begin_synchronized_op(sc, &pi->vi[0], SLEEP_OK | INTR_OK, "t4btt"); in sysctl_btphy()
8702 rc = -t4_mdio_rd(sc, sc->mbox, pi->mdio_addr, 0x1e, in sysctl_btphy()
8721 val = vi->rsrv_noflowq; in sysctl_noflowq()
8723 if (rc != 0 || req->newptr == NULL) in sysctl_noflowq()
8726 if ((val >= 1) && (vi->ntxq > 1)) in sysctl_noflowq()
8727 vi->rsrv_noflowq = 1; in sysctl_noflowq()
8729 vi->rsrv_noflowq = 0; in sysctl_noflowq()
8738 struct adapter *sc = vi->adapter; in sysctl_tx_vm_wr()
8741 MPASS(!(sc->flags & IS_VF)); in sysctl_tx_vm_wr()
8743 val = vi->flags & TX_USES_VM_WR ? 1 : 0; in sysctl_tx_vm_wr()
8745 if (rc != 0 || req->newptr == NULL) in sysctl_tx_vm_wr()
8757 else if (if_getdrvflags(vi->ifp) & IFF_DRV_RUNNING) { in sysctl_tx_vm_wr()
8765 struct port_info *pi = vi->pi; in sysctl_tx_vm_wr()
8768 uint8_t npkt = sc->params.max_pkts_per_eth_tx_pkts_wr; in sysctl_tx_vm_wr()
8771 vi->flags |= TX_USES_VM_WR; in sysctl_tx_vm_wr()
8772 if_sethwtsomaxsegcount(vi->ifp, TX_SGL_SEGS_VM_TSO); in sysctl_tx_vm_wr()
8774 V_TXPKT_INTF(pi->hw_port)); in sysctl_tx_vm_wr()
8775 if (!(sc->flags & IS_VF)) in sysctl_tx_vm_wr()
8776 npkt--; in sysctl_tx_vm_wr()
8778 vi->flags &= ~TX_USES_VM_WR; in sysctl_tx_vm_wr()
8779 if_sethwtsomaxsegcount(vi->ifp, TX_SGL_SEGS_TSO); in sysctl_tx_vm_wr()
8781 V_TXPKT_INTF(pi->hw_port) | V_TXPKT_PF(sc->pf) | in sysctl_tx_vm_wr()
8782 V_TXPKT_VF(vi->vin) | V_TXPKT_VF_VLD(vi->vfvld)); in sysctl_tx_vm_wr()
8785 txq->cpl_ctrl0 = ctrl0; in sysctl_tx_vm_wr()
8786 txq->txp.max_npkt = npkt; in sysctl_tx_vm_wr()
8797 struct adapter *sc = vi->adapter; in sysctl_holdoff_tmr_idx()
8802 idx = vi->tmr_idx; in sysctl_holdoff_tmr_idx()
8805 if (rc != 0 || req->newptr == NULL) in sysctl_holdoff_tmr_idx()
8816 v = V_QINTR_TIMER_IDX(idx) | V_QINTR_CNT_EN(vi->pktc_idx != -1); in sysctl_holdoff_tmr_idx()
8819 atomic_store_rel_8(&rxq->iq.intr_params, v); in sysctl_holdoff_tmr_idx()
8821 rxq->iq.intr_params = v; in sysctl_holdoff_tmr_idx()
8824 vi->tmr_idx = idx; in sysctl_holdoff_tmr_idx()
8834 struct adapter *sc = vi->adapter; in sysctl_holdoff_pktc_idx()
8837 idx = vi->pktc_idx; in sysctl_holdoff_pktc_idx()
8840 if (rc != 0 || req->newptr == NULL) in sysctl_holdoff_pktc_idx()
8843 if (idx < -1 || idx >= SGE_NCOUNTERS) in sysctl_holdoff_pktc_idx()
8851 if (vi->flags & VI_INIT_DONE) in sysctl_holdoff_pktc_idx()
8854 vi->pktc_idx = idx; in sysctl_holdoff_pktc_idx()
8864 struct adapter *sc = vi->adapter; in sysctl_qsize_rxq()
8867 qsize = vi->qsize_rxq; in sysctl_qsize_rxq()
8870 if (rc != 0 || req->newptr == NULL) in sysctl_qsize_rxq()
8881 if (vi->flags & VI_INIT_DONE) in sysctl_qsize_rxq()
8884 vi->qsize_rxq = qsize; in sysctl_qsize_rxq()
8894 struct adapter *sc = vi->adapter; in sysctl_qsize_txq()
8897 qsize = vi->qsize_txq; in sysctl_qsize_txq()
8900 if (rc != 0 || req->newptr == NULL) in sysctl_qsize_txq()
8911 if (vi->flags & VI_INIT_DONE) in sysctl_qsize_txq()
8914 vi->qsize_txq = qsize; in sysctl_qsize_txq()
8924 struct adapter *sc = pi->adapter; in sysctl_pause_settings()
8925 struct link_config *lc = &pi->link_cfg; in sysctl_pause_settings()
8928 if (req->newptr == NULL) { in sysctl_pause_settings()
8936 if (lc->link_ok) { in sysctl_pause_settings()
8937 sbuf_printf(sb, "%b", (lc->fc & (PAUSE_TX | PAUSE_RX)) | in sysctl_pause_settings()
8938 (lc->requested_fc & PAUSE_AUTONEG), bits); in sysctl_pause_settings()
8940 sbuf_printf(sb, "%b", lc->requested_fc & (PAUSE_TX | in sysctl_pause_settings()
8949 s[0] = '0' + (lc->requested_fc & (PAUSE_TX | PAUSE_RX | in sysctl_pause_settings()
8961 n = s[0] - '0'; in sysctl_pause_settings()
8965 rc = begin_synchronized_op(sc, &pi->vi[0], SLEEP_OK | INTR_OK, in sysctl_pause_settings()
8971 lc->requested_fc = n; in sysctl_pause_settings()
8973 if (pi->up_vis > 0) in sysctl_pause_settings()
8988 struct link_config *lc = &pi->link_cfg; in sysctl_link_fec()
8995 if (lc->link_ok) in sysctl_link_fec()
8996 sbuf_printf(sb, "%b", lc->fec, t4_fec_bits); in sysctl_link_fec()
9009 struct adapter *sc = pi->adapter; in sysctl_requested_fec()
9010 struct link_config *lc = &pi->link_cfg; in sysctl_requested_fec()
9012 int8_t old = lc->requested_fec; in sysctl_requested_fec()
9014 if (req->newptr == NULL) { in sysctl_requested_fec()
9028 snprintf(s, sizeof(s), "%d", old == FEC_AUTO ? -1 : in sysctl_requested_fec()
9041 rc = begin_synchronized_op(sc, &pi->vi[0], SLEEP_OK | INTR_OK, in sysctl_requested_fec()
9046 if (lc->requested_fec != old) { in sysctl_requested_fec()
9051 lc->requested_fec = FEC_AUTO; in sysctl_requested_fec()
9053 lc->requested_fec = FEC_NONE; in sysctl_requested_fec()
9055 if ((lc->pcaps | in sysctl_requested_fec()
9057 lc->pcaps) { in sysctl_requested_fec()
9061 lc->requested_fec = n & (M_FW_PORT_CAP32_FEC | in sysctl_requested_fec()
9066 if (pi->up_vis > 0) { in sysctl_requested_fec()
9069 lc->requested_fec = old; in sysctl_requested_fec()
9087 struct adapter *sc = pi->adapter; in sysctl_module_fec()
9088 struct link_config *lc = &pi->link_cfg; in sysctl_module_fec()
9106 if (pi->up_vis == 0) { in sysctl_module_fec()
9116 fec = lc->fec_hint; in sysctl_module_fec()
9117 if (pi->mod_type == FW_PORT_MOD_TYPE_NONE || in sysctl_module_fec()
9118 !fec_supported(lc->pcaps)) { in sysctl_module_fec()
9139 struct adapter *sc = pi->adapter; in sysctl_autoneg()
9140 struct link_config *lc = &pi->link_cfg; in sysctl_autoneg()
9143 if (lc->pcaps & FW_PORT_CAP32_ANEG) in sysctl_autoneg()
9144 val = lc->requested_aneg == AUTONEG_DISABLE ? 0 : 1; in sysctl_autoneg()
9146 val = -1; in sysctl_autoneg()
9148 if (rc != 0 || req->newptr == NULL) in sysctl_autoneg()
9157 rc = begin_synchronized_op(sc, &pi->vi[0], SLEEP_OK | INTR_OK, in sysctl_autoneg()
9162 if (val == AUTONEG_ENABLE && !(lc->pcaps & FW_PORT_CAP32_ANEG)) { in sysctl_autoneg()
9166 lc->requested_aneg = val; in sysctl_autoneg()
9169 if (pi->up_vis > 0) in sysctl_autoneg()
9183 struct adapter *sc = pi->adapter; in sysctl_force_fec()
9184 struct link_config *lc = &pi->link_cfg; in sysctl_force_fec()
9187 val = lc->force_fec; in sysctl_force_fec()
9188 MPASS(val >= -1 && val <= 1); in sysctl_force_fec()
9190 if (rc != 0 || req->newptr == NULL) in sysctl_force_fec()
9192 if (!(lc->pcaps & FW_PORT_CAP32_FORCE_FEC)) in sysctl_force_fec()
9194 if (val < -1 || val > 1) in sysctl_force_fec()
9197 rc = begin_synchronized_op(sc, &pi->vi[0], SLEEP_OK | INTR_OK, "t4ff"); in sysctl_force_fec()
9201 lc->force_fec = val; in sysctl_force_fec()
9204 if (pi->up_vis > 0) in sysctl_force_fec()
9219 mtx_lock(&sc->reg_lock); in sysctl_handle_t4_reg64()
9226 mtx_unlock(&sc->reg_lock); in sysctl_handle_t4_reg64()
9236 struct adapter *sc = pi->adapter; in sysctl_handle_t4_portstat64()
9240 mtx_lock(&sc->reg_lock); in sysctl_handle_t4_portstat64()
9245 for (i = 0; i < sc->params.tp.lb_nchan; i++) { in sysctl_handle_t4_portstat64()
9247 t4_port_reg(sc, pi->tx_chan + i, reg)); in sysctl_handle_t4_portstat64()
9251 mtx_unlock(&sc->reg_lock); in sysctl_handle_t4_portstat64()
9273 rc = -t4_query_params(sc, sc->mbox, sc->pf, 0, 1, ¶m, &val); in sysctl_temperature()
9279 /* unknown is returned as 0 but we display -1 in that case */ in sysctl_temperature()
9280 t = val == 0 ? -1 : val; in sysctl_temperature()
9293 if (sc->params.core_vdd == 0) { in sysctl_vdd()
9304 rc = -t4_query_params(sc, sc->mbox, sc->pf, 0, 1, in sysctl_vdd()
9310 sc->params.core_vdd = val; in sysctl_vdd()
9313 return (sysctl_handle_int(oidp, &sc->params.core_vdd, 0, req)); in sysctl_vdd()
9323 v = sc->sensor_resets; in sysctl_reset_sensor()
9325 if (rc != 0 || req->newptr == NULL || v <= 0) in sysctl_reset_sensor()
9328 if (sc->params.fw_vers < FW_VERSION32(1, 24, 7, 0) || in sysctl_reset_sensor()
9342 rc = -t4_set_params(sc, sc->mbox, sc->pf, 0, 1, ¶m, &val); in sysctl_reset_sensor()
9346 sc->sensor_resets++; in sysctl_reset_sensor()
9359 KASSERT(coreid < sc->params.ncores, in sysctl_loadavg()
9371 rc = -t4_query_params(sc, sc->mbox, sc->pf, 0, 1, ¶m, &val); in sysctl_loadavg()
9411 mtx_lock(&sc->reg_lock); in sysctl_cctrl()
9416 mtx_unlock(&sc->reg_lock); in sysctl_cctrl()
9427 sc->params.a_wnd[i], dec_fac[sc->params.b_wnd[i]]); in sysctl_cctrl()
9447 KASSERT(qid >= 0 && qid < sc->chip_params->cim_num_ibq, in sysctl_cim_ibq()
9449 KASSERT(coreid >= 0 && coreid < sc->params.ncores, in sysctl_cim_ibq()
9454 mtx_lock(&sc->reg_lock); in sysctl_cim_ibq()
9456 rc = -ENXIO; in sysctl_cim_ibq()
9459 mtx_unlock(&sc->reg_lock); in sysctl_cim_ibq()
9461 rc = -rc; in sysctl_cim_ibq()
9492 KASSERT(qid >= 0 && qid < sc->chip_params->cim_num_obq, in sysctl_cim_obq()
9494 KASSERT(coreid >= 0 && coreid < sc->params.ncores, in sysctl_cim_obq()
9499 mtx_lock(&sc->reg_lock); in sysctl_cim_obq()
9501 rc = -ENXIO; in sysctl_cim_obq()
9504 mtx_unlock(&sc->reg_lock); in sysctl_cim_obq()
9506 rc = -rc; in sysctl_cim_obq()
9539 for (p = buf; p <= &buf[sc->params.cim_la_size - 8]; p += 8) { in sbuf_cim_la4()
9569 for (p = buf; p <= &buf[sc->params.cim_la_size - 10]; p += 10) { in sbuf_cim_la6()
9599 buf = malloc(sc->params.cim_la_size * sizeof(uint32_t), M_CXGBE, in sbuf_cim_la()
9604 mtx_lock(&sc->reg_lock); in sbuf_cim_la()
9608 rc = -t4_cim_read_core(sc, 1, coreid, A_UP_UP_DBG_LA_CFG, 1, in sbuf_cim_la()
9611 rc = -t4_cim_read_la_core(sc, coreid, buf, NULL); in sbuf_cim_la()
9613 mtx_unlock(&sc->reg_lock); in sbuf_cim_la()
9647 device_get_nameunit(sc->dev), in dump_cim_regs()
9654 device_get_nameunit(sc->dev), in dump_cim_regs()
9670 device_get_nameunit(sc->dev)); in dump_cimla()
9678 device_get_nameunit(sc->dev), sbuf_data(&sb)); in dump_cimla()
9687 atomic_set_int(&sc->error_flags, ADAP_CIM_ERR); in t4_os_cim_err()
9707 mtx_lock(&sc->reg_lock); in sysctl_cim_ma_la()
9712 mtx_unlock(&sc->reg_lock); in sysctl_cim_ma_la()
9755 mtx_lock(&sc->reg_lock); in sysctl_cim_pif_la()
9760 mtx_unlock(&sc->reg_lock); in sysctl_cim_pif_la()
9798 "TP0", "TP1", "ULP", "SGE0", "SGE1", "NC-SI", /* ibq's */ in sysctl_cim_qcfg()
9799 "ULP0", "ULP1", "ULP2", "ULP3", "SGE", "NC-SI", /* obq's */ in sysctl_cim_qcfg()
9800 "SGE0-RX", "SGE1-RX" /* additional obq's (T5 onwards) */ in sysctl_cim_qcfg()
9805 cim_num_obq = sc->chip_params->cim_num_obq; in sysctl_cim_qcfg()
9815 mtx_lock(&sc->reg_lock); in sysctl_cim_qcfg()
9819 rc = -t4_cim_read(sc, ibq_rdaddr, 4 * nq, stat); in sysctl_cim_qcfg()
9821 rc = -t4_cim_read(sc, obq_rdaddr, 2 * cim_num_obq, in sysctl_cim_qcfg()
9827 mtx_unlock(&sc->reg_lock); in sysctl_cim_qcfg()
9846 wr[0] - base[i], G_QUESOPCNT(p[3]), G_QUEEOPCNT(p[3]), in sysctl_cim_qcfg()
9869 "TP0", "TP1", "TP2", "TP3", "ULP", "SGE0", "SGE1", "NC-SI", in sysctl_cim_qcfg_t7()
9873 "ULP0", "ULP1", "ULP2", "ULP3", "SGE", "NC-SI", "SGE0-RX", in sysctl_cim_qcfg_t7()
9882 "ULP0", "ULP1", "ULP2", "ULP3", "SGE", "RSVD", "SGE0-RX", in sysctl_cim_qcfg_t7()
9889 mtx_lock(&sc->reg_lock); in sysctl_cim_qcfg_t7()
9893 rc = -t4_cim_read_core(sc, 1, coreid, in sysctl_cim_qcfg_t7()
9898 rc = -t4_cim_read_core(sc, 1, coreid, in sysctl_cim_qcfg_t7()
9906 rc = -t4_cim_read_core(sc, 1, coreid, addr, 1, in sysctl_cim_qcfg_t7()
9914 mtx_unlock(&sc->reg_lock); in sysctl_cim_qcfg_t7()
9941 coreid == 0 ? qname_obq_t7[i - CIM_NUM_IBQ_T7] : in sysctl_cim_qcfg_t7()
9942 qname_obq_sec_t7[i - CIM_NUM_IBQ_T7], in sysctl_cim_qcfg_t7()
9966 mtx_lock(&sc->reg_lock); in sysctl_cpl_stats()
9971 mtx_unlock(&sc->reg_lock); in sysctl_cpl_stats()
9975 if (sc->chip_params->nchan > 2) { in sysctl_cpl_stats()
10009 mtx_lock(&sc->reg_lock); in sysctl_ddp_stats()
10014 mtx_unlock(&sc->reg_lock); in sysctl_ddp_stats()
10039 mtx_lock(&sc->reg_lock); in sysctl_tid_stats()
10044 mtx_unlock(&sc->reg_lock); in sysctl_tid_stats()
10098 struct devlog_params *dparams = &sc->params.devlog; in sbuf_devlog()
10103 KASSERT(coreid >= 0 && coreid < sc->params.ncores, in sbuf_devlog()
10106 if (dparams->addr == 0) in sbuf_devlog()
10109 size = dparams->size / sc->params.ncores; in sbuf_devlog()
10110 addr = dparams->addr + coreid * size; in sbuf_devlog()
10117 mtx_lock(&sc->reg_lock); in sbuf_devlog()
10122 mtx_unlock(&sc->reg_lock); in sbuf_devlog()
10130 if (e->timestamp == 0) in sbuf_devlog()
10133 e->timestamp = be64toh(e->timestamp); in sbuf_devlog()
10134 e->seqno = be32toh(e->seqno); in sbuf_devlog()
10136 e->params[j] = be32toh(e->params[j]); in sbuf_devlog()
10138 if (e->timestamp < ftstamp) { in sbuf_devlog()
10139 ftstamp = e->timestamp; in sbuf_devlog()
10153 if (e->timestamp == 0) in sbuf_devlog()
10157 e->seqno, e->timestamp, in sbuf_devlog()
10158 (e->level < nitems(devlog_level_strings) ? in sbuf_devlog()
10159 devlog_level_strings[e->level] : "UNKNOWN"), in sbuf_devlog()
10160 (e->facility < nitems(devlog_facility_strings) ? in sbuf_devlog()
10161 devlog_facility_strings[e->facility] : "UNKNOWN")); in sbuf_devlog()
10162 sbuf_printf(sb, e->fmt, e->params[0], e->params[1], in sbuf_devlog()
10163 e->params[2], e->params[3], e->params[4], in sbuf_devlog()
10164 e->params[5], e->params[6], e->params[7]); in sbuf_devlog()
10184 if (coreid == -1) { in sysctl_devlog()
10185 /* -1 means all cores */ in sysctl_devlog()
10186 for (i = rc = 0; i < sc->params.ncores && rc == 0; i++) { in sysctl_devlog()
10187 if (sc->params.ncores > 0) in sysctl_devlog()
10192 KASSERT(coreid >= 0 && coreid < sc->params.ncores, in sysctl_devlog()
10210 device_get_nameunit(sc->dev)); in dump_devlog()
10213 for (i = rc = 0; i < sc->params.ncores && rc == 0; i++) { in dump_devlog()
10214 if (sc->params.ncores > 0) in dump_devlog()
10221 device_get_nameunit(sc->dev), sbuf_data(&sb)); in dump_devlog()
10233 int i, nchan = sc->chip_params->nchan; in sysctl_fcoe_stats()
10236 mtx_lock(&sc->reg_lock); in sysctl_fcoe_stats()
10243 mtx_unlock(&sc->reg_lock); in sysctl_fcoe_stats()
10292 mtx_lock(&sc->reg_lock); in sysctl_hw_sched()
10294 mtx_unlock(&sc->reg_lock); in sysctl_hw_sched()
10302 mtx_unlock(&sc->reg_lock); in sysctl_hw_sched()
10309 sbuf_printf(sb, "\n %u %-5s %u ", i, in sysctl_hw_sched()
10357 for (i = 0; i < sc->chip_params->nchan; i += 2) { in sysctl_lb_stats()
10358 mtx_lock(&sc->reg_lock); in sysctl_lb_stats()
10365 mtx_unlock(&sc->reg_lock); in sysctl_lb_stats()
10375 sbuf_printf(sb, "\n%-17s %20ju %20ju", stat_name[j], in sysctl_lb_stats()
10391 struct link_config *lc = &pi->link_cfg; in sysctl_linkdnrc()
10398 if (lc->link_ok || lc->link_down_rc == 255) in sysctl_linkdnrc()
10401 sbuf_printf(sb, "%s", t4_link_down_rc_str(lc->link_down_rc)); in sysctl_linkdnrc()
10418 const uint64_t v1 = ((const struct mem_desc *)a)->base; in mem_desc_cmp()
10419 const uint64_t v2 = ((const struct mem_desc *)b)->base; in mem_desc_cmp()
10422 return (-1); in mem_desc_cmp()
10437 size = to - from + 1; in mem_region_show()
10442 sbuf_printf(sb, "%-18s 0x%012jx-0x%012jx [%ju]\n", name, in mem_region_show()
10445 sbuf_printf(sb, "%-18s 0x%08jx-0x%08jx [%ju]\n", name, in mem_region_show()
10468 "ULPTX state:", "RoCE RRQ region:", "On-chip queues:", in sysctl_meminfo()
10487 mtx_lock(&sc->reg_lock); in sysctl_meminfo()
10592 (md++)->base = t4_read_reg(sc, A_SGE_DBQ_CTXT_BADDR); in sysctl_meminfo()
10593 (md++)->base = t4_read_reg(sc, A_SGE_IMSG_CTXT_BADDR); in sysctl_meminfo()
10594 (md++)->base = t4_read_reg(sc, A_SGE_FLM_CACHE_BADDR); in sysctl_meminfo()
10595 (md++)->base = t4_read_reg(sc, A_TP_CMM_TCB_BASE); in sysctl_meminfo()
10596 (md++)->base = t4_read_reg(sc, A_TP_CMM_MM_BASE); in sysctl_meminfo()
10597 (md++)->base = t4_read_reg(sc, A_TP_CMM_TIMER_BASE); in sysctl_meminfo()
10598 (md++)->base = t4_read_reg(sc, A_TP_CMM_MM_RX_FLST_BASE); in sysctl_meminfo()
10599 (md++)->base = t4_read_reg(sc, A_TP_CMM_MM_TX_FLST_BASE); in sysctl_meminfo()
10600 (md++)->base = t4_read_reg(sc, A_TP_CMM_MM_PS_FLST_BASE); in sysctl_meminfo()
10603 md->base = t4_read_reg(sc, A_TP_PMM_TX_BASE); in sysctl_meminfo()
10604 md->limit = md->base - 1 + in sysctl_meminfo()
10609 md->base = t4_read_reg(sc, A_TP_PMM_RX_BASE); in sysctl_meminfo()
10610 md->limit = md->base - 1 + in sysctl_meminfo()
10617 md->base = t4_read_reg(sc, A_LE_DB_HASH_TID_BASE); in sysctl_meminfo()
10619 md->base = t4_read_reg(sc, A_LE_DB_HASH_TBL_BASE_ADDR); in sysctl_meminfo()
10620 md->limit = 0; in sysctl_meminfo()
10622 md->base = 0; in sysctl_meminfo()
10623 md->idx = nitems(region); /* hide it */ in sysctl_meminfo()
10629 md->base = (uint64_t)t4_read_reg(sc, A_ULP_ ## reg ## _LLIMIT) << shift; \ in sysctl_meminfo()
10630 md->limit = (uint64_t)t4_read_reg(sc, A_ULP_ ## reg ## _ULIMIT) << shift; \ in sysctl_meminfo()
10631 md->limit += (1 << shift) - 1; \ in sysctl_meminfo()
10636 md->base = 0; \ in sysctl_meminfo()
10637 md->idx = nitems(region); \ in sysctl_meminfo()
10674 md->base = 0; in sysctl_meminfo()
10676 md->idx = nitems(region); in sysctl_meminfo()
10689 md->base = t4_read_reg(sc, A_SGE_DBVFIFO_BADDR); in sysctl_meminfo()
10690 md->limit = md->base + size - 1; in sysctl_meminfo()
10692 md->idx = nitems(region); in sysctl_meminfo()
10696 md->base = t4_read_reg(sc, A_ULP_RX_CTX_BASE); in sysctl_meminfo()
10697 md->limit = 0; in sysctl_meminfo()
10699 md->base = t4_read_reg(sc, A_ULP_TX_ERR_TABLE_BASE); in sysctl_meminfo()
10700 md->limit = 0; in sysctl_meminfo()
10705 md->base = lo; in sysctl_meminfo()
10707 md->base = 0; in sysctl_meminfo()
10708 md->idx = nitems(region); in sysctl_meminfo()
10712 md->base = sc->vres.ocq.start; in sysctl_meminfo()
10713 if (sc->vres.ocq.size) in sysctl_meminfo()
10714 md->limit = md->base + sc->vres.ocq.size - 1; in sysctl_meminfo()
10716 md->idx = nitems(region); /* hide it */ in sysctl_meminfo()
10719 /* add any address-space holes, there can be up to 3 */ in sysctl_meminfo()
10720 for (n = 0; n < i - 1; n++) in sysctl_meminfo()
10722 (md++)->base = avail[n].limit; in sysctl_meminfo()
10724 (md++)->base = avail[n].limit; in sysctl_meminfo()
10726 n = md - mem; in sysctl_meminfo()
10732 avail[lo].limit - 1); in sysctl_meminfo()
10739 mem[i].limit = i < n - 1 ? mem[i + 1].base - 1 : ~0; in sysctl_meminfo()
10745 hi = t4_read_reg(sc, A_CIM_SDRAM_ADDR_SIZE) + lo - 1; in sysctl_meminfo()
10746 if (hi != lo - 1) { in sysctl_meminfo()
10752 hi = t4_read_reg(sc, A_CIM_EXTMEM2_ADDR_SIZE) + lo - 1; in sysctl_meminfo()
10753 if (hi != lo - 1) in sysctl_meminfo()
10779 sbuf_printf(sb, "%u p-structs (%u free)\n", in sysctl_meminfo()
10799 for (i = 0; i < sc->chip_params->nchan; i++) { in sysctl_meminfo()
10817 mtx_unlock(&sc->reg_lock); in sysctl_meminfo()
10849 for (i = 0; i < sc->chip_params->mps_tcam_size; i++) { in sysctl_mps_tcam()
10854 mtx_lock(&sc->reg_lock); in sysctl_mps_tcam()
10861 mtx_unlock(&sc->reg_lock); in sysctl_mps_tcam()
10867 mtx_lock(&sc->reg_lock); in sysctl_mps_tcam()
10874 mtx_unlock(&sc->reg_lock); in sysctl_mps_tcam()
10882 (cls_lo & F_VF_VALID) ? G_VF(cls_lo) : -1); in sysctl_mps_tcam()
10904 rc = -t4_wr_mbox(sc, sc->mbox, &ldst_cmd, in sysctl_mps_tcam()
10952 for (i = 0; i < sc->chip_params->mps_tcam_size; i++) { in sysctl_mps_tcam_t6()
10963 ctl |= V_CTLTCAMINDEX(i - 256) | V_CTLTCAMSEL(1); in sysctl_mps_tcam_t6()
10964 mtx_lock(&sc->reg_lock); in sysctl_mps_tcam_t6()
10974 mtx_unlock(&sc->reg_lock); in sysctl_mps_tcam_t6()
10994 mtx_lock(&sc->reg_lock); in sysctl_mps_tcam_t6()
11004 mtx_unlock(&sc->reg_lock); in sysctl_mps_tcam_t6()
11019 mtx_lock(&sc->reg_lock); in sysctl_mps_tcam_t6()
11026 mtx_unlock(&sc->reg_lock); in sysctl_mps_tcam_t6()
11032 "%012jx %06x %06x - - %3c" in sysctl_mps_tcam_t6()
11038 cls_lo & F_T6_VF_VALID ? G_T6_VF(cls_lo) : -1); in sysctl_mps_tcam_t6()
11041 "%012jx - - ", i, addr[0], addr[1], in sysctl_mps_tcam_t6()
11048 sbuf_printf(sb, " - N "); in sysctl_mps_tcam_t6()
11050 sbuf_printf(sb, "- %3c %4x %3c %#x%4u%4d", in sysctl_mps_tcam_t6()
11054 cls_lo & F_T6_VF_VALID ? G_T6_VF(cls_lo) : -1); in sysctl_mps_tcam_t6()
11078 rc = -t4_wr_mbox(sc, sc->mbox, &ldst_cmd, in sysctl_mps_tcam_t6()
11132 for (i = 0; i < sc->chip_params->mps_tcam_size; i++) { in sysctl_mps_tcam_t7()
11145 ctl |= V_CTLTCAMINDEX(i - 256) | V_T7_CTLTCAMSEL(1); in sysctl_mps_tcam_t7()
11153 ctl |= V_CTLTCAMINDEX(i - 512) | V_T7_CTLTCAMSEL(1); in sysctl_mps_tcam_t7()
11155 ctl |= V_CTLTCAMINDEX(i - 1024) | V_T7_CTLTCAMSEL(2); in sysctl_mps_tcam_t7()
11158 mtx_lock(&sc->reg_lock); in sysctl_mps_tcam_t7()
11168 mtx_unlock(&sc->reg_lock); in sysctl_mps_tcam_t7()
11188 mtx_lock(&sc->reg_lock); in sysctl_mps_tcam_t7()
11198 mtx_unlock(&sc->reg_lock); in sysctl_mps_tcam_t7()
11213 mtx_lock(&sc->reg_lock); in sysctl_mps_tcam_t7()
11227 mtx_unlock(&sc->reg_lock); in sysctl_mps_tcam_t7()
11233 "%012jx %06x %06x - - %3c" in sysctl_mps_tcam_t7()
11239 cls_lo & F_T6_VF_VALID ? G_T6_VF(cls_lo) : -1); in sysctl_mps_tcam_t7()
11242 "%012jx - - ", i, addr[0], addr[1], in sysctl_mps_tcam_t7()
11249 sbuf_printf(sb, " - N "); in sysctl_mps_tcam_t7()
11251 sbuf_printf(sb, "- %3c %4x %3c %#x%4u%4d", in sysctl_mps_tcam_t7()
11255 cls_lo & F_T6_VF_VALID ? G_T6_VF(cls_lo) : -1); in sysctl_mps_tcam_t7()
11278 rc = -t4_wr_mbox(sc, sc->mbox, &ldst_cmd, in sysctl_mps_tcam_t7()
11322 mtx_lock(&sc->reg_lock); in sysctl_path_mtus()
11327 mtx_unlock(&sc->reg_lock); in sysctl_path_mtus()
11365 mtx_lock(&sc->reg_lock); in sysctl_pm_stats()
11374 mtx_unlock(&sc->reg_lock); in sysctl_pm_stats()
11384 sbuf_printf(sb, "\n%-13s %10u %20ju", tx_stats[i], tx_cnt[i], in sysctl_pm_stats()
11390 sbuf_printf(sb, "\n%-13s %10u %20ju", rx_stats[i], rx_cnt[i], in sysctl_pm_stats()
11397 sbuf_printf(sb, "\n%-13s %10u %20ju", tx_stats[i], tx_cnt[i], in sysctl_pm_stats()
11399 sbuf_printf(sb, "\n%-13s %10u %20ju", rx_stats[i], rx_cnt[i], in sysctl_pm_stats()
11407 sbuf_printf(sb, "\n%-13s %10u %20ju", tx_stats[i], tx_cnt[i], in sysctl_pm_stats()
11409 sbuf_printf(sb, "\n%-13s %10u %20ju", rx_stats[i], rx_cnt[i], in sysctl_pm_stats()
11416 sbuf_printf(sb, "%-40s %u\n", "ReqWrite", stats[i++]); in sysctl_pm_stats()
11417 sbuf_printf(sb, "%-40s %u\n", "ReqReadInv", stats[i++]); in sysctl_pm_stats()
11418 sbuf_printf(sb, "%-40s %u\n", "ReqReadNoInv", stats[i++]); in sysctl_pm_stats()
11419 sbuf_printf(sb, "%-40s %u\n", "Write Split Request", in sysctl_pm_stats()
11421 sbuf_printf(sb, "%-40s %u\n", in sysctl_pm_stats()
11423 sbuf_printf(sb, "%-40s %u\n", in sysctl_pm_stats()
11426 sbuf_printf(sb, "%-40s %u\n", "Write Hit", stats[i++]); in sysctl_pm_stats()
11427 sbuf_printf(sb, "%-40s %u\n", "Normal Read Hit", in sysctl_pm_stats()
11429 sbuf_printf(sb, "%-40s %u\n", "Feedback Read Hit", in sysctl_pm_stats()
11431 sbuf_printf(sb, "%-40s %u\n", "Normal Read Hit Full Avail", in sysctl_pm_stats()
11433 sbuf_printf(sb, "%-40s %u\n", "Normal Read Hit Full UnAvail", in sysctl_pm_stats()
11435 sbuf_printf(sb, "%-40s %u\n", in sysctl_pm_stats()
11436 "Normal Read Hit Partial Avail", in sysctl_pm_stats()
11438 sbuf_printf(sb, "%-40s %u\n", "FB Read Hit Full Avail", in sysctl_pm_stats()
11440 sbuf_printf(sb, "%-40s %u\n", "FB Read Hit Full UnAvail", in sysctl_pm_stats()
11442 sbuf_printf(sb, "%-40s %u\n", "FB Read Hit Partial Avail", in sysctl_pm_stats()
11444 sbuf_printf(sb, "%-40s %u\n", "Normal Read Full Free", in sysctl_pm_stats()
11446 sbuf_printf(sb, "%-40s %u\n", in sysctl_pm_stats()
11447 "Normal Read Part-avail Mul-Regions", in sysctl_pm_stats()
11449 sbuf_printf(sb, "%-40s %u\n", in sysctl_pm_stats()
11450 "FB Read Part-avail Mul-Regions", in sysctl_pm_stats()
11452 sbuf_printf(sb, "%-40s %u\n", "Write Miss FL Used", in sysctl_pm_stats()
11454 sbuf_printf(sb, "%-40s %u\n", "Write Miss LRU Used", in sysctl_pm_stats()
11456 sbuf_printf(sb, "%-40s %u\n", in sysctl_pm_stats()
11457 "Write Miss LRU-Multiple Evict", stats[i++]); in sysctl_pm_stats()
11458 sbuf_printf(sb, "%-40s %u\n", in sysctl_pm_stats()
11460 sbuf_printf(sb, "%-40s %u\n", in sysctl_pm_stats()
11462 sbuf_printf(sb, "%-40s %u\n", "Write Overflow Eviction", in sysctl_pm_stats()
11464 sbuf_printf(sb, "%-40s %u", "Read Overflow Eviction", in sysctl_pm_stats()
11483 mtx_lock(&sc->reg_lock); in sysctl_rdma_stats()
11488 mtx_unlock(&sc->reg_lock); in sysctl_rdma_stats()
11514 mtx_lock(&sc->reg_lock); in sysctl_tcp_stats()
11519 mtx_unlock(&sc->reg_lock); in sysctl_tcp_stats()
11551 struct tid_info *t = &sc->tids; in sysctl_tids()
11558 if (t->natids) { in sysctl_tids()
11559 sbuf_printf(sb, "ATID range: 0-%u, in use: %u\n", t->natids - 1, in sysctl_tids()
11560 t->atids_in_use); in sysctl_tids()
11563 if (t->nhpftids) { in sysctl_tids()
11564 sbuf_printf(sb, "HPFTID range: %u-%u, in use: %u\n", in sysctl_tids()
11565 t->hpftid_base, t->hpftid_end, t->hpftids_in_use); in sysctl_tids()
11568 if (t->ntids) { in sysctl_tids()
11571 mtx_lock(&sc->reg_lock); in sysctl_tids()
11584 mtx_unlock(&sc->reg_lock); in sysctl_tids()
11591 sbuf_printf(sb, "%u-%u, ", t->tid_base, x - 1); in sysctl_tids()
11592 sbuf_printf(sb, "%u-%u", y, t->ntids - 1); in sysctl_tids()
11594 sbuf_printf(sb, "%u-%u", t->tid_base, t->tid_base + in sysctl_tids()
11595 t->ntids - 1); in sysctl_tids()
11598 atomic_load_acq_int(&t->tids_in_use)); in sysctl_tids()
11601 if (t->nstids) { in sysctl_tids()
11602 sbuf_printf(sb, "STID range: %u-%u, in use: %u\n", t->stid_base, in sysctl_tids()
11603 t->stid_base + t->nstids - 1, t->stids_in_use); in sysctl_tids()
11606 if (t->nftids) { in sysctl_tids()
11607 sbuf_printf(sb, "FTID range: %u-%u, in use: %u\n", t->ftid_base, in sysctl_tids()
11608 t->ftid_end, t->ftids_in_use); in sysctl_tids()
11611 if (t->netids) { in sysctl_tids()
11612 sbuf_printf(sb, "ETID range: %u-%u, in use: %u\n", t->etid_base, in sysctl_tids()
11613 t->etid_base + t->netids - 1, t->etids_in_use); in sysctl_tids()
11616 mtx_lock(&sc->reg_lock); in sysctl_tids()
11623 mtx_unlock(&sc->reg_lock); in sysctl_tids()
11646 mtx_lock(&sc->reg_lock); in sysctl_tp_err_stats()
11651 mtx_unlock(&sc->reg_lock); in sysctl_tp_err_stats()
11659 if (sc->chip_params->nchan > 2) { in sysctl_tp_err_stats()
11724 mtx_lock(&sc->reg_lock); in sysctl_tnl_stats()
11729 mtx_unlock(&sc->reg_lock); in sysctl_tnl_stats()
11737 if (sc->chip_params->nchan > 2) { in sysctl_tnl_stats()
11764 struct tp_params *tpp = &sc->params.tp; in sysctl_tp_la_mask()
11768 mask = tpp->la_mask >> 16; in sysctl_tp_la_mask()
11770 if (rc != 0 || req->newptr == NULL) in sysctl_tp_la_mask()
11774 mtx_lock(&sc->reg_lock); in sysctl_tp_la_mask()
11778 tpp->la_mask = mask << 16; in sysctl_tp_la_mask()
11780 tpp->la_mask); in sysctl_tp_la_mask()
11782 mtx_unlock(&sc->reg_lock); in sysctl_tp_la_mask()
11799 while (f->name) { in field_desc_show()
11800 uint64_t mask = (1ULL << f->width) - 1; in field_desc_show()
11801 int len = snprintf(buf, sizeof(buf), "%s: %ju", f->name, in field_desc_show()
11802 ((uintmax_t)v >> f->start) & mask); in field_desc_show()
11962 if (idx < (TPLA_SIZE / 2 - 1) || p[1] != ~0ULL) in tp_la_show2()
11973 if (idx < (TPLA_SIZE / 2 - 1) || p[1] != ~0ULL) in tp_la_show3()
11994 mtx_lock(&sc->reg_lock); in sysctl_tp_la()
12013 mtx_unlock(&sc->reg_lock); in sysctl_tp_la()
12036 mtx_lock(&sc->reg_lock); in sysctl_tx_rate()
12041 mtx_unlock(&sc->reg_lock); in sysctl_tx_rate()
12049 if (sc->chip_params->nchan > 2) { in sysctl_tx_rate()
12086 mtx_lock(&sc->reg_lock); in sysctl_ulprx_la()
12091 mtx_unlock(&sc->reg_lock); in sysctl_ulprx_la()
12120 mtx_lock(&sc->reg_lock); in sysctl_wcwr_stats()
12128 mtx_unlock(&sc->reg_lock); in sysctl_wcwr_stats()
12165 rc = bus_get_cpus(sc->dev, op, sizeof(cpuset), &cpuset); in sysctl_cpus()
12188 val = atomic_load_int(&sc->num_resets); in sysctl_reset()
12190 if (rc != 0 || req->newptr == NULL) in sysctl_reset()
12195 atomic_store_int(&sc->num_resets, 0); in sysctl_reset()
12205 taskqueue_enqueue(reset_tq, &sc->reset_task); in sysctl_reset()
12217 v = sc->tt.tls; in sysctl_tls()
12219 if (rc != 0 || req->newptr == NULL) in sysctl_tls()
12222 if (v != 0 && !(sc->cryptocaps & FW_CAPS_CONFIG_TLSKEYS)) in sysctl_tls()
12231 sc->tt.tls = !!v; in sysctl_tls()
12233 for_each_vi(sc->port[i], j, vi) { in sysctl_tls()
12234 if (vi->flags & VI_INIT_DONE) in sysctl_tls()
12235 t4_update_fl_bufsize(vi->ifp); in sysctl_tls()
12265 u_int cclk_ps = 1000000000 / sc->params.vpd.cclk; in sysctl_tp_tick()
12267 mtx_lock(&sc->reg_lock); in sysctl_tp_tick()
12269 res = (u_int)-1; in sysctl_tp_tick()
12272 mtx_unlock(&sc->reg_lock); in sysctl_tp_tick()
12273 if (res == (u_int)-1) in sysctl_tp_tick()
12304 u_int cclk_ps = 1000000000 / sc->params.vpd.cclk; in sysctl_tp_dack_timer()
12306 mtx_lock(&sc->reg_lock); in sysctl_tp_dack_timer()
12315 mtx_unlock(&sc->reg_lock); in sysctl_tp_dack_timer()
12331 u_int cclk_ps = 1000000000 / sc->params.vpd.cclk; in sysctl_tp_timer()
12338 mtx_lock(&sc->reg_lock); in sysctl_tp_timer()
12350 mtx_unlock(&sc->reg_lock); in sysctl_tp_timer()
12370 mtx_lock(&sc->reg_lock); in sysctl_tp_shift_cnt()
12377 mtx_unlock(&sc->reg_lock); in sysctl_tp_shift_cnt()
12395 mtx_lock(&sc->reg_lock); in sysctl_tp_backoff()
12402 mtx_unlock(&sc->reg_lock); in sysctl_tp_backoff()
12413 struct adapter *sc = vi->adapter; in sysctl_holdoff_tmr_idx_ofld()
12418 idx = vi->ofld_tmr_idx; in sysctl_holdoff_tmr_idx_ofld()
12421 if (rc != 0 || req->newptr == NULL) in sysctl_holdoff_tmr_idx_ofld()
12432 v = V_QINTR_TIMER_IDX(idx) | V_QINTR_CNT_EN(vi->ofld_pktc_idx != -1); in sysctl_holdoff_tmr_idx_ofld()
12435 atomic_store_rel_8(&ofld_rxq->iq.intr_params, v); in sysctl_holdoff_tmr_idx_ofld()
12437 ofld_rxq->iq.intr_params = v; in sysctl_holdoff_tmr_idx_ofld()
12440 vi->ofld_tmr_idx = idx; in sysctl_holdoff_tmr_idx_ofld()
12450 struct adapter *sc = vi->adapter; in sysctl_holdoff_pktc_idx_ofld()
12453 idx = vi->ofld_pktc_idx; in sysctl_holdoff_pktc_idx_ofld()
12456 if (rc != 0 || req->newptr == NULL) in sysctl_holdoff_pktc_idx_ofld()
12459 if (idx < -1 || idx >= SGE_NCOUNTERS) in sysctl_holdoff_pktc_idx_ofld()
12467 if (vi->flags & VI_INIT_DONE) in sysctl_holdoff_pktc_idx_ofld()
12470 vi->ofld_pktc_idx = idx; in sysctl_holdoff_pktc_idx_ofld()
12483 if (len < sc->chip_params->sge_ctxt_size) in get_sge_context()
12500 if (sc->flags & FW_OK) { in get_sge_context()
12501 rc = -t4_sge_ctxt_rd(sc, sc->mbox, cid, mem_id, data); in get_sge_context()
12510 rc = -t4_sge_ctxt_rd_bd(sc, cid, mem_id, data); in get_sge_context()
12537 if (sc->flags & FULL_INIT_DONE && in load_fw()
12538 (sc->debug_flags & DF_LOAD_FW_ANYTIME) == 0) { in load_fw()
12543 fw_data = malloc(fw->len, M_CXGBE, M_WAITOK); in load_fw()
12545 rc = copyin(fw->data, fw_data, fw->len); in load_fw()
12547 rc = -t4_load_fw(sc, fw_data, fw->len); in load_fw()
12570 if (cfg->len == 0) { in load_cfg()
12572 rc = -t4_load_cfg(sc, NULL, 0); in load_cfg()
12576 cfg_data = malloc(cfg->len, M_CXGBE, M_WAITOK); in load_cfg()
12578 rc = copyin(cfg->data, cfg_data, cfg->len); in load_cfg()
12580 rc = -t4_load_cfg(sc, cfg_data, cfg->len); in load_cfg()
12595 if (br->len > 1024 * 1024) in load_boot()
12598 if (br->pf_offset == 0) { in load_boot()
12600 if (br->pfidx_addr > 7) in load_boot()
12602 offset = G_OFFSET(t4_read_reg(sc, PF_REG(br->pfidx_addr, in load_boot()
12604 } else if (br->pf_offset == 1) { in load_boot()
12606 offset = G_OFFSET(br->pfidx_addr); in load_boot()
12620 if (br->len == 0) { in load_boot()
12622 rc = -t4_load_boot(sc, NULL, offset, 0); in load_boot()
12626 br_data = malloc(br->len, M_CXGBE, M_WAITOK); in load_boot()
12628 rc = copyin(br->data, br_data, br->len); in load_boot()
12630 rc = -t4_load_boot(sc, br_data, offset, br->len); in load_boot()
12653 if (bc->len == 0) { in load_bootcfg()
12655 rc = -t4_load_bootcfg(sc, NULL, 0); in load_bootcfg()
12659 bc_data = malloc(bc->len, M_CXGBE, M_WAITOK); in load_bootcfg()
12661 rc = copyin(bc->data, bc_data, bc->len); in load_bootcfg()
12663 rc = -t4_load_bootcfg(sc, bc_data, bc->len); in load_bootcfg()
12679 buf = malloc(dump->len, M_CXGBE, M_NOWAIT | M_ZERO); in cudbg_dump()
12690 cudbg->adap = sc; in cudbg_dump()
12691 cudbg->print = (cudbg_print_cb)printf; in cudbg_dump()
12694 device_printf(sc->dev, "%s: wr_flash %u, len %u, data %p.\n", in cudbg_dump()
12695 __func__, dump->wr_flash, dump->len, dump->data); in cudbg_dump()
12698 if (dump->wr_flash) in cudbg_dump()
12699 cudbg->use_flash = 1; in cudbg_dump()
12700 MPASS(sizeof(cudbg->dbg_bitmap) == sizeof(dump->bitmap)); in cudbg_dump()
12701 memcpy(cudbg->dbg_bitmap, dump->bitmap, sizeof(cudbg->dbg_bitmap)); in cudbg_dump()
12703 rc = cudbg_collect(handle, buf, &dump->len); in cudbg_dump()
12707 rc = copyout(buf, dump->data, dump->len); in cudbg_dump()
12723 r = &op->rule[0]; in free_offload_policy()
12724 for (i = 0; i < op->nrules; i++, r++) { in free_offload_policy()
12725 free(r->bpf_prog.bf_insns, M_CXGBE); in free_offload_policy()
12727 free(op->rule, M_CXGBE); in free_offload_policy()
12744 if (uop->nrules == 0) { in set_offload_policy()
12748 } else if (uop->nrules > 256) { /* arbitrary */ in set_offload_policy()
12754 op->nrules = uop->nrules; in set_offload_policy()
12755 len = op->nrules * sizeof(struct offload_rule); in set_offload_policy()
12756 op->rule = malloc(len, M_CXGBE, M_ZERO | M_WAITOK); in set_offload_policy()
12757 rc = copyin(uop->rule, op->rule, len); in set_offload_policy()
12759 free(op->rule, M_CXGBE); in set_offload_policy()
12764 r = &op->rule[0]; in set_offload_policy()
12765 for (i = 0; i < op->nrules; i++, r++) { in set_offload_policy()
12768 if (r->open_type != OPEN_TYPE_LISTEN && in set_offload_policy()
12769 r->open_type != OPEN_TYPE_ACTIVE && in set_offload_policy()
12770 r->open_type != OPEN_TYPE_PASSIVE && in set_offload_policy()
12771 r->open_type != OPEN_TYPE_DONTCARE) { in set_offload_policy()
12778 op->nrules = i; in set_offload_policy()
12784 s = &r->settings; in set_offload_policy()
12785 if ((s->offload != 0 && s->offload != 1) || in set_offload_policy()
12786 s->cong_algo < -1 || s->cong_algo > CONG_ALG_HIGHSPEED || in set_offload_policy()
12787 s->sched_class < -1 || in set_offload_policy()
12788 s->sched_class >= sc->params.nsched_cls) { in set_offload_policy()
12793 bf = &r->bpf_prog; in set_offload_policy()
12794 u = bf->bf_insns; /* userspace ptr */ in set_offload_policy()
12795 bf->bf_insns = NULL; in set_offload_policy()
12796 if (bf->bf_len == 0) { in set_offload_policy()
12800 len = bf->bf_len * sizeof(*bf->bf_insns); in set_offload_policy()
12801 bf->bf_insns = malloc(len, M_CXGBE, M_ZERO | M_WAITOK); in set_offload_policy()
12802 rc = copyin(u, bf->bf_insns, len); in set_offload_policy()
12806 if (!bpf_validate(bf->bf_insns, bf->bf_len)) { in set_offload_policy()
12812 rw_wlock(&sc->policy_lock); in set_offload_policy()
12813 old = sc->policy; in set_offload_policy()
12814 sc->policy = op; in set_offload_policy()
12815 rw_wunlock(&sc->policy_lock); in set_offload_policy()
12830 mtx_lock(&sc->reg_lock); in read_card_mem()
12834 rc = validate_mem_range(sc, mr->addr, mr->len); in read_card_mem()
12835 mtx_unlock(&sc->reg_lock); in read_card_mem()
12839 buf = malloc(min(mr->len, MAX_READ_BUF_SIZE), M_CXGBE, M_WAITOK); in read_card_mem()
12840 addr = mr->addr; in read_card_mem()
12841 remaining = mr->len; in read_card_mem()
12842 dst = (void *)mr->data; in read_card_mem()
12846 mtx_lock(&sc->reg_lock); in read_card_mem()
12851 mtx_unlock(&sc->reg_lock); in read_card_mem()
12860 remaining -= n; in read_card_mem()
12874 if (i2cd->len == 0 || i2cd->port_id >= sc->params.nports) in read_i2c()
12877 if (i2cd->len > sizeof(i2cd->data)) in read_i2c()
12886 rc = -t4_i2c_rd(sc, sc->mbox, i2cd->port_id, i2cd->dev_addr, in read_i2c()
12887 i2cd->offset, i2cd->len, &i2cd->data[0]); in read_i2c()
12909 if (port_id >= sc->params.nports) in clear_stats()
12911 pi = sc->port[port_id]; in clear_stats()
12915 mtx_lock(&sc->reg_lock); in clear_stats()
12918 t4_clr_port_stats(sc, pi->hw_port); in clear_stats()
12920 if (pi->fcs_reg != -1) in clear_stats()
12921 pi->fcs_base = t4_read_reg64(sc, in clear_stats()
12922 t4_port_reg(sc, pi->tx_chan, pi->fcs_reg)); in clear_stats()
12924 pi->stats.rx_fcs_err = 0; in clear_stats()
12927 if (vi->flags & VI_INIT_DONE) in clear_stats()
12928 t4_clr_vi_stats(sc, vi->vin); in clear_stats()
12930 chan_map = pi->rx_e_chan_map; in clear_stats()
12933 i = ffs(chan_map) - 1; in clear_stats()
12939 mtx_unlock(&sc->reg_lock); in clear_stats()
12940 pi->tx_parse_error = 0; in clear_stats()
12941 pi->tnl_cong_drops = 0; in clear_stats()
12948 if (vi->flags & VI_INIT_DONE) { in clear_stats()
12952 rxq->lro.lro_queued = 0; in clear_stats()
12953 rxq->lro.lro_flushed = 0; in clear_stats()
12955 rxq->rxcsum = 0; in clear_stats()
12956 rxq->vlan_extraction = 0; in clear_stats()
12957 rxq->vxlan_rxcsum = 0; in clear_stats()
12959 rxq->fl.cl_allocated = 0; in clear_stats()
12960 rxq->fl.cl_recycled = 0; in clear_stats()
12961 rxq->fl.cl_fast_recycled = 0; in clear_stats()
12965 txq->txcsum = 0; in clear_stats()
12966 txq->tso_wrs = 0; in clear_stats()
12967 txq->vlan_insertion = 0; in clear_stats()
12968 txq->imm_wrs = 0; in clear_stats()
12969 txq->sgl_wrs = 0; in clear_stats()
12970 txq->txpkt_wrs = 0; in clear_stats()
12971 txq->txpkts0_wrs = 0; in clear_stats()
12972 txq->txpkts1_wrs = 0; in clear_stats()
12973 txq->txpkts0_pkts = 0; in clear_stats()
12974 txq->txpkts1_pkts = 0; in clear_stats()
12975 txq->txpkts_flush = 0; in clear_stats()
12976 txq->raw_wrs = 0; in clear_stats()
12977 txq->vxlan_tso_wrs = 0; in clear_stats()
12978 txq->vxlan_txcsum = 0; in clear_stats()
12979 txq->kern_tls_records = 0; in clear_stats()
12980 txq->kern_tls_short = 0; in clear_stats()
12981 txq->kern_tls_partial = 0; in clear_stats()
12982 txq->kern_tls_full = 0; in clear_stats()
12983 txq->kern_tls_octets = 0; in clear_stats()
12984 txq->kern_tls_waste = 0; in clear_stats()
12985 txq->kern_tls_header = 0; in clear_stats()
12986 txq->kern_tls_fin_short = 0; in clear_stats()
12987 txq->kern_tls_cbc = 0; in clear_stats()
12988 txq->kern_tls_gcm = 0; in clear_stats()
12990 txq->kern_tls_options = 0; in clear_stats()
12991 txq->kern_tls_fin = 0; in clear_stats()
12993 txq->kern_tls_ghash_received = 0; in clear_stats()
12994 txq->kern_tls_ghash_requested = 0; in clear_stats()
12995 txq->kern_tls_lso = 0; in clear_stats()
12996 txq->kern_tls_partial_ghash = 0; in clear_stats()
12997 txq->kern_tls_splitmode = 0; in clear_stats()
12998 txq->kern_tls_trailer = 0; in clear_stats()
13000 mp_ring_reset_stats(txq->r); in clear_stats()
13005 ofld_txq->wrq.tx_wrs_direct = 0; in clear_stats()
13006 ofld_txq->wrq.tx_wrs_copied = 0; in clear_stats()
13007 counter_u64_zero(ofld_txq->tx_iscsi_pdus); in clear_stats()
13008 counter_u64_zero(ofld_txq->tx_iscsi_octets); in clear_stats()
13009 counter_u64_zero(ofld_txq->tx_iscsi_iso_wrs); in clear_stats()
13010 counter_u64_zero(ofld_txq->tx_nvme_pdus); in clear_stats()
13011 counter_u64_zero(ofld_txq->tx_nvme_octets); in clear_stats()
13012 counter_u64_zero(ofld_txq->tx_nvme_iso_wrs); in clear_stats()
13013 counter_u64_zero(ofld_txq->tx_aio_jobs); in clear_stats()
13014 counter_u64_zero(ofld_txq->tx_aio_octets); in clear_stats()
13015 counter_u64_zero(ofld_txq->tx_toe_tls_records); in clear_stats()
13016 counter_u64_zero(ofld_txq->tx_toe_tls_octets); in clear_stats()
13021 ofld_rxq->fl.cl_allocated = 0; in clear_stats()
13022 ofld_rxq->fl.cl_recycled = 0; in clear_stats()
13023 ofld_rxq->fl.cl_fast_recycled = 0; in clear_stats()
13025 ofld_rxq->rx_iscsi_ddp_setup_ok); in clear_stats()
13027 ofld_rxq->rx_iscsi_ddp_setup_error); in clear_stats()
13028 ofld_rxq->rx_iscsi_ddp_pdus = 0; in clear_stats()
13029 ofld_rxq->rx_iscsi_ddp_octets = 0; in clear_stats()
13030 ofld_rxq->rx_iscsi_fl_pdus = 0; in clear_stats()
13031 ofld_rxq->rx_iscsi_fl_octets = 0; in clear_stats()
13033 ofld_rxq->rx_nvme_ddp_setup_ok); in clear_stats()
13035 ofld_rxq->rx_nvme_ddp_setup_no_stag); in clear_stats()
13037 ofld_rxq->rx_nvme_ddp_setup_error); in clear_stats()
13038 counter_u64_zero(ofld_rxq->rx_nvme_ddp_pdus); in clear_stats()
13039 counter_u64_zero(ofld_rxq->rx_nvme_ddp_octets); in clear_stats()
13040 counter_u64_zero(ofld_rxq->rx_nvme_fl_pdus); in clear_stats()
13041 counter_u64_zero(ofld_rxq->rx_nvme_fl_octets); in clear_stats()
13043 ofld_rxq->rx_nvme_invalid_headers); in clear_stats()
13045 ofld_rxq->rx_nvme_header_digest_errors); in clear_stats()
13047 ofld_rxq->rx_nvme_data_digest_errors); in clear_stats()
13048 ofld_rxq->rx_aio_ddp_jobs = 0; in clear_stats()
13049 ofld_rxq->rx_aio_ddp_octets = 0; in clear_stats()
13050 ofld_rxq->rx_toe_tls_records = 0; in clear_stats()
13051 ofld_rxq->rx_toe_tls_octets = 0; in clear_stats()
13052 ofld_rxq->rx_toe_ddp_octets = 0; in clear_stats()
13053 counter_u64_zero(ofld_rxq->ddp_buffer_alloc); in clear_stats()
13054 counter_u64_zero(ofld_rxq->ddp_buffer_reuse); in clear_stats()
13055 counter_u64_zero(ofld_rxq->ddp_buffer_free); in clear_stats()
13060 wrq = &sc->sge.ctrlq[pi->port_id]; in clear_stats()
13061 wrq->tx_wrs_direct = 0; in clear_stats()
13062 wrq->tx_wrs_copied = 0; in clear_stats()
13076 bcopy(&ca->addr[0], &in6.s6_addr[0], sizeof(in6.s6_addr)); in hold_clip_addr()
13092 bcopy(&ca->addr[0], &in6.s6_addr[0], sizeof(in6.s6_addr)); in release_clip_addr()
13104 return (pci_find_cap(sc->dev, cap, &i) == 0 ? i : 0); in t4_os_find_pci_capability()
13110 struct adapter *sc = pi->adapter; in t4_os_portmod_changed()
13118 KASSERT((pi->flags & FIXED_IFMEDIA) == 0, in t4_os_portmod_changed()
13119 ("%s: port_type %u", __func__, pi->port_type)); in t4_os_portmod_changed()
13121 vi = &pi->vi[0]; in t4_os_portmod_changed()
13125 if (pi->mod_type != FW_PORT_MOD_TYPE_NONE) { in t4_os_portmod_changed()
13133 ifp = vi->ifp; in t4_os_portmod_changed()
13134 if (pi->mod_type == FW_PORT_MOD_TYPE_NONE) in t4_os_portmod_changed()
13136 else if (pi->mod_type == FW_PORT_MOD_TYPE_UNKNOWN) in t4_os_portmod_changed()
13138 else if (pi->mod_type == FW_PORT_MOD_TYPE_NOTSUPPORTED) in t4_os_portmod_changed()
13140 else if (pi->mod_type > 0 && pi->mod_type < nitems(mod_str)) { in t4_os_portmod_changed()
13142 port_top_speed(pi), mod_str[pi->mod_type]); in t4_os_portmod_changed()
13145 pi->mod_type); in t4_os_portmod_changed()
13154 struct link_config *lc = &pi->link_cfg; in t4_os_link_changed()
13155 struct adapter *sc = pi->adapter; in t4_os_link_changed()
13161 if (lc->link_ok) { in t4_os_link_changed()
13162 if (lc->speed > 25000 || in t4_os_link_changed()
13163 (lc->speed == 25000 && lc->fec == FEC_RS)) in t4_os_link_changed()
13164 pi->fcs_reg = A_MAC_PORT_AFRAMECHECKSEQUENCEERRORS; in t4_os_link_changed()
13166 pi->fcs_reg = A_MAC_PORT_MTIP_1G10G_RX_CRCERRORS; in t4_os_link_changed()
13167 pi->fcs_base = t4_read_reg64(sc, in t4_os_link_changed()
13168 t4_port_reg(sc, pi->tx_chan, pi->fcs_reg)); in t4_os_link_changed()
13169 pi->stats.rx_fcs_err = 0; in t4_os_link_changed()
13171 pi->fcs_reg = -1; in t4_os_link_changed()
13174 MPASS(pi->fcs_reg != -1); in t4_os_link_changed()
13175 MPASS(pi->fcs_base == 0); in t4_os_link_changed()
13179 ifp = vi->ifp; in t4_os_link_changed()
13183 if (lc->link_ok) { in t4_os_link_changed()
13184 if_setbaudrate(ifp, IF_Mbps(lc->speed)); in t4_os_link_changed()
13201 * in - the only guarantee is that sc->sc_lock is a valid lock. in t4_iterate()
13213 struct adapter *sc = dev->si_drv1; in t4_ioctl()
13223 if ((edata->addr & 0x3) != 0 || edata->addr >= sc->mmio_len) in t4_ioctl()
13226 mtx_lock(&sc->reg_lock); in t4_ioctl()
13229 else if (edata->size == 4) in t4_ioctl()
13230 edata->val = t4_read_reg(sc, edata->addr); in t4_ioctl()
13231 else if (edata->size == 8) in t4_ioctl()
13232 edata->val = t4_read_reg64(sc, edata->addr); in t4_ioctl()
13235 mtx_unlock(&sc->reg_lock); in t4_ioctl()
13242 if ((edata->addr & 0x3) != 0 || edata->addr >= sc->mmio_len) in t4_ioctl()
13245 mtx_lock(&sc->reg_lock); in t4_ioctl()
13248 else if (edata->size == 4) { in t4_ioctl()
13249 if (edata->val & 0xffffffff00000000) in t4_ioctl()
13251 t4_write_reg(sc, edata->addr, (uint32_t) edata->val); in t4_ioctl()
13252 } else if (edata->size == 8) in t4_ioctl()
13253 t4_write_reg64(sc, edata->addr, edata->val); in t4_ioctl()
13256 mtx_unlock(&sc->reg_lock); in t4_ioctl()
13265 if (regs->len < reglen) { in t4_ioctl()
13266 regs->len = reglen; /* hint to the caller */ in t4_ioctl()
13270 regs->len = reglen; in t4_ioctl()
13272 mtx_lock(&sc->reg_lock); in t4_ioctl()
13277 mtx_unlock(&sc->reg_lock); in t4_ioctl()
13279 rc = copyout(buf, regs->data, reglen); in t4_ioctl()
13304 rc = get_sge_context(sc, ctxt->mem_id, ctxt->cid, in t4_ioctl()
13305 sizeof(ctxt->data), &ctxt->data[0]); in t4_ioctl()
13356 rc = get_sge_context(sc, ctxt->mem_id, ctxt->cid, in t4_ioctl()
13357 sizeof(ctxt->data), &ctxt->data[0]); in t4_ioctl()
13372 struct port_info *pi = vi->pi; in toe_capability()
13373 struct adapter *sc = pi->adapter; in toe_capability()
13384 if (sc->flags & KERN_TLS_ON && is_t6(sc)) { in toe_capability()
13395 p = sc->port[i]; in toe_capability()
13397 if (if_getcapenable(v->ifp) & IFCAP_TXTLS) { in toe_capability()
13400 device_get_nameunit(v->dev)); in toe_capability()
13416 if ((if_getcapenable(vi->ifp) & IFCAP_TOE) != 0) { in toe_capability()
13426 if (!(vi->flags & VI_INIT_DONE) && ((rc = vi_init(vi)) != 0)) in toe_capability()
13428 if (!(pi->vi[0].flags & VI_INIT_DONE) && in toe_capability()
13429 ((rc = vi_init(&pi->vi[0])) != 0)) in toe_capability()
13432 if (isset(&sc->offload_map, pi->port_id)) { in toe_capability()
13434 MPASS(pi->uld_vis > 0); in toe_capability()
13435 pi->uld_vis++; in toe_capability()
13448 KASSERT(sc->tom_softc != NULL, in toe_capability()
13465 if (pi->uld_vis++ == 0) in toe_capability()
13466 setbit(&sc->offload_map, pi->port_id); in toe_capability()
13468 if ((if_getcapenable(vi->ifp) & IFCAP_TOE) == 0) { in toe_capability()
13472 MPASS(isset(&sc->offload_map, pi->port_id)); in toe_capability()
13473 MPASS(pi->uld_vis > 0); in toe_capability()
13474 if (--pi->uld_vis == 0) in toe_capability()
13475 clrbit(&sc->offload_map, pi->port_id); in toe_capability()
13526 if (!(sc->flags & FULL_INIT_DONE)) { in t4_activate_uld()
13536 rc = t4_uld_list[id]->uld_activate(sc); in t4_activate_uld()
13538 setbit(&sc->active_ulds, id); in t4_activate_uld()
13559 rc = t4_uld_list[id]->uld_deactivate(sc); in t4_deactivate_uld()
13561 clrbit(&sc->active_ulds, id); in t4_deactivate_uld()
13580 rc = t4_uld_list[i]->uld_deactivate(sc); in deactivate_all_uld()
13583 clrbit(&sc->active_ulds, i); in deactivate_all_uld()
13601 t4_uld_list[i]->uld_stop == NULL) in stop_all_uld()
13603 (void) t4_uld_list[i]->uld_stop(sc); in stop_all_uld()
13619 t4_uld_list[i]->uld_restart == NULL) in restart_all_uld()
13621 (void) t4_uld_list[i]->uld_restart(sc); in restart_all_uld()
13633 return (isset(&sc->active_ulds, id)); in uld_active()
13651 if (sc->flags & KERN_TLS_ON) in ktls_capability()
13653 if (sc->offload_map != 0) { in ktls_capability()
13682 nq = *t < 0 ? -*t : c; in calculate_nqueues()
13725 if (t4_toecaps_allowed == -1) in tweak_tunables()
13728 if (t4_toecaps_allowed == -1) in tweak_tunables()
13733 if (t4_rdmacaps_allowed == -1) { in tweak_tunables()
13738 if (t4_iscsicaps_allowed == -1) { in tweak_tunables()
13744 if (t4_nvmecaps_allowed == -1) in tweak_tunables()
13750 if (t4_pktc_idx_ofld < -1 || t4_pktc_idx_ofld >= SGE_NCOUNTERS) in tweak_tunables()
13753 if (t4_rdmacaps_allowed == -1) in tweak_tunables()
13756 if (t4_iscsicaps_allowed == -1) in tweak_tunables()
13759 if (t4_nvmecaps_allowed == -1) in tweak_tunables()
13773 if (t4_pktc_idx < -1 || t4_pktc_idx >= SGE_NCOUNTERS) in tweak_tunables()
13787 * Number of VIs to create per-port. The first VI is the "main" regular in tweak_tunables()
13821 base = sc->memwin[2].mw_base; in t4_dump_mem()
13827 pf = V_PFNUM(sc->pf); in t4_dump_mem()
13830 off = addr - win_pos; in t4_dump_mem()
13847 len -= sizeof(buf); in t4_dump_mem()
13868 struct devlog_params *dparams = &sc->params.devlog; in t4_dump_devlog()
13873 if (dparams->start == 0) { in t4_dump_devlog()
13878 nentries = dparams->size / sizeof(struct fw_devlog_e); in t4_dump_devlog()
13879 m = fwmtype_to_hwmtype(dparams->memtype); in t4_dump_devlog()
13882 first = -1; in t4_dump_devlog()
13884 rc = -t4_mem_read(sc, m, dparams->start + i * sizeof(e), in t4_dump_devlog()
13899 if (first == -1) in t4_dump_devlog()
13904 rc = -t4_mem_read(sc, m, dparams->start + i * sizeof(e), in t4_dump_devlog()
14060 t4_write_reg(sc, A_MPS_RX_VXLAN_TYPE, V_VXLAN(sc->vxlan_port) | in enable_vxlan_rx()
14063 pi = sc->port[i]; in enable_vxlan_rx()
14064 if (pi->vxlan_tcam_entry == true) in enable_vxlan_rx()
14066 rc = t4_alloc_raw_mac_filt(sc, pi->vi[0].viid, match_all_mac, in enable_vxlan_rx()
14067 match_all_mac, sc->rawf_base + pi->port_id, 1, pi->port_id, in enable_vxlan_rx()
14070 rc = -rc; in enable_vxlan_rx()
14071 CH_ERR(&pi->vi[0], in enable_vxlan_rx()
14074 MPASS(rc == sc->rawf_base + pi->port_id); in enable_vxlan_rx()
14075 pi->vxlan_tcam_entry = true; in enable_vxlan_rx()
14085 if (sc->nrawf == 0 || chip_id(sc) <= CHELSIO_T5) in t4_vxlan_start()
14090 if (sc->vxlan_refcount == 0) { in t4_vxlan_start()
14091 sc->vxlan_port = v->port; in t4_vxlan_start()
14092 sc->vxlan_refcount = 1; in t4_vxlan_start()
14095 } else if (sc->vxlan_port == v->port) { in t4_vxlan_start()
14096 sc->vxlan_refcount++; in t4_vxlan_start()
14100 sc->vxlan_port, v->port); in t4_vxlan_start()
14110 if (sc->nrawf == 0 || chip_id(sc) <= CHELSIO_T5) in t4_vxlan_stop()
14120 if (sc->vxlan_port != v->port) in t4_vxlan_stop()
14122 if (sc->vxlan_refcount == 0) { in t4_vxlan_stop()
14124 "ignoring attempt to stop it again.\n", sc->vxlan_port); in t4_vxlan_stop()
14125 } else if (--sc->vxlan_refcount == 0 && !hw_off_limits(sc)) in t4_vxlan_stop()
14219 if (--loaded == 0) { in mod_event()