Lines Matching +full:ulp +full:- +full:allow

3 # Copyright (C) 2014-2015 Chelsio Communications.  All rights reserved.
6 #   WILL RESULT IN A NON-FUNCTIONAL ADAPTER AND MAY RESULT IN PHYSICAL DAMAGE
10 # This file provides the default, power-on configuration for 2-port T6-based
25 #  4. MSI-X Vectors: 1088.
26 #  5. Multi-Port Support (MPS) TCAM: 336 entries to support MAC destination
34 #     functions for ports 0-1 on PF0-1, FCoE on PF4, iSCSI on PF5, etc.
39 #     Ingress Queues and MSI-X Vectors to allow up to some number of CPUs
47 #         16 Ingress Queue/MSI-X Vectors per application function
49 #     for a total of 96 Ingress Queues and MSI-X Vectors on the Unified PF.
52 #  9. Some customers will want to use PCI-E SR-IOV Capability to allow Virtual
53 #     Machines to directly access T6 functionality via SR-IOV Virtual Functions
54 #     and "PCI Device Passthrough" -- this is especially true for the NIC
172 					     # ulp insert pi source info in DIF
178 						# ulp insert pi source info in
188 # NMSIX = 1088			# available MSI-X Vectors
199 # Each Ingress Queue can use one MSI-X interrupt but some Ingress Queues can
203 # Thus, the number of MSI-X Vectors assigned to the Unified PF will be less
211 # NMSIX_NIC = 32		# NIC MSI-X Interrupt Vectors (FLIQ)
218 # NMSIX_OFLD = 16		# Offload MSI-X Interrupt Vectors (FLIQ)
225 # NMSIX_RDMA = 4		# RDMA MSI-X Interrupt Vectors (FLIQ)
236 # NMSIX_ISCSI = 4		# ISCSI MSI-X Interrupt Vectors (FLIQ)
243 # NMSIX_FCOE = 34		# FCOE MSI-X Interrupt Vectors (FLIQ)
273 # The sum of all the MSI-X resources above is 74 MSI-X Vectors but we'll round
278 # The Storage PFs could need up to NPORTS*NCPUS + NMSIX_EXTRA MSI-X Vectors
284 # associated with it.  Thus, the MSI-X Vector allocations we give to the
287 # one of PF0-1.
290 # All of the below PCI-E parameters are actually stored in various *_init.txt
293 # For PF0-1 we assign 8 vectors each for NIC Ingress Queues of the associated
294 # ports 0-1.
296 # For PF4, the Unified PF, we give it an MSI-X Table Size as outlined above.
298 # For PF5-6 we assign enough MSI-X Vectors to support FCoE and iSCSI
301 # Additionally, since the UnifiedPF isn't one of the per-port Physical
302 # Functions, we give the UnifiedPF and the PF0-1 Physical Functions
303 # different PCI Device IDs which will allow Unified and Per-Port Drivers
307 # Note that the actual values used for the PCI-E Intelectual Property will be
323 # With the above we can get 17 VFs/PF0-3 (limited by 336 MPS TCAM entries)
331 # on PF0-3.  The below assumes that we're only doing NIC with NCPUS "Queue
332 # Sets" for ports 0-3.  The FCoE and iSCSI functions for such OSes will be
410 # For Virtual functions, we only allow NIC functionality and we only allow
445 # bg_mem:	%-age of mem to use for port/buffer group
446 # lpbk_mem:	%-age of port/bg mem to use for loopback
483 #   MSI-X Vectors: 736