Lines Matching +full:0 +full:x06000000
19 reg[0x10c4] = 0x20000000/0x20000000 # GK_CONTROL, enable 5th thread
21 reg[0x7dc0] = 0x0e2f8849 # TP_SHIFT_CNT
32 # TP number of RX channels (0 = auto)
33 tp_nrxch = 0
38 # TP number of TX channels (0 = auto)
39 tp_ntxch = 0
45 reg[0x7d04] = 0x00012008/0x00012008
48 reg[0x7d08] = 0x00000800/0x00000800 # set IssFromCplEnable
51 reg[0x7d48] = 0x00000000/0x00000400 # clear EnableFLMError
54 reg[0x7d60] = 0x06000000/0x07000000 # set InitCWND to 6
60 reg[0x19c04] = 0x00000000/0x00440000 # LE Server SRAM disabled
63 reg[0x19c28] = 0x00800000/0x01f00000 # LE Hash bucket size 8,
66 reg[0x8dc0] = 0x00000104/0x00000104 # Enable ITT on PI err
71 #reg[0x1925c] = 0x01003400/0x01003400 # iscsi tag pi bit
78 reg[0x1925c] = 0x000041c0/0x000031c0 # Enable offset decrement after
86 #mc_mode_brc[0] = 1 # mc0 - 1: enable BRC, 0: enable RBC
88 # PFs 0-3. These get 8 MSI/8 MSI-X vectors each. VFs are supported by
90 [function "0"]
94 rssnvi = 0
100 pmask = 0x1
106 rssnvi = 0
112 pmask = 0x2
118 rssnvi = 0
124 pmask = 0x4
130 rssnvi = 0
136 pmask = 0x8
162 nhpfilter = 0
179 rssnvi = 0
185 rssnvi = 0
195 rssnvi = 0
208 [function "0/*"]
209 wx_caps = 0x82
210 r_caps = 0x86
212 rssnvi = 0
218 pmask = 0x1
221 wx_caps = 0x82
222 r_caps = 0x86
224 rssnvi = 0
230 pmask = 0x2
233 wx_caps = 0x82
234 r_caps = 0x86
236 rssnvi = 0
242 pmask = 0x1
245 wx_caps = 0x82
246 r_caps = 0x86
248 rssnvi = 0
254 pmask = 0x2
258 [port "0"]
275 version = 0x1
276 checksum = 0x5fbc0a4a