Lines Matching +full:8 +full:- +full:port
3 # Copyright (C) 2010-2017 Chelsio Communications. All rights reserved.
6 # WILL RESULT IN A NON-FUNCTIONAL ADAPTER AND MAY RESULT IN PHYSICAL DAMAGE
10 # This file provides the default, power-on configuration for 4-port T5-based
25 # 4. MSI-X Vectors: 1088.
26 # 5. Multi-Port Support (MPS) TCAM: 336 entries to support MAC destination
34 # functions for ports 0-3 on PF0-3, FCoE on PF4, iSCSI on PF5, etc.
37 # 8. Some customers will want to support large CPU count systems with
39 # Ingress Queues and MSI-X Vectors to allow up to some number of CPUs
40 # to be involved per port and per application function. For example,
43 # to 8 CPUs, we would want:
46 # 3 application functions (NIC, FCoE, iSCSI) per port *
47 # 8 Ingress Queue/MSI-X Vectors per application function
49 # for a total of 96 Ingress Queues and MSI-X Vectors on the Unified PF.
52 # 9. Some customers will want to use PCI-E SR-IOV Capability to allow Virtual
53 # Machines to directly access T6 functionality via SR-IOV Virtual Functions
54 # and "PCI Device Passthrough" -- this is especially true for the NIC
111 # minus 128-entries for FL and HP
137 # protocol, tos, vlan, vnic_id, port, fcoe
139 filterMode = fcoemask, srvrsram, fragmentation, mpshittype, protocol, vlan, port, fcoe
177 reg[0x19168] = 0x04020100 # 64K, 16K, 8K and 4K
183 mc_mode_brc[0] = 1 # mc0 - 1: enable BRC, 0: enable RBC
184 mc_mode_brc[1] = 1 # mc1 - 1: enable BRC, 0: enable RBC
191 # 4 ports, 3 functions (NIC, FCoE and iSCSI), scaling up to 8 "CPU Queue Sets"
192 # per function per port ...
194 # NMSIX = 1088 # available MSI-X Vectors
199 # NCPUS = 8 # CPUs we want to support scalably
200 # NFUNCS = 3 # functions per port (NIC, FCoE, iSCSI)
205 # Each Ingress Queue can use one MSI-X interrupt but some Ingress Queues can
209 # Thus, the number of MSI-X Vectors assigned to the Unified PF will be less
217 # NMSIX_NIC = 32 # NIC MSI-X Interrupt Vectors (FLIQ)
224 # NMSIX_OFLD = 16 # Offload MSI-X Interrupt Vectors (FLIQ)
231 # NMSIX_RDMA = 4 # RDMA MSI-X Interrupt Vectors (FLIQ)
242 # NMSIX_ISCSI = 4 # ISCSI MSI-X Interrupt Vectors (FLIQ)
249 # NMSIX_FCOE = 34 # FCOE MSI-X Interrupt Vectors (FLIQ)
268 # NMSIX_HYPERV = 8 # NCPUS Forwarded Interrupt Queues
279 # The sum of all the MSI-X resources above is 74 MSI-X Vectors but we'll round
284 # The Storage PFs could need up to NPORTS*NCPUS + NMSIX_EXTRA MSI-X Vectors
290 # associated with it. Thus, the MSI-X Vector allocations we give to the
293 # one of PF0-3.
296 # All of the below PCI-E parameters are actually stored in various *_init.txt
299 # For PF0-3 we assign 8 vectors each for NIC Ingress Queues of the associated
300 # ports 0-3.
302 # For PF4, the Unified PF, we give it an MSI-X Table Size as outlined above.
304 # For PF5-6 we assign enough MSI-X Vectors to support FCoE and iSCSI
307 # Additionally, since the UnifiedPF isn't one of the per-port Physical
308 # Functions, we give the UnifiedPF and the PF0-3 Physical Functions
309 # different PCI Device IDs which will allow Unified and Per-Port Drivers
313 # Note that the actual values used for the PCI-E Intelectual Property will be
317 # PF0_INT = 8 # NCPUS
318 # PF1_INT = 8 # NCPUS
319 # PF2_INT = 8 # NCPUS
320 # PF3_INT = 8 # NCPUS
331 # With the above we can get 17 VFs/PF0-3 (limited by 336 MPS TCAM entries)
338 # only enough resources to support a single port's NIC application functions
339 # on PF0-3. The below assumes that we're only doing NIC with NCPUS "Queue
340 # Sets" for ports 0-3. The FCoE and iSCSI functions for such OSes will be
347 nvi = 1 # 1 port
348 niqflint = 8 # NCPUS "Queue Sets"
349 nethctrl = 8 # NCPUS "Queue Sets"
351 nexactf = 8 # number of exact MPSTCAM MAC filters
353 pmask = 0x1 # access to only one port
360 nvi = 1 # 1 port
361 niqflint = 8 # NCPUS "Queue Sets"
362 nethctrl = 8 # NCPUS "Queue Sets"
364 nexactf = 8 # number of exact MPSTCAM MAC filters
366 pmask = 0x2 # access to only one port
373 nvi = 1 # 1 port
374 niqflint = 8 # NCPUS "Queue Sets"
375 nethctrl = 8 # NCPUS "Queue Sets"
377 nexactf = 8 # number of exact MPSTCAM MAC filters
379 pmask = 0x4 # access to only one port
386 nvi = 1 # 1 port
387 niqflint = 8 # NCPUS "Queue Sets"
388 nethctrl = 8 # NCPUS "Queue Sets"
390 nexactf = 8 # number of exact MPSTCAM MAC filters
392 pmask = 0x8 # access to only one port
483 nexactf = 8 # NPORTS + DCBX +
488 # access to one port (1 << PF). Note that because of limitations in the
495 r_caps = 0x86 # DMAQ | VF | PORT
496 nvi = 1 # 1 port
499 neq = 8 # 2 "Queue Sets" * 2
502 pmask = 0x1 # access to only one port ...
507 r_caps = 0x86 # DMAQ | VF | PORT
508 nvi = 1 # 1 port
511 neq = 8 # 2 "Queue Sets" * 2
514 pmask = 0x2 # access to only one port ...
519 r_caps = 0x86 # DMAQ | VF | PORT
520 nvi = 1 # 1 port
523 neq = 8 # 2 "Queue Sets" * 2
526 pmask = 0x4 # access to only one port ...
531 r_caps = 0x86 # DMAQ | VF | PORT
532 nvi = 1 # 1 port
535 neq = 8 # 2 "Queue Sets" * 2
538 pmask = 0x8 # access to only one port ...
546 # bg_mem: %-age of mem to use for port/buffer group
547 # lpbk_mem: %-age of port/bg mem to use for loopback
555 [port "0"]
567 [port "1"]
579 [port "2"]
591 [port "3"]
612 # MSI-X Vectors: 736