Lines Matching refs:padap
74 struct adapter *padap = pdbg_init->adap; in read_sge_ctxt() local
78 rc = begin_synchronized_op(padap, NULL, SLEEP_OK | INTR_OK, in read_sge_ctxt()
82 rc = t4_sge_ctxt_rd(padap, padap->mbox, cid, ctype, in read_sge_ctxt()
84 end_synchronized_op(padap, 0); in read_sge_ctxt()
89 t4_sge_ctxt_rd_bd(padap, cid, ctype, data); in read_sge_ctxt()
212 struct adapter *padap = cudbg_init->adap; in cudbg_collect() local
231 cudbg_hdr->chip_ver = padap->params.chipid; in cudbg_collect()
238 rc = t4_get_flash_params(padap); in cudbg_collect()
571 struct adapter *padap = pdbg_init->adap; in collect_rss() local
576 size = padap->chip_params->rss_nentries * sizeof(u16); in collect_rss()
581 rc = t4_read_rss(padap, (u16 *)scratch_buff.data); in collect_rss()
606 struct adapter *padap = pdbg_init->adap; in collect_sw_state() local
620 swstate->fw_state = t4_read_reg(padap, A_PCIE_FW); in collect_sw_state()
641 struct adapter *padap = pdbg_init->adap; in collect_ddp_stats() local
656 t4_get_usm_stats(padap, tp_usm_stats_buff, 1); in collect_ddp_stats()
675 struct adapter *padap = pdbg_init->adap; in collect_ulptx_la() local
690 ulptx_la_buff->rdptr[i] = t4_read_reg(padap, in collect_ulptx_la()
693 ulptx_la_buff->wrptr[i] = t4_read_reg(padap, in collect_ulptx_la()
696 ulptx_la_buff->rddata[i] = t4_read_reg(padap, in collect_ulptx_la()
701 t4_read_reg(padap, in collect_ulptx_la()
723 struct adapter *padap = pdbg_init->adap; in collect_ulprx_la() local
736 t4_ulprx_read_la(padap, (u32 *)ulprx_la_buff->data); in collect_ulprx_la()
755 struct adapter *padap = pdbg_init->adap; in collect_cpl_stats() local
768 tp_cpl_stats_buff->nchan = padap->chip_params->nchan; in collect_cpl_stats()
771 t4_tp_get_cpl_stats(padap, &tp_cpl_stats_buff->stats, 1); in collect_cpl_stats()
790 struct adapter *padap = pdbg_init->adap; in collect_wc_stats() local
807 if (!is_t4(padap)) { in collect_wc_stats()
808 val1 = t4_read_reg(padap, A_SGE_STAT_TOTAL); in collect_wc_stats()
809 val2 = t4_read_reg(padap, A_SGE_STAT_MATCH); in collect_wc_stats()
834 static int fill_meminfo(struct adapter *padap, in fill_meminfo() argument
858 lo = t4_read_reg(padap, A_MA_TARGET_MEM_ENABLE); in fill_meminfo()
861 hi = t4_read_reg(padap, A_MA_EDRAM0_BAR); in fill_meminfo()
870 hi = t4_read_reg(padap, A_MA_EDRAM1_BAR); in fill_meminfo()
878 if (is_t5(padap)) { in fill_meminfo()
880 hi = t4_read_reg(padap, A_MA_EXT_MEMORY0_BAR); in fill_meminfo()
890 hi = t4_read_reg(padap, A_MA_EXT_MEMORY1_BAR); in fill_meminfo()
898 } else if (is_t6(padap)) { in fill_meminfo()
900 hi = t4_read_reg(padap, A_MA_EXT_MEMORY_BAR); in fill_meminfo()
918 (md++)->base = t4_read_reg(padap, A_SGE_DBQ_CTXT_BADDR); in fill_meminfo()
919 (md++)->base = t4_read_reg(padap, A_SGE_IMSG_CTXT_BADDR); in fill_meminfo()
920 (md++)->base = t4_read_reg(padap, A_SGE_FLM_CACHE_BADDR); in fill_meminfo()
921 (md++)->base = t4_read_reg(padap, A_TP_CMM_TCB_BASE); in fill_meminfo()
922 (md++)->base = t4_read_reg(padap, A_TP_CMM_MM_BASE); in fill_meminfo()
923 (md++)->base = t4_read_reg(padap, A_TP_CMM_TIMER_BASE); in fill_meminfo()
924 (md++)->base = t4_read_reg(padap, A_TP_CMM_MM_RX_FLST_BASE); in fill_meminfo()
925 (md++)->base = t4_read_reg(padap, A_TP_CMM_MM_TX_FLST_BASE); in fill_meminfo()
926 (md++)->base = t4_read_reg(padap, A_TP_CMM_MM_PS_FLST_BASE); in fill_meminfo()
929 md->base = t4_read_reg(padap, A_TP_PMM_TX_BASE); in fill_meminfo()
931 t4_read_reg(padap, in fill_meminfo()
933 G_PMTXMAXPAGE(t4_read_reg(padap, in fill_meminfo()
938 md->base = t4_read_reg(padap, A_TP_PMM_RX_BASE); in fill_meminfo()
940 t4_read_reg(padap, in fill_meminfo()
942 G_PMRXMAXPAGE(t4_read_reg(padap, in fill_meminfo()
946 if (t4_read_reg(padap, A_LE_DB_CONFIG) & F_HASHEN) { in fill_meminfo()
947 if (chip_id(padap) <= CHELSIO_T5) { in fill_meminfo()
948 hi = t4_read_reg(padap, A_LE_DB_TID_HASHBASE) / 4; in fill_meminfo()
949 md->base = t4_read_reg(padap, A_LE_DB_HASH_TID_BASE); in fill_meminfo()
951 hi = t4_read_reg(padap, A_LE_DB_HASH_TID_BASE); in fill_meminfo()
952 md->base = t4_read_reg(padap, in fill_meminfo()
963 md->base = t4_read_reg(padap, A_ULP_ ## reg ## _LLIMIT);\ in fill_meminfo()
964 (md++)->limit = t4_read_reg(padap, A_ULP_ ## reg ## _ULIMIT);\ in fill_meminfo()
978 if (!is_t4(padap)) { in fill_meminfo()
979 u32 sge_ctrl = t4_read_reg(padap, A_SGE_CONTROL2); in fill_meminfo()
980 u32 fifo_size = t4_read_reg(padap, A_SGE_DBVFIFO_SIZE); in fill_meminfo()
981 if (is_t5(padap)) { in fill_meminfo()
988 md->base = G_BASEADDR(t4_read_reg(padap, in fill_meminfo()
996 md->base = t4_read_reg(padap, A_ULP_RX_CTX_BASE); in fill_meminfo()
999 md->base = t4_read_reg(padap, A_ULP_TX_ERR_TABLE_BASE); in fill_meminfo()
1026 lo = t4_read_reg(padap, A_CIM_SDRAM_BASE_ADDR); in fill_meminfo()
1027 hi = t4_read_reg(padap, A_CIM_SDRAM_ADDR_SIZE) + lo - 1; in fill_meminfo()
1031 lo = t4_read_reg(padap, A_CIM_EXTMEM2_BASE_ADDR); in fill_meminfo()
1032 hi = t4_read_reg(padap, A_CIM_EXTMEM2_ADDR_SIZE) + lo - 1; in fill_meminfo()
1036 lo = t4_read_reg(padap, A_TP_PMM_RX_MAX_PAGE); in fill_meminfo()
1039 t4_read_reg(padap, A_TP_PMM_RX_PAGE_SIZE) >> 10; in fill_meminfo()
1042 lo = t4_read_reg(padap, A_TP_PMM_TX_MAX_PAGE); in fill_meminfo()
1043 hi = t4_read_reg(padap, A_TP_PMM_TX_PAGE_SIZE); in fill_meminfo()
1052 if (chip_id(padap) > CHELSIO_T5) in fill_meminfo()
1053 lo = t4_read_reg(padap, in fill_meminfo()
1056 lo = t4_read_reg(padap, A_MPS_RX_PG_RSV0 + i * 4); in fill_meminfo()
1057 if (is_t5(padap)) { in fill_meminfo()
1068 for (i = 0; i < padap->chip_params->nchan; i++) { in fill_meminfo()
1069 if (chip_id(padap) > CHELSIO_T5) in fill_meminfo()
1070 lo = t4_read_reg(padap, in fill_meminfo()
1073 lo = t4_read_reg(padap, A_MPS_RX_PG_RSV4 + i * 4); in fill_meminfo()
1074 if (is_t5(padap)) { in fill_meminfo()
1092 struct adapter *padap = pdbg_init->adap; in collect_meminfo() local
1106 rc = fill_meminfo(padap, meminfo_buff); in collect_meminfo()
1125 struct adapter *padap = pdbg_init->adap; in collect_lb_stats() local
1132 rc = padap->params.nports; in collect_lb_stats()
1150 t4_get_lb_stats(padap, i, tmp_stats); in collect_lb_stats()
1151 t4_get_lb_stats(padap, i + 1, tmp_stats+1); in collect_lb_stats()
1169 struct adapter *padap = pdbg_init->adap; in collect_rdma_stats() local
1184 t4_tp_get_rdma_stats(padap, rdma_stats_buff, 1); in collect_rdma_stats()
1203 struct adapter *padap = pdbg_init->adap; in collect_clk_info() local
1209 if (!padap->params.vpd.cclk) { in collect_clk_info()
1221 clk_info_buff->cclk_ps = 1000000000 / padap->params.vpd.cclk; /* in ps in collect_clk_info()
1223 clk_info_buff->res = t4_read_reg(padap, A_TP_TIMER_RESOLUTION); in collect_clk_info()
1230 t4_read_reg(padap, A_TP_DACK_TIMER); in collect_clk_info()
1233 tp_tick_us * t4_read_reg(padap, A_TP_RXT_MIN); in collect_clk_info()
1235 tp_tick_us * t4_read_reg(padap, A_TP_RXT_MAX); in collect_clk_info()
1238 tp_tick_us * t4_read_reg(padap, A_TP_PERS_MIN); in collect_clk_info()
1240 tp_tick_us * t4_read_reg(padap, A_TP_PERS_MAX); in collect_clk_info()
1243 tp_tick_us * t4_read_reg(padap, A_TP_KEEP_IDLE); in collect_clk_info()
1245 tp_tick_us * t4_read_reg(padap, A_TP_KEEP_INTVL); in collect_clk_info()
1248 tp_tick_us * G_INITSRTT(t4_read_reg(padap, A_TP_INIT_SRTT)); in collect_clk_info()
1250 tp_tick_us * t4_read_reg(padap, A_TP_FINWAIT2_TIMER); in collect_clk_info()
1269 struct adapter *padap = pdbg_init->adap; in collect_macstats() local
1275 rc = padap->params.nports; in collect_macstats()
1295 t4_get_port_stats(padap, i, &mac_stats_buff->stats[i]); in collect_macstats()
1312 struct adapter *padap = pdbg_init->adap; in collect_cim_pif_la() local
1328 t4_cim_read_pif_la(padap, (u32 *)cim_pif_la_buff->data, in collect_cim_pif_la()
1347 struct adapter *padap = pdbg_init->adap; in collect_tp_la() local
1361 tp_la_buff->mode = G_DBGLAMODE(t4_read_reg(padap, A_TP_DBG_LA_CONFIG)); in collect_tp_la()
1362 t4_tp_read_la(padap, (u64 *)tp_la_buff->data, NULL); in collect_tp_la()
1379 struct adapter *padap = pdbg_init->adap; in collect_fcoe_stats() local
1394 t4_get_fcoe_stats(padap, 0, &tp_fcoe_stats_buff->stats[0], 1); in collect_fcoe_stats()
1395 t4_get_fcoe_stats(padap, 1, &tp_fcoe_stats_buff->stats[1], 1); in collect_fcoe_stats()
1396 if (padap->chip_params->nchan == NCHAN) { in collect_fcoe_stats()
1397 t4_get_fcoe_stats(padap, 2, &tp_fcoe_stats_buff->stats[2], 1); in collect_fcoe_stats()
1398 t4_get_fcoe_stats(padap, 3, &tp_fcoe_stats_buff->stats[3], 1); in collect_fcoe_stats()
1417 struct adapter *padap = pdbg_init->adap; in collect_tp_err_stats() local
1432 t4_tp_get_err_stats(padap, &tp_err_stats_buff->stats, 1); in collect_tp_err_stats()
1434 tp_err_stats_buff->nchan = padap->chip_params->nchan; in collect_tp_err_stats()
1451 struct adapter *padap = pdbg_init->adap; in collect_tcp_stats() local
1466 t4_tp_get_tcp_stats(padap, &tcp_stats_buff->v4, &tcp_stats_buff->v6, 1); in collect_tcp_stats()
1484 struct adapter *padap = pdbg_init->adap; in collect_hw_sched() local
1490 if (!padap->params.vpd.cclk) { in collect_hw_sched()
1502 hw_sched_buff->map = t4_read_reg(padap, A_TP_TX_MOD_QUEUE_REQ_MAP); in collect_hw_sched()
1503 hw_sched_buff->mode = G_TIMERMODE(t4_read_reg(padap, A_TP_MOD_CONFIG)); in collect_hw_sched()
1504 t4_read_pace_tbl(padap, hw_sched_buff->pace_tab); in collect_hw_sched()
1507 t4_get_tx_sched(padap, i, &hw_sched_buff->kbps[i], in collect_hw_sched()
1526 struct adapter *padap = pdbg_init->adap; in collect_pm_stats() local
1540 t4_pmtx_get_stats(padap, pm_stats_buff->tx_cnt, pm_stats_buff->tx_cyc); in collect_pm_stats()
1541 t4_pmrx_get_stats(padap, pm_stats_buff->rx_cnt, pm_stats_buff->rx_cyc); in collect_pm_stats()
1558 struct adapter *padap = pdbg_init->adap; in collect_path_mtu() local
1569 t4_read_mtu_tbl(padap, (u16 *)scratch_buff.data, NULL); in collect_path_mtu()
1586 struct adapter *padap = pdbg_init->adap; in collect_rss_key() local
1597 t4_read_rss_key(padap, (u32 *)scratch_buff.data, 1); in collect_rss_key()
1614 struct adapter *padap = pdbg_init->adap; in collect_rss_config() local
1628 rss_conf->tp_rssconf = t4_read_reg(padap, A_TP_RSS_CONFIG); in collect_rss_config()
1629 rss_conf->tp_rssconf_tnl = t4_read_reg(padap, A_TP_RSS_CONFIG_TNL); in collect_rss_config()
1630 rss_conf->tp_rssconf_ofd = t4_read_reg(padap, A_TP_RSS_CONFIG_OFD); in collect_rss_config()
1631 rss_conf->tp_rssconf_syn = t4_read_reg(padap, A_TP_RSS_CONFIG_SYN); in collect_rss_config()
1632 rss_conf->tp_rssconf_vrt = t4_read_reg(padap, A_TP_RSS_CONFIG_VRT); in collect_rss_config()
1633 rss_conf->tp_rssconf_cng = t4_read_reg(padap, A_TP_RSS_CONFIG_CNG); in collect_rss_config()
1634 rss_conf->chip = padap->params.chipid; in collect_rss_config()
1652 struct adapter *padap = pdbg_init->adap; in collect_rss_vf_config() local
1658 vf_count = padap->chip_params->vfcount; in collect_rss_vf_config()
1668 t4_read_rss_vf_config(padap, vf, &vfconf[vf].rss_vf_vfl, in collect_rss_vf_config()
1690 struct adapter *padap = pdbg_init->adap; in collect_rss_pf_config() local
1702 rss_pf_map = t4_read_rss_pf_map(padap, 1); in collect_rss_pf_config()
1703 rss_pf_mask = t4_read_rss_pf_mask(padap, 1); in collect_rss_pf_config()
1709 t4_read_rss_pf_config(padap, pf, &pfconf[pf].rss_pf_config, 1); in collect_rss_pf_config()
1761 static int get_max_ctxt_qid(struct adapter *padap, in get_max_ctxt_qid() argument
1794 value = t4_read_reg(padap, A_SGE_FLM_CFG); in get_max_ctxt_qid()
1851 struct adapter *padap = pdbg_init->adap; in collect_dump_context() local
1862 rc = fill_meminfo(padap, &meminfo); in collect_dump_context()
1867 rc = get_max_ctxt_qid(padap, &meminfo, max_ctx_qid, CTXT_CNM + 1); in collect_dump_context()
1963 struct adapter *padap = pdbg_init->adap; in collect_fw_devlog() local
1964 struct devlog_params *dparams = &padap->params.devlog; in collect_fw_devlog()
1970 rc = t4_init_devlog_params(padap, 1); in collect_fw_devlog()
2001 rc = t4_memory_rw(padap, padap->params.drv_memwin, in collect_fw_devlog()
2124 struct adapter *padap = pdbg_init->adap; in read_cim_obq() local
2136 no_of_read_words = t4_read_cim_obq(padap, qid, in read_cim_obq()
2237 struct adapter *padap = pdbg_init->adap; in read_cim_ibq() local
2251 no_of_read_words = t4_read_cim_ibq(padap, qid, in read_cim_ibq()
2287 struct adapter *padap = pdbg_init->adap; in collect_cim_ma_la() local
2297 t4_cim_read_ma_la(padap, in collect_cim_ma_la()
2320 struct adapter *padap = pdbg_init->adap; in collect_cim_la() local
2327 if (is_t6(padap)) { in collect_cim_la()
2328 size = padap->params.cim_la_size / 10 + 1; in collect_cim_la()
2331 size = padap->params.cim_la_size / 8; in collect_cim_la()
2341 rc = t4_cim_read(padap, A_UP_UP_DBG_LA_CFG, 1, &cfg); in collect_cim_la()
2354 rc = t4_cim_read_la(padap, in collect_cim_la()
2384 struct adapter *padap = pdbg_init->adap; in collect_cim_qcfg() local
2402 rc = t4_cim_read(padap, A_UP_IBQ_0_RDADDR, in collect_cim_qcfg()
2413 rc = t4_cim_read(padap, A_UP_OBQ_0_REALADDR, in collect_cim_qcfg()
2426 t4_read_cimq_cfg(padap, in collect_cim_qcfg()
2462 static int get_payload_range(struct adapter *padap, u8 mem_type, in get_payload_range() argument
2474 rc = fill_meminfo(padap, &meminfo); in get_payload_range()
2551 struct adapter *padap = pdbg_init->adap; in read_fw_mem() local
2585 rc = get_payload_range(padap, mem_type, tot_len, in read_fw_mem()
2634 rc = t4_memory_rw(padap, MEMWIN_NIC, mem_type, bytes_read, in read_fw_mem()
2668 struct adapter *padap = pdbg_init->adap; in collect_mem_info() local
2672 if (is_t4(padap)) in collect_mem_info()
2676 value = t4_read_reg(padap, A_MA_EXT_MEMORY_BAR); in collect_mem_info()
2680 value = t4_read_reg(padap, A_MA_TARGET_MEM_ENABLE); in collect_mem_info()
2685 value = t4_read_reg(padap, A_MA_EXT_MEMORY0_BAR); in collect_mem_info()
2689 value = t4_read_reg(padap, A_MA_EXT_MEMORY1_BAR); in collect_mem_info()
2693 value = t4_read_reg(padap, A_MA_TARGET_MEM_ENABLE); in collect_mem_info()
2700 value = t4_read_reg(padap, A_MA_EDRAM0_BAR); in collect_mem_info()
2704 value = t4_read_reg(padap, A_MA_EDRAM1_BAR); in collect_mem_info()
2708 value = t4_read_reg(padap, A_MA_TARGET_MEM_ENABLE); in collect_mem_info()
2719 struct adapter *padap = pdbg_init->adap; in cudbg_t4_fwcache() local
2725 rc = begin_synchronized_op(padap, NULL, SLEEP_OK | INTR_OK, in cudbg_t4_fwcache()
2728 rc = t4_fwcache(padap, FW_PARAM_DEV_FWCACHE_FLUSH); in cudbg_t4_fwcache()
2729 end_synchronized_op(padap, 0); in cudbg_t4_fwcache()
2869 struct adapter *padap = pdbg_init->adap; in collect_reg_dump() local
2875 if (is_t4(padap)) in collect_reg_dump()
2877 else if (is_t5(padap) || is_t6(padap)) in collect_reg_dump()
2889 t4_get_regs(padap, (void *)scratch_buff.data, scratch_buff.size); in collect_reg_dump()
2917 struct adapter *padap = pdbg_init->adap; in collect_cctrl() local
2928 t4_read_cong_tbl(padap, (void *)scratch_buff.data); in collect_cctrl()
2942 static int check_busy_bit(struct adapter *padap) in check_busy_bit() argument
2951 val = t4_read_reg(padap, A_CIM_HOST_ACC_CTRL); in check_busy_bit()
2962 static int cim_ha_rreg(struct adapter *padap, u32 addr, u32 *val) in cim_ha_rreg() argument
2967 t4_write_reg(padap, A_CIM_HOST_ACC_CTRL, addr); in cim_ha_rreg()
2970 rc = check_busy_bit(padap); in cim_ha_rreg()
2975 *val = t4_read_reg(padap, A_CIM_HOST_ACC_DATA); in cim_ha_rreg()
2981 static int dump_up_cim(struct adapter *padap, struct cudbg_init *pdbg_init, in dump_up_cim() argument
2988 rc = cim_ha_rreg(padap, in dump_up_cim()
3010 struct adapter *padap = pdbg_init->adap; in collect_up_cim_indirect() local
3029 if (is_t5(padap)) { in collect_up_cim_indirect()
3036 } else if (is_t6(padap)) { in collect_up_cim_indirect()
3045 rc = dump_up_cim(padap, pdbg_init, up_cim_reg, buff); in collect_up_cim_indirect()
3136 struct adapter *padap = pdbg_init->adap; in collect_pbt_tables() local
3154 rc = cim_ha_rreg(padap, addr + (i * 4), &pbt->pbt_dynamic[i]); in collect_pbt_tables()
3168 rc = cim_ha_rreg(padap, addr + (i * 4), &pbt->pbt_static[i]); in collect_pbt_tables()
3180 rc = cim_ha_rreg(padap, addr + (i * 4), &pbt->lrf_table[i]); in collect_pbt_tables()
3192 rc = cim_ha_rreg(padap, addr + (i * 4), &pbt->pbt_data[i]); in collect_pbt_tables()
3218 struct adapter *padap = pdbg_init->adap; in collect_pm_indirect() local
3243 t4_read_indirect(padap, in collect_pm_indirect()
3264 t4_read_indirect(padap, in collect_pm_indirect()
3293 struct adapter *padap = pdbg_init->adap; in collect_tid() local
3323 if (is_t5(padap)) { in collect_tid()
3324 tid->hash_base = t4_read_reg(padap, A_LE_DB_TID_HASHBASE); in collect_tid()
3326 } else if (is_t6(padap)) { in collect_tid()
3327 tid->hash_base = t4_read_reg(padap, A_T6_LE_DB_HASH_TID_BASE); in collect_tid()
3328 tid1->tid_start = t4_read_reg(padap, A_LE_DB_ACTIVE_TABLE_START_INDEX); in collect_tid()
3331 tid->le_db_conf = t4_read_reg(padap, A_LE_DB_CONFIG); in collect_tid()
3341 rc = begin_synchronized_op(padap, NULL, SLEEP_OK | INTR_OK, "t4cudq"); in collect_tid()
3344 mbox = padap->mbox; in collect_tid()
3345 pf = padap->pf; in collect_tid()
3346 rc = t4_query_params(padap, mbox, pf, 0, 7, para, val); in collect_tid()
3358 rc = t4_query_params(padap, mbox, pf, 0, 7, para, val); in collect_tid()
3384 if (chip_id(padap) >= CHELSIO_T6) { in collect_tid()
3387 rc = t4_query_params(padap, mbox, pf, 0, 2, para, val); in collect_tid()
3397 if (chip_id(padap) <= CHELSIO_T5) { in collect_tid()
3398 tid->sb = t4_read_reg(padap, A_LE_DB_SERVER_INDEX) / 4; in collect_tid()
3401 tid->sb = t4_read_reg(padap, A_LE_DB_SRVR_START_INDEX); in collect_tid()
3407 rc = t4_query_params(padap, mbox, pf, 0, 2, para, val); in collect_tid()
3417 tid->IP_users = t4_read_reg(padap, A_LE_DB_ACT_CNT_IPV4); in collect_tid()
3418 tid->IPv6_users = t4_read_reg(padap, A_LE_DB_ACT_CNT_IPV6); in collect_tid()
3430 end_synchronized_op(padap, 0); in collect_tid()
3441 struct adapter *padap = pdbg_init->adap; in collect_tx_rate() local
3454 t4_get_chan_txrate(padap, tx_rate->nrate, tx_rate->orate); in collect_tx_rate()
3455 tx_rate->nchan = padap->chip_params->nchan; in collect_tx_rate()
3476 static void mps_rpl_backdoor(struct adapter *padap, struct fw_ldst_mps_rplc *mps_rplc) in mps_rpl_backdoor() argument
3478 if (is_t5(padap)) { in mps_rpl_backdoor()
3479 mps_rplc->rplc255_224 = htonl(t4_read_reg(padap, in mps_rpl_backdoor()
3481 mps_rplc->rplc223_192 = htonl(t4_read_reg(padap, in mps_rpl_backdoor()
3483 mps_rplc->rplc191_160 = htonl(t4_read_reg(padap, in mps_rpl_backdoor()
3485 mps_rplc->rplc159_128 = htonl(t4_read_reg(padap, in mps_rpl_backdoor()
3488 mps_rplc->rplc255_224 = htonl(t4_read_reg(padap, in mps_rpl_backdoor()
3490 mps_rplc->rplc223_192 = htonl(t4_read_reg(padap, in mps_rpl_backdoor()
3492 mps_rplc->rplc191_160 = htonl(t4_read_reg(padap, in mps_rpl_backdoor()
3494 mps_rplc->rplc159_128 = htonl(t4_read_reg(padap, in mps_rpl_backdoor()
3497 mps_rplc->rplc127_96 = htonl(t4_read_reg(padap, A_MPS_VF_RPLCT_MAP3)); in mps_rpl_backdoor()
3498 mps_rplc->rplc95_64 = htonl(t4_read_reg(padap, A_MPS_VF_RPLCT_MAP2)); in mps_rpl_backdoor()
3499 mps_rplc->rplc63_32 = htonl(t4_read_reg(padap, A_MPS_VF_RPLCT_MAP1)); in mps_rpl_backdoor()
3500 mps_rplc->rplc31_0 = htonl(t4_read_reg(padap, A_MPS_VF_RPLCT_MAP0)); in mps_rpl_backdoor()
3508 struct adapter *padap = pdbg_init->adap; in collect_mps_tcam() local
3515 n = padap->chip_params->mps_tcam_size; in collect_mps_tcam()
3526 if (chip_id(padap) >= CHELSIO_T6) { in collect_mps_tcam()
3542 t4_write_reg(padap, A_MPS_CLS_TCAM_DATA2_CTL, ctl); in collect_mps_tcam()
3543 val = t4_read_reg(padap, A_MPS_CLS_TCAM_RDATA1_REQ_ID1); in collect_mps_tcam()
3545 tcamy |= t4_read_reg(padap, A_MPS_CLS_TCAM_RDATA0_REQ_ID1); in collect_mps_tcam()
3546 data2 = t4_read_reg(padap, A_MPS_CLS_TCAM_RDATA2_REQ_ID1); in collect_mps_tcam()
3570 t4_write_reg(padap, A_MPS_CLS_TCAM_DATA2_CTL, ctl); in collect_mps_tcam()
3571 val = t4_read_reg(padap, A_MPS_CLS_TCAM_RDATA1_REQ_ID1); in collect_mps_tcam()
3573 tcamx |= t4_read_reg(padap, A_MPS_CLS_TCAM_RDATA0_REQ_ID1); in collect_mps_tcam()
3574 data2 = t4_read_reg(padap, A_MPS_CLS_TCAM_RDATA2_REQ_ID1); in collect_mps_tcam()
3583 tcamy = t4_read_reg64(padap, MPS_CLS_TCAM_Y_L(i)); in collect_mps_tcam()
3584 tcamx = t4_read_reg64(padap, MPS_CLS_TCAM_X_L(i)); in collect_mps_tcam()
3590 tcam->cls_lo = t4_read_reg(padap, MPS_CLS_SRAM_L(i)); in collect_mps_tcam()
3591 tcam->cls_hi = t4_read_reg(padap, MPS_CLS_SRAM_H(i)); in collect_mps_tcam()
3593 if (is_t5(padap)) in collect_mps_tcam()
3595 else if (is_t6(padap)) in collect_mps_tcam()
3616 rc = begin_synchronized_op(padap, NULL, in collect_mps_tcam()
3619 rc = t4_wr_mbox(padap, padap->mbox, &ldst_cmd, in collect_mps_tcam()
3621 end_synchronized_op(padap, 0); in collect_mps_tcam()
3625 mps_rpl_backdoor(padap, &mps_rplc); in collect_mps_tcam()
3633 if (padap->chip_params->mps_rplc_size > in collect_mps_tcam()
3644 tcam->rplc_size = padap->chip_params->mps_rplc_size; in collect_mps_tcam()
3675 struct adapter *padap = pdbg_init->adap; in collect_pcie_config() local
3691 *value++ = t4_hw_pci_read_cfg4(padap, j); in collect_pcie_config()
3711 struct adapter *padap = pdbg_init->adap; in cudbg_read_tid() local
3716 t4_write_reg(padap, A_LE_DB_DBGI_REQ_DATA + (i << 2), 0); in cudbg_read_tid()
3720 t4_write_reg(padap, A_LE_DB_DBGI_REQ_TCAM_CMD, val); in cudbg_read_tid()
3726 t4_write_reg(padap, A_LE_DB_DBGI_CONFIG, val); in cudbg_read_tid()
3732 val = t4_read_reg(padap, A_LE_DB_DBGI_CONFIG); in cudbg_read_tid()
3745 val = t4_read_reg(padap, A_LE_DB_DBGI_RSP_STATUS); in cudbg_read_tid()
3755 tid_data->data[i] = t4_read_reg(padap, in cudbg_read_tid()
3769 struct adapter *padap = pdbg_init->adap; in collect_le_tcam() local
3777 value = t4_read_reg(padap, A_LE_DB_TID_HASHBASE); /* Get hash base in collect_le_tcam()
3782 value = t4_read_reg(padap, A_LE_DB_ROUTING_TABLE_INDEX); in collect_le_tcam()
3786 value = t4_read_reg(padap, A_LE_DB_CLIP_TABLE_INDEX); in collect_le_tcam()
3790 value = t4_read_reg(padap, A_LE_DB_FILTER_TABLE_INDEX); in collect_le_tcam()
3794 value = t4_read_reg(padap, A_LE_DB_SERVER_INDEX); in collect_le_tcam()
3798 value = t4_read_reg(padap, A_LE_DB_CONFIG); in collect_le_tcam()
3800 value = t4_read_reg(padap, A_LE_DB_HASH_CONFIG); in collect_le_tcam()
3801 if (chip_id(padap) > CHELSIO_T5) in collect_le_tcam()
3882 struct adapter *padap = pdbg_init->adap; in collect_ma_indirect() local
3887 if (chip_id(padap) < CHELSIO_T6) { in collect_ma_indirect()
3913 t4_read_indirect(padap, ma_fli->ireg_addr, ma_fli->ireg_data, in collect_ma_indirect()
3932 t4_read_indirect(padap, ma_fli->ireg_addr, in collect_ma_indirect()
3958 struct adapter *padap = pdbg_init->adap; in collect_hma_indirect() local
3963 if (chip_id(padap) < CHELSIO_T6) { in collect_hma_indirect()
3989 t4_read_indirect(padap, hma_fli->ireg_addr, hma_fli->ireg_data, in collect_hma_indirect()
4014 struct adapter *padap = pdbg_init->adap; in collect_pcie_indirect() local
4039 t4_read_indirect(padap, in collect_pcie_indirect()
4060 t4_read_indirect(padap, in collect_pcie_indirect()
4088 struct adapter *padap = pdbg_init->adap; in collect_tp_indirect() local
4093 if (is_t5(padap)) in collect_tp_indirect()
4095 else if (is_t6(padap)) in collect_tp_indirect()
4112 if (is_t5(padap)) { in collect_tp_indirect()
4117 } else if (is_t6(padap)) { in collect_tp_indirect()
4124 t4_tp_pio_read(padap, buff, tp_pio->ireg_offset_range, in collect_tp_indirect()
4131 if (is_t5(padap)) in collect_tp_indirect()
4133 else if (is_t6(padap)) in collect_tp_indirect()
4140 if (is_t5(padap)) { in collect_tp_indirect()
4145 } else if (is_t6(padap)) { in collect_tp_indirect()
4152 t4_tp_tm_pio_read(padap, buff, tp_pio->ireg_offset_range, in collect_tp_indirect()
4159 if (is_t5(padap)) in collect_tp_indirect()
4161 else if (is_t6(padap)) in collect_tp_indirect()
4168 if (is_t5(padap)) { in collect_tp_indirect()
4175 } else if (is_t6(padap)) { in collect_tp_indirect()
4184 t4_tp_mib_read(padap, buff, tp_pio->ireg_offset_range, in collect_tp_indirect()
4207 struct adapter *padap = pdbg_init->adap; in collect_sge_indirect() local
4230 t4_read_indirect(padap, in collect_sge_indirect()
4257 struct adapter *padap = pdbg_init->adap; in collect_full() local
4273 if (is_t5(padap)) in collect_full()
4275 else if (is_t6(padap)) in collect_full()
4290 t4_tp_pio_read(padap, sp, reg_offset_range, reg_local_offset, true); in collect_full()
4298 t4_tp_pio_read(padap, sp, reg_offset_range, reg_local_offset, true); in collect_full()
4306 t4_tp_pio_read(padap, sp, reg_offset_range, reg_local_offset, true); in collect_full()
4314 t4_tp_pio_read(padap, sp, reg_offset_range, reg_local_offset, true); in collect_full()
4324 t4_read_indirect(padap, reg_addr, reg_data, sp, reg_offset_range, in collect_full()
4329 if (is_t6(padap)) { in collect_full()
4336 t4_read_indirect(padap, reg_addr, reg_data, sp, in collect_full()
4343 *sp = t4_read_reg(padap, A_SGE_DEBUG_DATA_HIGH_INDEX_10); in collect_full()
4363 struct adapter *padap = pdbg_init->adap; in collect_vpd_data() local
4379 if (is_t5(padap)) { in collect_vpd_data()
4380 read_vpd_reg(padap, SN_REG_ADDR, SN_MAX_LEN, vpd_data->sn); in collect_vpd_data()
4381 read_vpd_reg(padap, BN_REG_ADDR, BN_MAX_LEN, vpd_data->bn); in collect_vpd_data()
4382 read_vpd_reg(padap, NA_REG_ADDR, NA_MAX_LEN, vpd_data->na); in collect_vpd_data()
4383 read_vpd_reg(padap, MN_REG_ADDR, MN_MAX_LEN, vpd_data->mn); in collect_vpd_data()
4384 } else if (is_t6(padap)) { in collect_vpd_data()
4385 read_vpd_reg(padap, SN_T6_ADDR, SN_MAX_LEN, vpd_data->sn); in collect_vpd_data()
4386 read_vpd_reg(padap, BN_T6_ADDR, BN_MAX_LEN, vpd_data->bn); in collect_vpd_data()
4387 read_vpd_reg(padap, NA_T6_ADDR, NA_MAX_LEN, vpd_data->na); in collect_vpd_data()
4388 read_vpd_reg(padap, MN_T6_ADDR, MN_MAX_LEN, vpd_data->mn); in collect_vpd_data()
4392 rc = t4_get_scfg_version(padap, &vpd_data->scfg_vers); in collect_vpd_data()
4399 rc = read_vpd_reg(padap, SCFG_VER_ADDR, SCFG_VER_LEN, in collect_vpd_data()
4406 rc = t4_get_vpd_version(padap, &vpd_data->vpd_vers); in collect_vpd_data()
4413 rc = read_vpd_reg(padap, VPD_VER_ADDR, VPD_VER_LEN, in collect_vpd_data()
4425 fw_vers = padap->params.fw_vers; in collect_vpd_data()
4427 rc = t4_get_fw_version(padap, &fw_vers); in collect_vpd_data()