Lines Matching refs:u32
108 u32 pbt_dynamic[CUDBG_PBT_DYNAMIC_ENTRIES];
109 u32 pbt_static[CUDBG_PBT_STATIC_ENTRIES];
110 u32 lrf_table[CUDBG_LRF_ENTRIES];
111 u32 pbt_data[CUDBG_PBT_DATA_ENTRIES];
124 u32 rss_pf_map;
125 u32 rss_pf_mask;
126 u32 rss_pf_config;
136 u32 filter_start;
137 u32 server_start;
138 u32 clip_start;
139 u32 routing_start;
140 u32 tid_hash_base;
141 u32 max_tid;
147 u32 hi[MBOX_LEN / 8];
148 u32 lo[MBOX_LEN / 8];
153 u32 tid;
154 u32 dbig_cmd;
155 u32 dbig_conf;
156 u32 dbig_rsp_stat;
157 u32 data[CUDBG_NUM_REQ_REGS];
162 u32 start_bit;
163 u32 end_bit;
164 u32 shift;
165 u32 islog2;
170 u32 rplc[8];
171 u32 idx;
172 u32 cls_lo;
173 u32 cls_hi;
174 u32 rplc_size;
175 u32 vniy;
176 u32 vnix;
177 u32 dip_hit;
178 u32 vlan_vld;
179 u32 repli;
188 u32 rss_vf_vfl;
189 u32 rss_vf_vfh;
193 u32 tp_rssconf; /* A_TP_RSS_CONFIG */
194 u32 tp_rssconf_tnl; /* A_TP_RSS_CONFIG_TNL */
195 u32 tp_rssconf_ofd; /* A_TP_RSS_CONFIG_OFD */
196 u32 tp_rssconf_syn; /* A_TP_RSS_CONFIG_SYN */
197 u32 tp_rssconf_vrt; /* A_TP_RSS_CONFIG_VRT */
198 u32 tp_rssconf_cng; /* A_TP_RSS_CONFIG_CNG */
199 u32 chip;
203 u32 tx_cnt[T6_PM_NSTATS];
204 u32 rx_cnt[T6_PM_NSTATS];
210 u32 kbps[NTX_SCHED];
211 u32 ipg[NTX_SCHED];
212 u32 pace_tab[NTX_SCHED];
213 u32 mode;
214 u32 map;
223 u32 nchan;
228 u32 nchan;
232 u32 port_count;
238 u32 port_count;
239 u32 reserved;
245 u32 nchan;
249 u32 wr_cl_success;
250 u32 wr_cl_fail;
254 u32 rdptr[CUDBG_NUM_ULPTX];
255 u32 wrptr[CUDBG_NUM_ULPTX];
256 u32 rddata[CUDBG_NUM_ULPTX];
257 u32 rd_data[CUDBG_NUM_ULPTX][CUDBG_NUM_ULPTX_READ];
261 u32 data[ULPRX_LA_SIZE * 8];
262 u32 size;
270 u32 obq_wr[2 * CIM_NUM_OBQ_T5];
271 u32 stat[4 * (CIM_NUM_IBQ + CIM_NUM_OBQ_T5)];
318 u32 start; /* Start wrt 0 */
319 u32 end; /* End wrt 0 */
323 u32 id;
324 u32 used;
325 u32 alloc;
329 u32 id;
330 u32 used;
331 u32 alloc;
335 u32 base;
336 u32 limit;
337 u32 idx;
348 u32 avail_c;
349 u32 mem_c;
350 u32 up_ram_lo;
351 u32 up_ram_hi;
352 u32 up_extmem2_lo;
353 u32 up_extmem2_hi;
354 u32 rx_pages_data[3];
355 u32 tx_pages_data[4];
356 u32 p_structs;
358 u32 port_used[4];
359 u32 port_alloc[4];
360 u32 loopback_used[NCHAN];
361 u32 loopback_alloc[NCHAN];
382 u32 dack_timer;
383 u32 res;
384 u32 cclk_ps;
385 u32 tre;
386 u32 dack_re;
399 u32 size;
400 u32 mode;
406 u32 start;
407 u32 width;
412 u32 addr;
413 u32 value;
417 u32 sop;
418 u32 eop;
422 u32 sop[2];
423 u32 eop[2];
427 u32 sop[4];
428 u32 eop[4];
432 u32 sop[4];
433 u32 eop[4];
434 u32 drops;
546 u32 sop[8]; /* => undef,*/
547 u32 eop[8]; /* => undef,*/
548 u32 drop; /* => undef,*/
549 u32 cls_drop; /* => undef,*/
550 u32 err; /* => undef,*/
551 u32 bp; /* => undef,*/
684 u32 ireg_addr;
685 u32 ireg_data;
686 u32 ireg_local_offset;
687 u32 ireg_offset_range;
692 u32 outbuf[32];
698 u32 nchan;
702 u32 ntids;
703 u32 nstids;
704 u32 stid_base;
705 u32 hash_base;
707 u32 natids;
708 u32 nftids;
709 u32 ftid_base;
710 u32 aftid_base;
711 u32 aftid_end;
714 u32 sftid_base;
715 u32 nsftids;
718 u32 uotid_base;
719 u32 nuotids;
721 u32 sb;
722 u32 flags;
723 u32 le_db_conf;
724 u32 IP_users;
725 u32 IPv6_users;
727 u32 hpftid_base;
728 u32 nhpftids;
734 u32 tid_start;
735 u32 reserved[16];
747 u32 scfg_vers;
748 u32 vpd_vers;
752 u32 fw_state;
756 u32 reserved1[16];
759 static u32 ATTRIBUTE_UNUSED t6_tp_pio_array[][4] = {
774 static u32 ATTRIBUTE_UNUSED t5_tp_pio_array[][4] = {
788 static u32 ATTRIBUTE_UNUSED t6_ma_ireg_array[][4] = {
794 static u32 ATTRIBUTE_UNUSED t6_ma_ireg_array2[][4] = {
799 static u32 ATTRIBUTE_UNUSED t6_hma_ireg_array[][4] = {
802 static u32 ATTRIBUTE_UNUSED t5_pcie_pdbg_array[][4] = {
808 static u32 ATTRIBUTE_UNUSED t5_pcie_config_array[][2] = {
825 static u32 ATTRIBUTE_UNUSED t5_pcie_cdbg_array[][4] = {
830 static u32 ATTRIBUTE_UNUSED t6_tp_tm_pio_array[1][4] = {
834 static u32 ATTRIBUTE_UNUSED t5_tp_tm_pio_array[1][4] = {
838 static u32 ATTRIBUTE_UNUSED t5_pm_rx_array[][4] = {
843 static u32 ATTRIBUTE_UNUSED t5_pm_tx_array[][4] = {
848 static u32 ATTRIBUTE_UNUSED t6_tp_mib_index_array[6][4] = {
857 static u32 ATTRIBUTE_UNUSED t5_tp_mib_index_array[9][4] = {
869 static u32 ATTRIBUTE_UNUSED t5_sge_dbg_index_array[9][4] = {
874 static u32 ATTRIBUTE_UNUSED t6_up_cim_reg_array[][4] = {
891 static u32 ATTRIBUTE_UNUSED t5_up_cim_reg_array[][4] = {