Lines Matching refs:S_T6_XADDR
51948 #define S_T6_XADDR 1 macro
51950 #define V_T6_XADDR(x) ((x) << S_T6_XADDR)
51951 #define G_T6_XADDR(x) (((x) >> S_T6_XADDR) & M_T6_XADDR)
52507 #define S_T6_XADDR 1 macro
52509 #define V_T6_XADDR(x) ((x) << S_T6_XADDR)
52510 #define G_T6_XADDR(x) (((x) >> S_T6_XADDR) & M_T6_XADDR)
54734 #define S_T6_XADDR 1 macro
54736 #define V_T6_XADDR(x) ((x) << S_T6_XADDR)
54737 #define G_T6_XADDR(x) (((x) >> S_T6_XADDR) & M_T6_XADDR)
54918 #define S_T6_XADDR 1 macro
54920 #define V_T6_XADDR(x) ((x) << S_T6_XADDR)
54921 #define G_T6_XADDR(x) (((x) >> S_T6_XADDR) & M_T6_XADDR)
55720 #define S_T6_XADDR 1 macro
55722 #define V_T6_XADDR(x) ((x) << S_T6_XADDR)
55723 #define G_T6_XADDR(x) (((x) >> S_T6_XADDR) & M_T6_XADDR)