Lines Matching refs:CHELSIO_T5
167 if (chip_id(adap) <= CHELSIO_T5) in t4_hw_pci_read_cfg4()
800 case CHELSIO_T5: in t4_get_regs_len()
2662 case CHELSIO_T5: in t4_get_regs()
4435 if (chip_id(adap) <= CHELSIO_T5) { in sge_intr_handler()
4446 if (chip_id(adap) >= CHELSIO_T5) in sge_intr_handler()
4864 if (chip_id(adap) <= CHELSIO_T5) { in le_intr_handler()
5240 if (chip_id(adap) >= CHELSIO_T5) { in mac_intr_handler()
5426 if (chip_id(adap) <= CHELSIO_T5) in t4_intr_enable()
5859 if ((chip_id(adap) > CHELSIO_T5) && in t4_write_rss_key()
5925 if (chip_id(adapter) <= CHELSIO_T5) { in t4_read_rss_vf_config()
5963 if (chip_id(adapter) <= CHELSIO_T5) { in t4_write_rss_vf_config()
6752 if (n == 2 && chip_id(adap) <= CHELSIO_T5) in t4_get_mps_bg_map()
6767 if (n == 2 && chip_id(adap) <= CHELSIO_T5) in t4_get_rx_e_chan_map()
6892 if (chip_id(adap) >= CHELSIO_T5) { in t4_get_port_stats()
6931 if (chip_id(adap) >= CHELSIO_T5) { in t4_get_port_stats()
7345 case CHELSIO_T5: in t4_sge_decode_idma_state()
8460 if (chip_id(adap) <= CHELSIO_T5) in t4_change_mac()
9602 if (chip_id(adapter) <= CHELSIO_T5) { in t4_init_sge_params()
9728 if (chip_id(adap) > CHELSIO_T5) { in t4_init_tp_params()
11512 if (chip_id(adap) <= CHELSIO_T5) in t4_add_mac()