Lines Matching +full:partial +full:- +full:fpga +full:- +full:config
1 /*-
2 * SPDX-License-Identifier: BSD-2-Clause
48 * t4_wait_op_done_val - wait until an operation is completed
51 * @mask: a single-bit field within @reg that indicates completion
60 * operation completes and -EAGAIN otherwise.
73 if (--attempts == 0)
74 return -EAGAIN;
88 * t4_set_reg_field - set a register field to a value
107 * t4_read_indirect - read indirectly addressed registers
122 while (nregs--) {
130 * t4_write_indirect - write indirectly addressed registers
145 while (nregs--) {
152 * Read a 32-bit PCI Configuration Space register via the PCI-E backdoor
163 u32 req = V_FUNCTION(adap->pf) | V_REGISTER(reg);
181 * read-modify-write via t4_set_reg_field().)
189 * t4_report_fw_error - report firmware error
218 * Get the reply to a mailbox command and store it in @rpl in big-endian order.
223 for ( ; nflit; nflit--, mbox_addr += 8)
234 asrt->u.assert.filename_0_7,
235 be32_to_cpu(asrt->u.assert.line),
236 be32_to_cpu(asrt->u.assert.x),
237 be32_to_cpu(asrt->u.assert.y));
263 tx_state->rx_pause = t4_read_reg64(sc, rx_pause_reg);
264 tx_state->tx_frames = t4_read_reg64(sc, tx_frames_reg);
273 if (sc->chan_map[i] != 0xff)
286 if (sc->chan_map[i] == 0xff)
305 * t4_wr_mbox_meat_timeout - send a command to FW through the given mailbox
352 if (adap->flags & CHK_MBOX_ACCESS)
356 return -EINVAL;
358 if (adap->flags & IS_VF) {
371 timeout = -timeout;
378 if (!(adap->flags & IS_VF)) {
394 if (!(adap->flags & IS_VF)) {
399 ret = (v == X_MBOWNER_FW) ? -EBUSY : -ETIMEDOUT;
423 if (adap->flags & IS_VF) {
429 * to the VF's PL-register-backed Mailbox Control can
430 * race in front of the writes to the MA-backed VF
432 * read-back on at least one byte of the VF Mailbox
450 if (!(adap->flags & IS_VF)) {
463 if (delay_idx < ARRAY_SIZE(delay) - 1)
493 return -G_FW_CMD_RETVAL((int)res);
507 adap->flags &= ~FW_OK;
508 ret = pcie_fw & F_PCIE_FW_ERR ? -ENXIO : -ETIMEDOUT;
558 * t4_mc_read - read from MC through backdoor accesses
563 * @ecc: where to store the corresponding 64-bit ECC word
565 * Read 64 bytes of data from MC starting at a 64-byte-aligned address
567 * is assigned the 64-bit ECC word for the read data.
592 return -EBUSY;
604 for (i = 15; i >= 0; i--)
613 * t4_edc_read - read from EDC through backdoor accesses
618 * @ecc: where to store the corresponding 64-bit ECC word
620 * Read 64 bytes of data from EDC starting at a 64-byte-aligned address
622 * is assigned the 64-bit ECC word for the read data.
643 #define EDC_STRIDE_T5 (EDC_T51_BASE_ADDR - EDC_T50_BASE_ADDR)
657 return -EBUSY;
669 for (i = 15; i >= 0; i--)
678 * t4_mem_read - read EDC 0, EDC 1 or MC into buffer
687 * 32-bit boudaries. The memory is returned as a raw byte sequence from
689 * contain multi-byte integers, it's the callers responsibility to
702 return -EINVAL;
707 * copying out of the first line at (addr - start) a word at a time.
711 offset = (addr - start)/sizeof(__be32);
720 ret = t4_mc_read(adap, mtype - MEM_MC, pos, data, NULL);
731 len -= sizeof(__be32);
739 * Return the specified PCI-E Configuration Space register from our Physical
749 * retrieve the specified PCI-E Configuration Space register.
764 (F_FW_LDST_CMD_LC | V_FW_LDST_CMD_FN(adap->pf));
771 ret = t4_wr_mbox(adap, adap->mbox, &ldst_cmd, sizeof(ldst_cmd),
778 reg, -ret);
782 * Read the desired Configuration Space register via the PCI-E
789 * t4_get_regs_len - return the size of the chips register set
800 if (adapter->flags & IS_VF)
807 if (adapter->flags & IS_VF)
818 * t4_get_regs - read chip registers into provided buffer
1297 ((NUM_CIM_PF_MAILBOX_DATA_INSTANCES - 1) * 4),
2074 ((NUM_CIM_PF_MAILBOX_DATA_INSTANCES - 1) * 4),
2644 ((NUM_CIM_PF_MAILBOX_DATA_INSTANCES - 1) * 4),
3290 if (adap->flags & IS_VF) {
3300 if (adap->flags & IS_VF) {
3310 if (adap->flags & IS_VF) {
3320 if (adap->flags & IS_VF) {
3357 * Partial EEPROM Vital Product Data structure. The VPD starts with one ID
3358 * header followed by one or more VPD-R sections, each with its own header.
3387 * We have a per-adapter state variable "VPD Busy" to indicate when we have a
3390 * Request before any in-flight VPD reguest has completed.
3394 unsigned int base = adapter->params.pci.vpd_cap_addr;
3401 if (!adapter->vpd_busy)
3419 if ((val & PCI_VPD_ADDR_F) == adapter->vpd_flag) {
3420 adapter->vpd_busy = 0;
3423 } while (--max_poll);
3432 return -ETIMEDOUT;
3436 * t4_seeprom_read - read a serial EEPROM location
3441 * Read a 32-bit word from a location in serial EEPROM using the card's PCI
3447 unsigned int base = adapter->params.pci.vpd_cap_addr;
3451 * VPD Accesses must alway be 4-byte aligned!
3454 return -EINVAL;
3473 adapter->vpd_busy = 1;
3474 adapter->vpd_flag = PCI_VPD_ADDR_F;
3491 * t4_seeprom_write - write a serial EEPROM location
3496 * Write a 32-bit word to a location in serial EEPROM using the card's PCI
3502 unsigned int base = adapter->params.pci.vpd_cap_addr;
3508 * VPD Accesses must alway be 4-byte aligned!
3511 return -EINVAL;
3533 adapter->vpd_busy = 1;
3534 adapter->vpd_flag = 0;
3550 } while ((stats_reg & 0x1) && --max_poll);
3552 return -ETIMEDOUT;
3559 * t4_eeprom_ptov - translate a physical EEPROM address to virtual
3562 * @sz: size of function-specific area
3569 * [0..1K) -> [31K..32K)
3570 * [1K..1K+A) -> [ES-A..ES)
3571 * [1K+A..ES) -> [0..ES-A-1K)
3581 return EEPROMSIZE - fn + phys_addr - 1024;
3583 return phys_addr - 1024 - fn;
3584 return -EINVAL;
3588 * t4_seeprom_wp - enable/disable EEPROM write protection
3600 * get_vpd_keyword_val - Locates an information field keyword in the VPD
3606 * -ENOENT otherwise.
3616 tag = vpdr->vpdr_tag;
3617 len = (u16)vpdr->vpdr_len[0] + ((u16)vpdr->vpdr_len[1] << 8);
3618 while (region--) {
3621 if (++tag != vpdr->vpdr_tag)
3622 return -ENOENT;
3623 len = (u16)vpdr->vpdr_len[0] + ((u16)vpdr->vpdr_len[1] << 8);
3628 return -ENOENT;
3640 return -ENOENT;
3645 * get_vpd_params - read VPD parameters from VPD EEPROM
3687 return -EINVAL; \
3692 for (csum = 0; i >= 0; i--)
3698 return -EINVAL;
3707 memcpy(p->id, vpd + offsetof(struct t4_vpd_hdr, id_data), ID_LEN);
3708 strstrip(p->id);
3709 memcpy(p->ec, vpd + ec, EC_LEN);
3710 strstrip(p->ec);
3711 i = vpd[sn - VPD_INFO_FLD_HDR_SIZE + 2];
3712 memcpy(p->sn, vpd + sn, min(i, SERNUM_LEN));
3713 strstrip(p->sn);
3714 i = vpd[pn - VPD_INFO_FLD_HDR_SIZE + 2];
3715 memcpy(p->pn, vpd + pn, min(i, PN_LEN));
3716 strstrip((char *)p->pn);
3717 i = vpd[na - VPD_INFO_FLD_HDR_SIZE + 2];
3718 memcpy(p->na, vpd + na, min(i, MACADDR_LEN));
3719 strstrip((char *)p->na);
3726 snprintf(p->md, sizeof(p->md), "unknown");
3728 i = vpd[md - VPD_INFO_FLD_HDR_SIZE + 2];
3729 memcpy(p->md, vpd + md, min(i, MD_LEN));
3730 strstrip((char *)p->md);
3782 *lenp = FLASH_MAX_SIZE(l->nsecs);
3783 return (FLASH_START(l->start_sec));
3786 /* serial flash and firmware constants and flash config file constants */
3801 * sf1_read - read data from the serial flash
3819 return -EINVAL;
3821 return -EBUSY;
3822 op = V_SF_LOCK(lock) | V_CONT(cont) | V_BYTECNT(byte_cnt - 1);
3833 * sf1_write - write data to the serial flash
3848 return -EINVAL;
3850 return -EBUSY;
3853 V_CONT(cont) | V_BYTECNT(byte_cnt - 1) | V_OP(1));
3858 * flash_wait_op - wait for a flash operation to complete
3876 if (--attempts == 0)
3877 return -EAGAIN;
3884 * t4_read_flash - read words from serial flash
3887 * @nwords: how many 32-bit words to read
3891 * Read the specified number of 32-bit words from the serial flash.
3893 * (i.e., big-endian), otherwise as 32-bit words in the platform's
3901 if (addr + nwords * sizeof(u32) > adapter->params.sf_size || (addr & 3))
3902 return -EINVAL;
3910 for ( ; nwords; nwords--, data++) {
3923 * t4_write_flash - write up to a page of data to the serial flash
3933 * (i.e. matches what on disk), otherwise in big-endian.
3942 if (addr >= adapter->params.sf_size || offset + n > SF_PAGE_SIZE)
3943 return -EINVAL;
3951 for (left = n; left; left -= c) {
3975 if (memcmp(data - n, (u8 *)buf + offset, n)) {
3979 return -EIO;
3989 * t4_get_fw_version - read the firmware version
4004 * t4_get_fw_hdr - read the firmware header
4019 * t4_get_bs_version - read the firmware bootstrap version
4035 * t4_get_tp_version - read the TP microcode version
4050 * t4_get_exprom_version - return the Expansion ROM version (if any)
4057 * 0 on success, -ENOENT if no Expansion ROM is present.
4076 if (hdr->hdr_arr[0] != 0x55 || hdr->hdr_arr[1] != 0xaa)
4077 return -ENOENT;
4079 *vers = (V_FW_HDR_FW_VER_MAJOR(hdr->hdr_ver[0]) |
4080 V_FW_HDR_FW_VER_MINOR(hdr->hdr_ver[1]) |
4081 V_FW_HDR_FW_VER_MICRO(hdr->hdr_ver[2]) |
4082 V_FW_HDR_FW_VER_BUILD(hdr->hdr_ver[3]));
4087 * t4_get_scfg_version - return the Serial Configuration version
4097 * to retrieve the Serial Configuration version, so we zero-out the
4098 * return-value parameter in that case to avoid leaving it with
4116 ret = t4_query_params(adapter, adapter->mbox, adapter->pf, 0,
4124 * t4_get_vpd_version - return the VPD version
4134 * to retrieve the VPD version, so we zero-out the return-value parameter
4151 ret = t4_query_params(adapter, adapter->mbox, adapter->pf, 0,
4159 * t4_get_version_info - extract various chip/firmware version information
4178 FIRST_RET(t4_get_fw_version(adapter, &adapter->params.fw_vers));
4179 FIRST_RET(t4_get_bs_version(adapter, &adapter->params.bs_vers));
4180 FIRST_RET(t4_get_tp_version(adapter, &adapter->params.tp_vers));
4181 FIRST_RET(t4_get_exprom_version(adapter, &adapter->params.er_vers));
4182 FIRST_RET(t4_get_scfg_version(adapter, &adapter->params.scfg_vers));
4183 FIRST_RET(t4_get_vpd_version(adapter, &adapter->params.vpd_vers));
4191 * t4_flash_erase_sectors - erase a range of flash sectors
4202 if (end >= adapter->params.sf_nsec)
4203 return -EINVAL;
4222 * t4_flash_cfg_addr - return the address of the flash configuration file
4238 if (adapter->params.sf_size < cfg_start + len)
4239 return -ENOSPC;
4258 if ((is_t4(adap) && hdr->chip == FW_HDR_CHIP_T4) ||
4259 (is_t5(adap) && hdr->chip == FW_HDR_CHIP_T5) ||
4260 (is_t6(adap) && hdr->chip == FW_HDR_CHIP_T6) ||
4261 (is_t7(adap) && hdr->chip == FW_HDR_CHIP_T7))
4266 hdr->chip, chip_id(adap));
4271 * t4_load_fw - download firmware
4291 loc = ntohl(hdr->magic) == FW_HDR_MAGIC_BOOTSTRAP ?
4298 return -EINVAL;
4303 return -EINVAL;
4305 if ((unsigned int) be16_to_cpu(hdr->len512) * 512 != size) {
4308 return -EINVAL;
4313 return -EFBIG;
4316 return -EINVAL;
4324 return -EINVAL;
4328 ret = t4_flash_erase_sectors(adap, fw_start_sec, fw_start_sec + i - 1);
4338 ((struct fw_hdr *)first_page)->fw_ver = cpu_to_be32(0xffffffff);
4344 for (size -= SF_PAGE_SIZE; size; size -= SF_PAGE_SIZE) {
4354 sizeof(hdr->fw_ver), (const u8 *)&hdr->fw_ver, 1);
4363 * t4_fwcache - firmware cache operation
4375 V_FW_PARAMS_CMD_PFN(adap->pf) |
4383 return t4_wr_mbox(adap, adap->mbox, &c, sizeof(c), NULL);
4457 * fwcaps16_to_caps32 - convert 16-bit Port Capabilities to 32-bits
4458 * @caps16: a 16-bit Port Capabilities value
4460 * Returns the equivalent 32-bit Port Capabilities value.
4495 * fwcaps32_to_caps16 - convert 32-bit Port Capabilities to 16-bits
4496 * @caps32: a 32-bit Port Capabilities value
4498 * Returns the equivalent 16-bit Port Capabilities value. Note that
4499 * not all 32-bit Port Capabilities can be represented in the 16-bit
4572 * t4_link_l1cfg - apply link configuration to MAC/PHY
4578 * - If the PHY can auto-negotiate first decide what to advertise, then
4579 * enable/disable auto-negotiation as desired, and reset.
4580 * - If the PHY does not auto-negotiate just reset it.
4581 * - If auto-negotiation is off set the MAC to the proper speed/duplex/FC,
4582 * otherwise do it later based on the outcome of auto-negotiation.
4592 if (lc->requested_fc & PAUSE_RX)
4594 if (lc->requested_fc & PAUSE_TX)
4596 if (!(lc->requested_fc & PAUSE_AUTONEG))
4599 if (lc->requested_aneg == AUTONEG_DISABLE)
4601 else if (lc->requested_aneg == AUTONEG_ENABLE)
4604 aneg = lc->pcaps & FW_PORT_CAP32_ANEG;
4607 speed = lc->pcaps &
4609 } else if (lc->requested_speed != 0)
4610 speed = speed_to_fwcap(lc->requested_speed);
4612 speed = fwcap_top_speed(lc->pcaps);
4618 if (lc->pcaps & FW_PORT_CAP32_FORCE_FEC)
4619 force_fec = lc->force_fec;
4623 if (lc->requested_fec == FEC_AUTO) {
4646 fec |= fec_to_fwcap(lc->fec_hint);
4666 fec |= fec_to_fwcap(lc->requested_fec &
4668 if (lc->requested_fec & FEC_MODULE)
4669 fec |= fec_to_fwcap(lc->fec_hint);
4682 if (isset(&adap->bt_map, port))
4683 aneg = lc->pcaps & FW_PORT_CAP32_ANEG;
4686 if ((rcap | lc->pcaps) != lc->pcaps) {
4689 lc->pcaps, rcap & (rcap ^ lc->pcaps));
4691 rcap &= lc->pcaps;
4699 if (adap->params.port_caps32) {
4711 lc->requested_caps = rcap;
4716 * t4_restart_aneg - restart autonegotiation
4768 return ('-');
4778 enable = t4_read_reg(adap, ii->enable_reg);
4779 if (ii->flags & NONFATAL_IF_DISABLED)
4780 fatal = ii->fatal & t4_read_reg(adap, ii->enable_reg);
4782 fatal = ii->fatal;
4785 alert, ii->name, ii->cause_reg, cause, enable, fatal);
4788 for (details = ii->details; details && details->mask != 0; details++) {
4789 u32 msgbits = details->mask & cause;
4792 alert = intr_alert_char(msgbits, enable, ii->fatal);
4794 details->msg);
4817 cause = t4_read_reg(adap, ii->cause_reg);
4818 if (ii->cause_reg == A_PL_INT_CAUSE)
4819 cause &= t4_read_reg(adap, ii->enable_reg);
4822 fatal = cause & ii->fatal;
4823 if (fatal != 0 && ii->flags & NONFATAL_IF_DISABLED)
4824 fatal &= t4_read_reg(adap, ii->enable_reg);
4830 for (action = ii->actions; action && action->mask != 0; action++) {
4831 if (!(action->mask & cause))
4833 rc |= (action->action)(adap, action->arg, verbose);
4837 t4_write_reg(adap, ii->cause_reg, cause);
4838 (void)t4_read_reg(adap, ii->cause_reg);
4891 { F_MSIXADDRLPERR, "MSI-X AddrL parity error" },
4892 { F_MSIXADDRHPERR, "MSI-X AddrH parity error" },
4893 { F_MSIXDATAPERR, "MSI-X data parity error" },
4894 { F_MSIXDIPERR, "MSI-X DI parity error" },
4907 { F_CFGSNPPERR, "PCIe config snoop FIFO parity error" },
4922 { F_NONFATALERR, "PCIe non-fatal error" },
4933 { F_CFGSNPPERR, "config snoop FIFO parity error" },
4945 { F_MSIXDIPERR, "MSI-X DI SRAM parity error" },
4946 { F_MSIXDATAPERR, "MSI-X data SRAM parity error" },
4947 { F_MSIXADDRHPERR, "MSI-X AddrH SRAM parity error" },
4948 { F_MSIXADDRLPERR, "MSI-X AddrL SRAM parity error" },
4949 { F_MSIXSTIPERR, "MSI-X STI SRAM parity error" },
5035 "SGE GTS with timer 0-5 for IQID > 1023" },
5040 { F_ERR_CPL_OPCODE_0, "SGE received 0-length CPL" },
5070 "SGE GTS with timer 0-5 for IQID > 1023" },
5075 { F_ERR_CPL_OPCODE_0, "SGE received 0-length CPL" },
5176 { F_NCSI2CIMINTFPARERR, "CIM IBQ NC-SI interface parity error" },
5194 { F_IBQNCSIPARERR, "CIM IBQ NC-SI parity error" },
5200 { F_OBQNCSIPARERR, "CIM OBQ NC-SI parity error" },
5391 CH_ALERT(adap, " - PM_TX_DBG_STAT%u (0x%x) = 0x%08x\n", i,
5411 { F_ZERO_C_CMD_ERROR, "PMTX 0-length pcmd" },
5451 { F_ZERO_E_CMD_ERROR, "PMRX 0-length pcmd" },
5493 { F_ZERO_SWITCH_ERROR, "CPLSW no-switch error" },
5542 { F_T6_ACTCNTIPV6TZERO, "LE IPv6 active open TCAM counter -ve" },
5543 { F_T6_ACTCNTIPV4TZERO, "LE IPv4 active open TCAM counter -ve" },
5544 { F_T6_ACTCNTIPV6ZERO, "LE IPv6 active open counter -ve" },
5545 { F_T6_ACTCNTIPV4ZERO, "LE IPv4 active open counter -ve" },
5600 { F_NCSIFIFO, "MPS Tx NC-SI FIFO parity error" },
5812 "MA address wrap-around error by client %u to address %#x\n",
5892 * NC-SI interrupt handler.
5897 { F_CIM_DM_PRTY_ERR, "NC-SI CIM parity error" },
5898 { F_MPS_DM_PRTY_ERR, "NC-SI MPS parity error" },
5899 { F_TXFIFO_PRTY_ERR, "NC-SI Tx FIFO parity error" },
5900 { F_RXFIFO_PRTY_ERR, "NC-SI Rx FIFO parity error" },
6047 * t4_slow_intr_handler - control path interrupt handler
6051 * T4 interrupt handler for non-data global interrupt events, e.g., errors.
6082 { F_NCSI, "NC-SI" },
6111 { F_NCSI, "NC-SI" },
6130 { F_ULP_TX, -1, ulptx_intr_handler },
6131 { F_SGE, -1, sge_intr_handler },
6132 { F_CPL_SWITCH, -1, cplsw_intr_handler },
6133 { F_ULP_RX, -1, ulprx_intr_handler },
6134 { F_PM_RX, -1, pmrx_intr_handler},
6135 { F_PM_TX, -1, pmtx_intr_handler},
6136 { F_MA, -1, ma_intr_handler },
6137 { F_TP, -1, tp_intr_handler },
6138 { F_LE, -1, le_intr_handler },
6142 { F_PCIE, -1, pcie_intr_handler },
6147 { F_SMB, -1, smb_intr_handler},
6148 { F_PL, -1, plpl_intr_handler },
6149 { F_NCSI, -1, ncsi_intr_handler},
6150 { F_MPS, -1, mps_intr_handler },
6151 { F_CIM, -1, cim_intr_handler },
6155 { F_T7_ULP_TX, -1, ulptx_intr_handler },
6156 { F_T7_SGE, -1, sge_intr_handler },
6157 { F_T7_CPL_SWITCH, -1, cplsw_intr_handler },
6158 { F_T7_ULP_RX, -1, ulprx_intr_handler },
6159 { F_T7_PM_RX, -1, pmrx_intr_handler},
6160 { F_T7_PM_TX, -1, pmtx_intr_handler},
6161 { F_T7_MA, -1, ma_intr_handler },
6162 { F_T7_TP, -1, tp_intr_handler },
6163 { F_T7_LE, -1, le_intr_handler },
6168 { F_T7_PCIE, -1, pcie_intr_handler },
6173 { F_SMB, -1, smb_intr_handler},
6174 { F_PL, -1, plpl_intr_handler },
6175 { F_NCSI, -1, ncsi_intr_handler},
6176 { F_MPS, -1, mps_intr_handler },
6177 { F_CIM, -1, cim_intr_handler },
6216 * t4_intr_enable - enable interrupts
6219 * Enable PF-specific interrupts for the calling function and the top-level
6225 * non PF-specific interrupts from the various HW modules. Only one PCI
6246 t4_set_reg_field(adap, A_PL_INT_MAP0, 0, 1 << adap->pf);
6250 * t4_intr_disable - disable interrupts
6253 * Disable interrupts. We only disable the top-level interrupt
6261 t4_set_reg_field(adap, A_PL_INT_MAP0, 1 << adap->pf, 0);
6265 * hash_mac_addr - return the hash value of a MAC address
6266 * @addr: the 48-bit Ethernet MAC address
6282 * t4_config_rss_range - configure a portion of the RSS mapping table
6315 * a 32-bit word as 10-bit values with the upper remaining 2 bits
6334 n -= nq;
6346 * current 3-tuple position within the commad.
6352 nq -= nqbuf;
6355 nqbuf--;
6378 * t4_config_glbl_rss - configure the global RSS mode
6382 * @flags: mode-specific flags
6403 return -EINVAL;
6408 * t4_config_vi_rss - configure per VI RSS settings
6414 * @skeyidx: RSS secret key table index for non-global mode
6417 * Configures VI-specific RSS properties.
6448 * t4_read_rss - read the contents of the RSS mapping table
6452 * Reads the contents of the RSS hash->queue mapping table.
6458 int rss_nentries = adapter->chip_params->rss_nentries;
6471 * t4_tp_fw_ldst_rw - Access TP indirect register through LDST
6501 ret = t4_wr_mbox_meat(adap, adap->mbox, &c, sizeof(c), &c,
6513 * t4_tp_indirect_rw - Read/Write TP indirect register through LDST or backdoor
6530 int rc = -EINVAL;
6564 * t4_tp_pio_read - Read TP PIO registers
6581 * t4_tp_pio_write - Write TP PIO registers
6598 * t4_tp_tm_pio_read - Read TP TM PIO registers
6615 * t4_tp_mib_read - Read TP MIB registers
6632 * t4_read_rss_key - read the global RSS key
6634 * @key: 10-entry array holding the 320-bit RSS key
6637 * Reads the global 320-bit RSS key.
6645 * t4_write_rss_key - program one of the RSS keys
6647 * @key: 10-entry array holding the 320-bit RSS key
6651 * Writes one of the RSS keys with the given 320-bit value. If @idx is
6662 * T6 and later: for KeyMode 3 (per-vf and per-vf scramble),
6663 * allows access to key addresses 16-63 by using KeyWrAddrX
6684 * t4_read_rss_pf_config - read PF RSS Configuration Table
6700 * t4_write_rss_pf_config - write PF RSS Configuration Table
6717 * t4_read_rss_vf_config - read VF RSS Configuration Table
6755 * t4_write_rss_vf_config - write VF RSS Configuration Table
6794 * t4_read_rss_pf_map - read PF RSS Map
6810 * t4_write_rss_pf_map - write PF RSS Map
6822 * t4_read_rss_pf_mask - read PF RSS Mask
6838 * t4_write_rss_pf_mask - write PF RSS Mask
6850 * t4_tp_get_tcp_stats - read TP's TCP MIB counters
6862 u32 val[A_TP_MIB_TCP_RXT_SEG_LO - A_TP_MIB_TCP_OUT_RST + 1];
6864 #define STAT_IDX(x) ((A_TP_MIB_TCP_##x) - A_TP_MIB_TCP_OUT_RST)
6871 v4->tcp_out_rsts = STAT(OUT_RST);
6872 v4->tcp_in_segs = STAT64(IN_SEG);
6873 v4->tcp_out_segs = STAT64(OUT_SEG);
6874 v4->tcp_retrans_segs = STAT64(RXT_SEG);
6879 v6->tcp_out_rsts = STAT(OUT_RST);
6880 v6->tcp_in_segs = STAT64(IN_SEG);
6881 v6->tcp_out_segs = STAT64(OUT_SEG);
6882 v6->tcp_retrans_segs = STAT64(RXT_SEG);
6890 * t4_tp_get_err_stats - read TP's error MIB counters
6900 int nchan = adap->chip_params->nchan;
6902 t4_tp_mib_read(adap, st->mac_in_errs, nchan, A_TP_MIB_MAC_IN_ERR_0,
6905 t4_tp_mib_read(adap, st->hdr_in_errs, nchan, A_TP_MIB_HDR_IN_ERR_0,
6908 t4_tp_mib_read(adap, st->tcp_in_errs, nchan, A_TP_MIB_TCP_IN_ERR_0,
6911 t4_tp_mib_read(adap, st->tnl_cong_drops, nchan,
6914 t4_tp_mib_read(adap, st->ofld_chan_drops, nchan,
6917 t4_tp_mib_read(adap, st->tnl_tx_drops, nchan, A_TP_MIB_TNL_DROP_0,
6920 t4_tp_mib_read(adap, st->ofld_vlan_drops, nchan,
6923 t4_tp_mib_read(adap, st->tcp6_in_errs, nchan,
6926 t4_tp_mib_read(adap, &st->ofld_no_neigh, 2, A_TP_MIB_OFD_ARP_DROP,
6931 * t4_tp_get_err_stats - read TP's error MIB counters
6941 int nchan = adap->chip_params->nchan;
6943 t4_tp_mib_read(adap, st->out_pkt, nchan, A_TP_MIB_TNL_OUT_PKT_0,
6945 t4_tp_mib_read(adap, st->in_pkt, nchan, A_TP_MIB_TNL_IN_PKT_0,
6950 * t4_tp_get_proxy_stats - read TP's proxy MIB counters
6959 int nchan = adap->chip_params->nchan;
6961 t4_tp_mib_read(adap, st->proxy, nchan, A_TP_MIB_TNL_LPBK_0, sleep_ok);
6965 * t4_tp_get_cpl_stats - read TP's CPL MIB counters
6975 int nchan = adap->chip_params->nchan;
6977 t4_tp_mib_read(adap, st->req, nchan, A_TP_MIB_CPL_IN_REQ_0, sleep_ok);
6979 t4_tp_mib_read(adap, st->rsp, nchan, A_TP_MIB_CPL_OUT_RSP_0, sleep_ok);
6983 * t4_tp_get_rdma_stats - read TP's RDMA MIB counters
6992 t4_tp_mib_read(adap, &st->rqe_dfr_pkt, 2, A_TP_MIB_RQE_DFR_PKT,
6997 t4_tp_mib_read(adap, &st->pkts_in[0], 28, A_TP_MIB_RDMA_IN_PKT_0,
7002 * t4_get_fcoe_stats - read TP's FCoE MIB counters for a port
7015 t4_tp_mib_read(adap, &st->frames_ddp, 1, A_TP_MIB_FCOE_DDP_0 + idx,
7018 t4_tp_mib_read(adap, &st->frames_drop, 1,
7024 st->octets_ddp = ((u64)val[0] << 32) | val[1];
7028 * t4_get_usm_stats - read TP's non-TCP DDP MIB counters
7033 * Returns the values of TP's counters for non-TCP directly-placed packets.
7042 st->frames = val[0];
7043 st->drops = val[1];
7044 st->octets = ((u64)val[2] << 32) | val[3];
7048 * t4_tp_get_tid_stats - read TP's tid MIB counters.
7059 t4_tp_mib_read(adap, &st->del, 4, A_TP_MIB_TID_DEL, sleep_ok);
7063 * t4_read_mtu_tbl - returns the values in the HW path MTU table
7066 * @mtu_log: where to store the MTU base-2 log (may be %NULL)
7086 * t4_read_cong_tbl - reads the congestion control table
7107 * t4_tp_wr_bits_indirect - set/clear bits in an indirect TP register
7124 * init_cong_ctrl - initialize congestion control parameters
7171 * t4_load_mtus - write the MTU and congestion control HW tables
7177 * Write the HW MTU table with the supplied MTUs and the high-speed
7198 log2--;
7205 inc = max(((mtu - 40) * alpha[w]) / avg_pkts[w],
7215 * t4_set_pace_tbl - set the pace table
7230 return -ERANGE;
7236 return -ERANGE;
7238 return -ERANGE;
7246 * t4_set_sched_bps - set the bit rate for a HW traffic scheduler
7256 unsigned int clk = adap->params.vpd.cclk * 1000;
7260 kbps *= 125; /* -> bytes */
7266 delta = v >= kbps ? v - kbps : kbps - v;
7276 return -EINVAL;
7279 A_TP_TX_MOD_Q1_Q0_RATE_LIMIT - sched / 2);
7290 * t4_set_sched_ipg - set the IPG for a Tx HW packet rate scheduler
7299 unsigned int v, addr = A_TP_TX_MOD_Q1_Q0_TIMER_SEPARATOR - sched / 2;
7305 return -EINVAL;
7319 * Calculates a rate in bytes/s given the number of 256-byte units per 4K core
7330 u64 v = (u64)bytes256 * adap->params.vpd.cclk;
7336 * t4_get_chan_txrate - get the current per channel Tx rates
7351 if (adap->chip_params->nchan > 2) {
7359 if (adap->chip_params->nchan > 2) {
7366 * t4_set_trace_filter - configure one of the tracing filters
7385 return -EINVAL;
7401 * TODO - After T4 data book is updated, specify the exact
7404 * See T4 data book - MPS section for a complete description
7415 if (tp->snap_len > ((10 * 1024 / 4) - (2 * 8)))
7416 return -EINVAL;
7423 if (tp->snap_len > 9600 || idx)
7424 return -EINVAL;
7427 if (tp->port > (is_t4(adap) ? 11 : 19) || tp->invert > 1 ||
7428 tp->skip_len > M_TFLENGTH || tp->skip_ofst > M_TFOFFSET ||
7429 tp->min_len > M_TFMINPKTSIZE)
7430 return -EINVAL;
7435 ofst = (A_MPS_TRC_FILTER1_MATCH - A_MPS_TRC_FILTER0_MATCH) * idx;
7440 t4_write_reg(adap, data_reg, tp->data[i]);
7441 t4_write_reg(adap, mask_reg, ~tp->mask[i]);
7443 t4_write_reg(adap, match_ctl_b, V_TFCAPTUREMAX(tp->snap_len) |
7444 V_TFMINPKTSIZE(tp->min_len));
7445 t4_write_reg(adap, match_ctl_a, V_TFOFFSET(tp->skip_ofst) |
7446 V_TFLENGTH(tp->skip_len) | en | (is_t4(adap) ?
7447 V_TFPORT(tp->port) | V_TFINVERTMATCH(tp->invert) :
7448 V_T5_TFPORT(tp->port) | V_T5_TFINVERTMATCH(tp->invert)));
7454 * t4_get_trace_filter - query one of the tracing filters
7458 * @enabled: non-zero if the filter is enabled
7479 tp->port = G_TFPORT(ctla);
7480 tp->invert = !!(ctla & F_TFINVERTMATCH);
7483 tp->port = G_T5_TFPORT(ctla);
7484 tp->invert = !!(ctla & F_T5_TFINVERTMATCH);
7486 tp->snap_len = G_TFCAPTUREMAX(ctlb);
7487 tp->min_len = G_TFMINPKTSIZE(ctlb);
7488 tp->skip_ofst = G_TFOFFSET(ctla);
7489 tp->skip_len = G_TFLENGTH(ctla);
7491 ofst = (A_MPS_TRC_FILTER1_MATCH - A_MPS_TRC_FILTER0_MATCH) * idx;
7496 tp->mask[i] = ~t4_read_reg(adap, mask_reg);
7497 tp->data[i] = t4_read_reg(adap, data_reg) & tp->mask[i];
7502 * t4_set_trace_rss_control - configure the trace rss control register
7533 * t4_pmtx_get_stats - returns the HW stats from PMTX
7545 for (i = 0; i < adap->chip_params->pm_stats_cnt; i++) {
7562 * t4_pmrx_get_stats - returns the HW stats from PMRX
7574 for (i = 0; i < adap->chip_params->pm_stats_cnt; i++) {
7589 * t4_pmrx_cache_get_stats - returns the HW PMRX cache stats
7608 * t4_get_mps_bg_map - return the buffer groups associated with a port
7620 if (adap->params.mps_bg_map != UINT32_MAX)
7621 return ((adap->params.mps_bg_map >> (idx << 3)) & 0xff);
7623 n = adap->params.nports;
7633 * TP RX e-channels associated with the port.
7637 const u32 n = adap->params.nports;
7638 const u32 all_chan = (1 << adap->chip_params->nchan) - 1;
7640 switch (adap->params.tp.lb_mode) {
7655 adap->params.tp.lb_mode);
7661 * TP RX c-channel associated with the port.
7665 if (adap->params.tp_ch_map != UINT32_MAX)
7666 return (adap->params.tp_ch_map >> (8 * idx)) & 0xff;
7671 * TP TX c-channel associated with the port.
7675 if (adap->params.tx_tp_ch_map != UINT32_MAX)
7676 return (adap->params.tx_tp_ch_map >> (8 * idx)) & 0xff;
7681 * t4_get_port_type_description - return Port Type string description
7718 * t4_get_port_stats_offset - collect port stats relative to a previous
7736 *s -= *o;
7740 * t4_get_port_stats - collect port statistics
7753 port_id = adap->port_map[idx];
7754 MPASS(port_id >= 0 && port_id <= adap->params.nports);
7755 pi = adap->port[port_id];
7761 for (tx_chan = pi->tx_chan;
7762 tx_chan < pi->tx_chan + adap->params.tp.lb_nchan; tx_chan++) {
7763 p->tx_pause += GET_STAT(TX_PORT_PAUSE);
7764 p->tx_octets += GET_STAT(TX_PORT_BYTES);
7765 p->tx_frames += GET_STAT(TX_PORT_FRAMES);
7766 p->tx_bcast_frames += GET_STAT(TX_PORT_BCAST);
7767 p->tx_mcast_frames += GET_STAT(TX_PORT_MCAST);
7768 p->tx_ucast_frames += GET_STAT(TX_PORT_UCAST);
7769 p->tx_error_frames += GET_STAT(TX_PORT_ERROR);
7770 p->tx_frames_64 += GET_STAT(TX_PORT_64B);
7771 p->tx_frames_65_127 += GET_STAT(TX_PORT_65B_127B);
7772 p->tx_frames_128_255 += GET_STAT(TX_PORT_128B_255B);
7773 p->tx_frames_256_511 += GET_STAT(TX_PORT_256B_511B);
7774 p->tx_frames_512_1023 += GET_STAT(TX_PORT_512B_1023B);
7775 p->tx_frames_1024_1518 += GET_STAT(TX_PORT_1024B_1518B);
7776 p->tx_frames_1519_max += GET_STAT(TX_PORT_1519B_MAX);
7777 p->tx_drop += GET_STAT(TX_PORT_DROP);
7778 p->tx_ppp0 += GET_STAT(TX_PORT_PPP0);
7779 p->tx_ppp1 += GET_STAT(TX_PORT_PPP1);
7780 p->tx_ppp2 += GET_STAT(TX_PORT_PPP2);
7781 p->tx_ppp3 += GET_STAT(TX_PORT_PPP3);
7782 p->tx_ppp4 += GET_STAT(TX_PORT_PPP4);
7783 p->tx_ppp5 += GET_STAT(TX_PORT_PPP5);
7784 p->tx_ppp6 += GET_STAT(TX_PORT_PPP6);
7785 p->tx_ppp7 += GET_STAT(TX_PORT_PPP7);
7787 p->rx_pause += GET_STAT(RX_PORT_PAUSE);
7788 p->rx_octets += GET_STAT(RX_PORT_BYTES);
7789 p->rx_frames += GET_STAT(RX_PORT_FRAMES);
7790 p->rx_bcast_frames += GET_STAT(RX_PORT_BCAST);
7791 p->rx_mcast_frames += GET_STAT(RX_PORT_MCAST);
7792 p->rx_ucast_frames += GET_STAT(RX_PORT_UCAST);
7793 p->rx_too_long += GET_STAT(RX_PORT_MTU_ERROR);
7794 p->rx_jabber += GET_STAT(RX_PORT_MTU_CRC_ERROR);
7795 p->rx_len_err += GET_STAT(RX_PORT_LEN_ERROR);
7796 p->rx_symbol_err += GET_STAT(RX_PORT_SYM_ERROR);
7797 p->rx_runt += GET_STAT(RX_PORT_LESS_64B);
7798 p->rx_frames_64 += GET_STAT(RX_PORT_64B);
7799 p->rx_frames_65_127 += GET_STAT(RX_PORT_65B_127B);
7800 p->rx_frames_128_255 += GET_STAT(RX_PORT_128B_255B);
7801 p->rx_frames_256_511 += GET_STAT(RX_PORT_256B_511B);
7802 p->rx_frames_512_1023 += GET_STAT(RX_PORT_512B_1023B);
7803 p->rx_frames_1024_1518 += GET_STAT(RX_PORT_1024B_1518B);
7804 p->rx_frames_1519_max += GET_STAT(RX_PORT_1519B_MAX);
7805 p->rx_ppp0 += GET_STAT(RX_PORT_PPP0);
7806 p->rx_ppp1 += GET_STAT(RX_PORT_PPP1);
7807 p->rx_ppp2 += GET_STAT(RX_PORT_PPP2);
7808 p->rx_ppp3 += GET_STAT(RX_PORT_PPP3);
7809 p->rx_ppp4 += GET_STAT(RX_PORT_PPP4);
7810 p->rx_ppp5 += GET_STAT(RX_PORT_PPP5);
7811 p->rx_ppp6 += GET_STAT(RX_PORT_PPP6);
7812 p->rx_ppp7 += GET_STAT(RX_PORT_PPP7);
7814 MPASS(pi->fcs_reg == A_MPS_PORT_STAT_RX_PORT_CRC_ERROR_L);
7815 p->rx_fcs_err += GET_STAT(RX_PORT_CRC_ERROR);
7820 if (is_t6(adap) && pi->fcs_reg != -1)
7821 p->rx_fcs_err = t4_read_reg64(adap,
7822 t4_port_reg(adap, pi->tx_chan, pi->fcs_reg)) - pi->fcs_base;
7827 p->tx_frames -= p->tx_pause;
7828 p->tx_octets -= p->tx_pause * 64;
7831 p->tx_mcast_frames -= p->tx_pause;
7833 p->rx_frames -= p->rx_pause;
7834 p->rx_octets -= p->rx_pause * 64;
7837 p->rx_mcast_frames -= p->rx_pause;
7841 bgmap = pi->mps_bg_map;
7842 p->rx_ovflow0 = (bgmap & 1) ? GET_STAT_COM(RX_BG_0_MAC_DROP_FRAME) : 0;
7843 p->rx_ovflow1 = (bgmap & 2) ? GET_STAT_COM(RX_BG_1_MAC_DROP_FRAME) : 0;
7844 p->rx_ovflow2 = (bgmap & 4) ? GET_STAT_COM(RX_BG_2_MAC_DROP_FRAME) : 0;
7845 p->rx_ovflow3 = (bgmap & 8) ? GET_STAT_COM(RX_BG_3_MAC_DROP_FRAME) : 0;
7846 p->rx_trunc0 = (bgmap & 1) ? GET_STAT_COM(RX_BG_0_MAC_TRUNC_FRAME) : 0;
7847 p->rx_trunc1 = (bgmap & 2) ? GET_STAT_COM(RX_BG_1_MAC_TRUNC_FRAME) : 0;
7848 p->rx_trunc2 = (bgmap & 4) ? GET_STAT_COM(RX_BG_2_MAC_TRUNC_FRAME) : 0;
7849 p->rx_trunc3 = (bgmap & 8) ? GET_STAT_COM(RX_BG_3_MAC_TRUNC_FRAME) : 0;
7854 * t4_get_lb_stats - collect loopback port statistics
7869 p->octets = GET_STAT(BYTES);
7870 p->frames = GET_STAT(FRAMES);
7871 p->bcast_frames = GET_STAT(BCAST);
7872 p->mcast_frames = GET_STAT(MCAST);
7873 p->ucast_frames = GET_STAT(UCAST);
7874 p->error_frames = GET_STAT(ERROR);
7876 p->frames_64 = GET_STAT(64B);
7877 p->frames_65_127 = GET_STAT(65B_127B);
7878 p->frames_128_255 = GET_STAT(128B_255B);
7879 p->frames_256_511 = GET_STAT(256B_511B);
7880 p->frames_512_1023 = GET_STAT(512B_1023B);
7881 p->frames_1024_1518 = GET_STAT(1024B_1518B);
7882 p->frames_1519_max = GET_STAT(1519B_MAX);
7883 p->drop = GET_STAT(DROP_FRAMES);
7885 if (idx < adap->params.nports) {
7886 u32 bg = adap2pinfo(adap, idx)->mps_bg_map;
7888 p->ovflow0 = (bg & 1) ? GET_STAT_COM(RX_BG_0_LB_DROP_FRAME) : 0;
7889 p->ovflow1 = (bg & 2) ? GET_STAT_COM(RX_BG_1_LB_DROP_FRAME) : 0;
7890 p->ovflow2 = (bg & 4) ? GET_STAT_COM(RX_BG_2_LB_DROP_FRAME) : 0;
7891 p->ovflow3 = (bg & 8) ? GET_STAT_COM(RX_BG_3_LB_DROP_FRAME) : 0;
7892 p->trunc0 = (bg & 1) ? GET_STAT_COM(RX_BG_0_LB_TRUNC_FRAME) : 0;
7893 p->trunc1 = (bg & 2) ? GET_STAT_COM(RX_BG_1_LB_TRUNC_FRAME) : 0;
7894 p->trunc2 = (bg & 4) ? GET_STAT_COM(RX_BG_2_LB_TRUNC_FRAME) : 0;
7895 p->trunc3 = (bg & 8) ? GET_STAT_COM(RX_BG_3_LB_TRUNC_FRAME) : 0;
7903 * t4_wol_magic_enable - enable/disable magic packet WoL
7908 * Enables/disables magic packet wake-on-LAN for the selected port.
7941 * t4_wol_pat_enable - enable/disable pattern-based WoL
7945 * @mask0: byte mask for bytes 0-63 of a packet
7946 * @mask1: byte mask for bytes 64-127 of a packet
7952 * the resulting packet against @crc. If @enable is %true pattern-based
7973 return -EINVAL;
7992 return -ETIMEDOUT;
7999 return -ETIMEDOUT;
8007 /* t4_mk_filtdelwr - create a delete filter WR
8018 wr->op_pkd = cpu_to_be32(V_FW_WR_OP(FW_FILTER_WR));
8019 wr->len16_pkd = cpu_to_be32(V_FW_WR_LEN16(sizeof(*wr) / 16));
8020 wr->tid_to_iq = cpu_to_be32(V_FW_FILTER_WR_TID(ftid) |
8022 wr->del_filter_to_l2tix = cpu_to_be32(F_FW_FILTER_WR_DEL_FILTER);
8024 wr->rx_chan_rx_rpl_iq =
8055 * t4_mdio_rd - read a PHY register through MDIO
8089 * t4_mdio_wr - write a PHY register through MDIO
8121 * t4_sge_decode_idma_state - decode the idma state
8278 * t4_sge_ctxt_flush - flush the SGE context cache
8306 * t4_fw_hello - establish communication with FW
8311 * @state: returns the current device state (if non-NULL)
8346 if ((ret == -EBUSY || ret == -ETIMEDOUT) && retries-- > 0)
8366 * Note that we also do this wait if we're a non-Master-capable PF and
8388 waiting -= 50;
8399 if (retries-- > 0)
8402 return -ETIMEDOUT;
8434 * t4_fw_bye - end communication with FW
8450 * t4_fw_reset - issue a reset to FW
8468 * t4_fw_halt - issue a reset/halt to FW and put uP into RESET
8491 if (adap->flags & FW_OK && mbox <= M_PCIE_FW_MASTER) {
8528 * t4_fw_restart - restart the firmware by taking the uP out of RESET
8547 return -ETIMEDOUT;
8551 * t4_fw_upgrade - perform all of the steps necessary to upgrade FW
8576 be32_to_cpu(fw_hdr->magic) == FW_HDR_MAGIC_BOOTSTRAP;
8580 return -EINVAL;
8596 * t4_fw_initialize - ask FW to initialize the device
8613 * t4_query_params_rw - query FW or device parameters
8635 return -EINVAL;
8675 * t4_set_params_timeout - sets FW or device parameters
8697 return -EINVAL;
8706 while (nparams--) {
8715 * t4_set_params - sets FW or device parameters
8736 * t4_cfg_pfvf - configure PF/VF resource limits
8743 * @rxqi: the max number of interrupt-capable ingress queues
8784 * t4_alloc_vi_func - allocate a virtual interface
8801 * Returns a negative error number or the non-negative VI id.
8820 c.nmac = nmac - 1;
8845 *vfvld = adap->params.viid_smt_extn_support ?
8850 *vin = adap->params.viid_smt_extn_support ?
8859 * t4_alloc_vi - allocate an [Ethernet Function] virtual interface
8882 * t4_free_vi - free a virtual interface
8909 * t4_set_rxmode - set Rx properties of a virtual interface
8913 * @mtu: the new MTU or -1
8914 * @promisc: 1 to enable promiscuous mode, 0 to disable it, -1 no change
8915 * @all_multi: 1 to enable all-multi mode, 0 to disable it, -1 no change
8916 * @bcast: 1 to enable broadcast Rx, 0 to disable it, -1 no change
8917 * @vlanex: 1 to enable HW VLAN extraction, 0 to disable it, -1 no change
8955 * t4_alloc_encap_mac_filt - Adds a mac entry in mps tcam with VNI support
8987 p->valid_to_idx = cpu_to_be16(F_FW_VI_MAC_CMD_VALID |
8989 memcpy(p->macaddr, addr, sizeof(p->macaddr));
8990 memcpy(p->macaddr_mask, mask, sizeof(p->macaddr_mask));
8992 p->lookup_type_to_vni = cpu_to_be32(V_FW_VI_MAC_CMD_VNI(vni) |
8995 p->vni_mask_pkd = cpu_to_be32(V_FW_VI_MAC_CMD_VNI_MASK(vni_mask));
8997 ret = t4_wr_mbox_meat(adap, adap->mbox, &c, sizeof(c), &c, sleep_ok);
8999 ret = G_FW_VI_MAC_CMD_IDX(be16_to_cpu(p->valid_to_idx));
9004 * t4_alloc_raw_mac_filt - Adds a mac entry in mps tcam
9036 p->raw_idx_pkd = cpu_to_be32(V_FW_VI_MAC_CMD_RAW_IDX(idx));
9039 p->data0_pkd = cpu_to_be32(V_DATALKPTYPE(lookup_type) |
9042 p->data0m_pkd = cpu_to_be64(V_DATALKPTYPE(M_DATALKPTYPE) |
9046 memcpy((u8 *)&p->data1[0] + 2, addr, ETHER_ADDR_LEN);
9047 memcpy((u8 *)&p->data1m[0] + 2, mask, ETHER_ADDR_LEN);
9049 ret = t4_wr_mbox_meat(adap, adap->mbox, &c, sizeof(c), &c, sleep_ok);
9051 ret = G_FW_VI_MAC_CMD_RAW_IDX(be32_to_cpu(p->raw_idx_pkd));
9053 ret = -ENOMEM;
9060 * t4_alloc_mac_filt - allocates exact-match filters for MAC addresses
9071 * Allocates an exact-match filter for each of the supplied addresses and
9088 unsigned int max_naddr = adap->chip_params->mps_tcam_size;
9092 return -EINVAL;
9113 p->valid_to_idx =
9116 memcpy(p->macaddr, addr[offset+i], sizeof(p->macaddr));
9125 if (ret && ret != -FW_ENOMEM)
9130 be16_to_cpu(p->valid_to_idx));
9144 rem -= fw_naddr;
9147 if (ret == 0 || ret == -FW_ENOMEM)
9153 * t4_free_encap_mac_filt - frees MPS entry at given index
9183 p->valid_to_idx = cpu_to_be16(F_FW_VI_MAC_CMD_VALID |
9185 memcpy(p->macaddr, addr, sizeof(p->macaddr));
9187 ret = t4_wr_mbox_meat(adap, adap->mbox, &c, sizeof(c), &c, sleep_ok);
9192 * t4_free_raw_mac_filt - Frees a raw mac entry in mps tcam
9224 p->raw_idx_pkd = cpu_to_be32(V_FW_VI_MAC_CMD_RAW_IDX(idx) |
9228 p->data0_pkd = cpu_to_be32(V_DATALKPTYPE(lookup_type) |
9231 p->data0m_pkd = cpu_to_be64(V_DATALKPTYPE(M_DATALKPTYPE) |
9235 memcpy((u8 *)&p->data1[0] + 2, addr, ETHER_ADDR_LEN);
9236 memcpy((u8 *)&p->data1m[0] + 2, mask, ETHER_ADDR_LEN);
9238 return t4_wr_mbox_meat(adap, adap->mbox, &c, sizeof(c), &c, sleep_ok);
9242 * t4_free_mac_filt - frees exact-match filters of given MAC addresses
9250 * Frees the exact-match filter for each of the supplied addresses
9261 unsigned int max_naddr = adap->chip_params->mps_tcam_size;
9265 return -EINVAL;
9287 p->valid_to_idx = cpu_to_be16(
9290 memcpy(p->macaddr, addr[offset+i], sizeof(p->macaddr));
9299 be16_to_cpu(p->valid_to_idx));
9306 rem -= fw_naddr;
9315 * t4_change_mac - modifies the exact-match filter for a MAC address
9319 * @idx: index of existing filter for old value of MAC address, or -1
9324 * Modifies an exact-match filter and sets it to the new MAC address if
9342 unsigned int max_mac_addr = adap->chip_params->mps_tcam_size;
9353 p->valid_to_idx = cpu_to_be16(F_FW_VI_MAC_CMD_VALID |
9356 memcpy(p->macaddr, addr, sizeof(p->macaddr));
9360 ret = G_FW_VI_MAC_CMD_IDX(be16_to_cpu(p->valid_to_idx));
9362 ret = -ENOMEM;
9364 if (adap->params.viid_smt_extn_support)
9378 * t4_set_addr_hash - program the MAC inexact-match hash filter
9386 * Sets the 64-bit inexact-match hash filter for a virtual interface.
9406 * t4_enable_vi_params - enable/disable a virtual interface
9434 * t4_enable_vi - enable/disable a virtual interface
9451 * t4_identify_port - identify a VI's port by blinking its LED
9474 * t4_iq_stop - stop an ingress queue and its FLs
9507 * t4_iq_free - free an ingress queue and its FLs
9538 * t4_eth_eq_stop - stop an Ethernet egress queue
9564 * t4_eth_eq_free - free an Ethernet egress queue
9589 * t4_ctrl_eq_free - free a control egress queue
9614 * t4_ofld_eq_free - free an offload egress queue
9639 * t4_link_down_rc_str - return a string for a Link Down Reason Code
9649 "Auto-negotiation Failure",
9742 * lstatus_to_fwcap - translate old lstatus to 32-bit Port Capabilities
9746 * 32-bit Port Capabilities value.
9754 * 16-bit Port Information message isn't the same as the
9755 * 16-bit Port Capabilities bitfield used everywhere else ...
9785 struct link_config old_lc, *lc = &pi->link_cfg;
9790 old_ptype = pi->port_type;
9791 old_mtype = pi->mod_type;
9794 stat = be32_to_cpu(p->u.info.lstatus_to_modtype);
9796 pi->port_type = G_FW_PORT_CMD_PTYPE(stat);
9797 pi->mod_type = G_FW_PORT_CMD_MODTYPE(stat);
9798 pi->mdio_addr = stat & F_FW_PORT_CMD_MDIOCAP ?
9799 G_FW_PORT_CMD_MDIOADDR(stat) : -1;
9801 lc->pcaps = fwcaps16_to_caps32(be16_to_cpu(p->u.info.pcap));
9802 lc->acaps = fwcaps16_to_caps32(be16_to_cpu(p->u.info.acap));
9803 lc->lpacaps = fwcaps16_to_caps32(be16_to_cpu(p->u.info.lpacap));
9804 lc->link_ok = (stat & F_FW_PORT_CMD_LSTATUS) != 0;
9805 lc->link_down_rc = G_FW_PORT_CMD_LINKDNRC(stat);
9809 stat = be32_to_cpu(p->u.info32.lstatus32_to_cbllen32);
9811 pi->port_type = G_FW_PORT_CMD_PORTTYPE32(stat);
9812 pi->mod_type = G_FW_PORT_CMD_MODTYPE32(stat);
9813 pi->mdio_addr = stat & F_FW_PORT_CMD_MDIOCAP32 ?
9814 G_FW_PORT_CMD_MDIOADDR32(stat) : -1;
9816 lc->pcaps = be32_to_cpu(p->u.info32.pcaps32);
9817 lc->acaps = be32_to_cpu(p->u.info32.acaps32);
9818 lc->lpacaps = be32_to_cpu(p->u.info32.lpacaps32);
9819 lc->link_ok = (stat & F_FW_PORT_CMD_LSTATUS32) != 0;
9820 lc->link_down_rc = G_FW_PORT_CMD_LINKDNRC32(stat);
9822 linkattr = be32_to_cpu(p->u.info32.linkattr32);
9824 CH_ERR(pi->adapter, "bad port_info action 0x%x\n", action);
9828 lc->speed = fwcap_to_speed(linkattr);
9829 lc->fec = fwcap_to_fec(linkattr, true);
9836 lc->fc = fc;
9842 if (old_ptype != pi->port_type || old_mtype != pi->mod_type ||
9843 old_lc.pcaps != lc->pcaps) {
9844 if (pi->mod_type != FW_PORT_MOD_TYPE_NONE)
9845 lc->fec_hint = fwcap_to_fec(lc->acaps, true);
9849 if (old_lc.link_ok != lc->link_ok || old_lc.speed != lc->speed ||
9850 old_lc.fec != lc->fec || old_lc.fc != lc->fc) {
9857 * t4_update_port_info - retrieve and update port information if changed
9866 struct adapter *sc = pi->adapter;
9874 V_FW_PORT_CMD_PORTID(pi->hw_port));
9875 action = sc->params.port_caps32 ? FW_PORT_ACTION_GET_PORT_INFO32 :
9879 ret = t4_wr_mbox_ns(sc, sc->mbox, &cmd, sizeof(cmd), &cmd);
9888 * t4_handle_fw_rpl - process a FW reply message
9899 G_FW_PORT_CMD_ACTION(be32_to_cpu(p->action_to_len16));
9906 int hw_port = G_FW_PORT_CMD_PORTID(be32_to_cpu(p->op_to_portid));
9907 int port_id = adap->port_map[hw_port];
9910 MPASS(port_id >= 0 && port_id < adap->params.nports);
9911 pi = adap->port[port_id];
9924 return -EINVAL;
9930 * get_pci_mode - determine a card's PCI mode
9946 p->speed = val & PCI_EXP_LNKSTA_CLS;
9947 p->width = (val & PCI_EXP_LNKSTA_NLW) >> 4;
9959 * Table for non-standard supported Flash parts. Note, all Flash
9986 * Check to see if it's one of our non-standard supported Flash parts.
9990 adapter->params.sf_size =
9992 adapter->params.sf_nsec =
9993 adapter->params.sf_size / SF_SEC_SIZE;
10010 * This Density -> Size decoding table is taken from Micron
10027 case 0x9d: /* ISSI -- Integrated Silicon Solution, Inc. */
10029 * This Density -> Size decoding table is taken from ISSI
10041 * This Density -> Size decoding table is taken from Macronix
10053 * This Density -> Size decoding table is taken from Winbond
10079 adapter->params.sf_size = size;
10080 adapter->params.sf_nsec = size / SF_SEC_SIZE;
10088 if (adapter->params.sf_size < FLASH_MIN_SIZE)
10090 flashid, adapter->params.sf_size, FLASH_MIN_SIZE);
10187 chipid -= CHELSIO_T4;
10195 * t4_prep_adapter - prepare SW and HW for operation
10209 get_pci_mode(adapter, &adapter->params.pci);
10212 adapter->params.chipid = G_CHIPID(pl_rev);
10213 adapter->params.rev = G_REV(pl_rev);
10214 if (adapter->params.chipid == 0) {
10216 adapter->params.chipid = CHELSIO_T4;
10219 if (adapter->params.rev == 1) {
10221 return -EINVAL;
10225 adapter->chip_params = t4_get_chip_params(chip_id(adapter));
10226 if (adapter->chip_params == NULL)
10227 return -EINVAL;
10229 adapter->params.pci.vpd_cap_addr =
10239 adapter->params.cim_la_size = adapter->chip_params->cim_la_size;
10241 /* FPGA */
10242 adapter->params.fpga = 1;
10243 adapter->params.cim_la_size = 2 * adapter->chip_params->cim_la_size;
10246 ret = get_vpd_params(adapter, &adapter->params.vpd, device_id, buf);
10250 init_cong_ctrl(adapter->params.a_wnd, adapter->params.b_wnd);
10255 adapter->params.nports = 1;
10256 adapter->params.portvec = 1;
10257 adapter->params.vpd.cclk = 50000;
10265 * t4_shutdown_adapter - shut down adapter, host & wire
10273 * the port Link Status to go down -- if register writes work --
10279 const bool bt = adapter->bt_map != 0;
10308 * t4_bar2_sge_qregs - return BAR2 SGE Queue register information
10348 return -EINVAL;
10352 page_shift = adapter->params.sge.page_shift;
10358 ? adapter->params.sge.eq_s_qpp
10359 : adapter->params.sge.iq_s_qpp);
10360 qpp_mask = (1 << qpp_shift) - 1;
10382 * from the writes to the registers -- the Write Combined Doorbell
10400 * t4_init_devlog_ncores_params - initialize adap->params.devlog and ncores
10406 struct devlog_params *dparams = &adap->params.devlog;
10423 adap->params.ncores = 1 << ncore_shift;
10425 dparams->memtype = G_PCIE_FW_PF_DEVLOG_MEMTYPE(pf_dparams);
10426 dparams->start = G_PCIE_FW_PF_DEVLOG_ADDR16(pf_dparams) << 4;
10429 dparams->size = nentries * sizeof(struct fw_devlog_e);
10437 adap->params.ncores = 1;
10445 return -ENXIO;
10453 ret = t4_wr_mbox(adap, adap->mbox, &devlog_cmd, sizeof(devlog_cmd),
10460 dparams->memtype = G_FW_DEVLOG_CMD_MEMTYPE_DEVLOG(devlog_meminfo);
10461 dparams->start = G_FW_DEVLOG_CMD_MEMADDR16_DEVLOG(devlog_meminfo) << 4;
10462 dparams->size = be32_to_cpu(devlog_cmd.memsize_devlog);
10468 * t4_init_sge_params - initialize adap->params.sge
10476 struct sge_params *sp = &adapter->params.sge;
10480 sp->counter_val[0] = G_THRESHOLD_0(r);
10481 sp->counter_val[1] = G_THRESHOLD_1(r);
10482 sp->counter_val[2] = G_THRESHOLD_2(r);
10483 sp->counter_val[3] = G_THRESHOLD_3(r);
10495 sp->timer_val[0] = core_ticks_to_us(adapter, G_TIMERVALUE0(r)) * tscale;
10496 sp->timer_val[1] = core_ticks_to_us(adapter, G_TIMERVALUE1(r)) * tscale;
10498 sp->timer_val[2] = core_ticks_to_us(adapter, G_TIMERVALUE2(r)) * tscale;
10499 sp->timer_val[3] = core_ticks_to_us(adapter, G_TIMERVALUE3(r)) * tscale;
10501 sp->timer_val[4] = core_ticks_to_us(adapter, G_TIMERVALUE4(r)) * tscale;
10502 sp->timer_val[5] = core_ticks_to_us(adapter, G_TIMERVALUE5(r)) * tscale;
10505 sp->fl_starve_threshold = G_EGRTHRESHOLD(r) * 2 + 1;
10507 sp->fl_starve_threshold2 = sp->fl_starve_threshold;
10509 sp->fl_starve_threshold2 = G_EGRTHRESHOLDPACKING(r) * 2 + 1;
10511 sp->fl_starve_threshold2 = G_T6_EGRTHRESHOLDPACKING(r) * 2 + 1;
10516 (S_QUEUESPERPAGEPF1 - S_QUEUESPERPAGEPF0) * adapter->pf;
10517 sp->eq_s_qpp = r & M_QUEUESPERPAGEPF0;
10522 (S_QUEUESPERPAGEPF1 - S_QUEUESPERPAGEPF0) * adapter->pf;
10523 sp->iq_s_qpp = r & M_QUEUESPERPAGEPF0;
10527 (S_HOSTPAGESIZEPF1 - S_HOSTPAGESIZEPF0) * adapter->pf;
10528 sp->page_shift = (r & M_HOSTPAGESIZEPF0) + 10;
10531 sp->sge_control = r;
10532 sp->spg_len = r & F_EGRSTATUSPAGESIZE ? 128 : 64;
10533 sp->fl_pktshift = G_PKTSHIFT(r);
10535 sp->pad_boundary = 1 << (G_INGPADBOUNDARY(r) +
10538 sp->pad_boundary = 1 << (G_INGPADBOUNDARY(r) +
10542 sp->pack_boundary = sp->pad_boundary;
10546 sp->pack_boundary = 16;
10548 sp->pack_boundary = 1 << (G_INGPACKBOUNDARY(r) + 5);
10551 sp->sge_fl_buffer_size[i] = t4_read_reg(adapter,
10577 mask = (1 << t4_filter_field_width(adap, i)) - 1;
10587 * Read and cache the adapter's compressed filter mode and ingress config.
10594 struct tp_params *tpp = &adap->params.tp;
10603 rc = -t4_query_params(adap, adap->mbox, adap->pf, 0, 2, param, val);
10605 tpp->filter_mode = G_FW_PARAMS_PARAM_FILTER_MODE(val[0]);
10606 tpp->filter_mask = G_FW_PARAMS_PARAM_FILTER_MASK(val[0]);
10607 tpp->vnic_mode = val[1];
10610 * Old firmware. Read filter mode/mask and ingress config
10614 tpp->filter_mode = v & 0xffff;
10631 tpp->filter_mask = hashmask_to_filtermask(adap, hash_mask,
10632 tpp->filter_mode);
10636 tpp->vnic_mode = FW_VNIC_MODE_PF_VF;
10638 tpp->vnic_mode = FW_VNIC_MODE_OUTER_VLAN;
10647 tpp->ipsecidx_shift = t4_filter_field_shift(adap, F_IPSECIDX);
10648 tpp->fcoe_shift = t4_filter_field_shift(adap, F_T7_FCOE);
10649 tpp->port_shift = t4_filter_field_shift(adap, F_T7_PORT);
10650 tpp->vnic_shift = t4_filter_field_shift(adap, F_T7_VNIC_ID);
10651 tpp->vlan_shift = t4_filter_field_shift(adap, F_T7_VLAN);
10652 tpp->tos_shift = t4_filter_field_shift(adap, F_T7_TOS);
10653 tpp->protocol_shift = t4_filter_field_shift(adap, F_T7_PROTOCOL);
10654 tpp->ethertype_shift = t4_filter_field_shift(adap, F_T7_ETHERTYPE);
10655 tpp->macmatch_shift = t4_filter_field_shift(adap, F_T7_MACMATCH);
10656 tpp->matchtype_shift = t4_filter_field_shift(adap, F_T7_MPSHITTYPE);
10657 tpp->frag_shift = t4_filter_field_shift(adap, F_T7_FRAGMENTATION);
10658 tpp->roce_shift = t4_filter_field_shift(adap, F_ROCE);
10659 tpp->synonly_shift = t4_filter_field_shift(adap, F_SYNONLY);
10660 tpp->tcpflags_shift = t4_filter_field_shift(adap, F_TCPFLAGS);
10662 tpp->ipsecidx_shift = -1;
10663 tpp->fcoe_shift = t4_filter_field_shift(adap, F_FCOE);
10664 tpp->port_shift = t4_filter_field_shift(adap, F_PORT);
10665 tpp->vnic_shift = t4_filter_field_shift(adap, F_VNIC_ID);
10666 tpp->vlan_shift = t4_filter_field_shift(adap, F_VLAN);
10667 tpp->tos_shift = t4_filter_field_shift(adap, F_TOS);
10668 tpp->protocol_shift = t4_filter_field_shift(adap, F_PROTOCOL);
10669 tpp->ethertype_shift = t4_filter_field_shift(adap, F_ETHERTYPE);
10670 tpp->macmatch_shift = t4_filter_field_shift(adap, F_MACMATCH);
10671 tpp->matchtype_shift = t4_filter_field_shift(adap, F_MPSHITTYPE);
10672 tpp->frag_shift = t4_filter_field_shift(adap, F_FRAGMENTATION);
10673 tpp->roce_shift = -1;
10674 tpp->synonly_shift = -1;
10675 tpp->tcpflags_shift = -1;
10680 * t4_init_tp_params - initialize adap->params.tp
10688 struct tp_params *tpp = &adap->params.tp;
10691 tpp->tre = G_TIMERRESOLUTION(v);
10692 tpp->dack_re = G_DELAYEDACKRESOLUTION(v);
10696 tpp->rx_pkt_encap = false;
10697 tpp->lb_mode = 0;
10698 tpp->lb_nchan = 1;
10701 tpp->rx_pkt_encap = v & F_CRXPKTENC;
10704 tpp->lb_mode = G_T7_LB_MODE(v);
10705 if (tpp->lb_mode == 1)
10706 tpp->lb_nchan = 4;
10707 else if (tpp->lb_mode == 2)
10708 tpp->lb_nchan = 2;
10724 tpp->max_tx_pdu = tx_len;
10725 tpp->max_rx_pdu = rx_len;
10731 * t4_filter_field_width - returns the width of a filter field
10741 const int nopt = adap->chip_params->filter_num_opt;
10778 * t4_filter_field_shift - calculate filter field shift
10788 const unsigned int filter_mode = adap->params.tp.filter_mode;
10793 return -1;
10888 struct vi_info *vi = &p->vi[0];
10890 for (i = 0, j = -1; i <= p->port_id; i++) {
10893 } while ((adap->params.portvec & (1 << j)) == 0);
10896 p->hw_port = j;
10897 p->tx_chan = t4_get_tx_c_chan(adap, j);
10898 p->rx_chan = t4_get_rx_c_chan(adap, j);
10899 p->mps_bg_map = t4_get_mps_bg_map(adap, j);
10900 p->rx_e_chan_map = t4_get_rx_e_chan_map(adap, j);
10902 if (!(adap->flags & IS_VF) ||
10903 adap->params.vfres.r_caps & FW_CMD_CAP_PORT) {
10907 ret = t4_alloc_vi(adap, mbox, j, pf, vf, 1, addr, &vi->rss_size,
10908 &vi->vfvld, &vi->vin);
10912 vi->viid = ret;
10917 V_FW_PARAMS_PARAM_YZ(vi->viid);
10920 vi->rss_base = 0xffff;
10923 vi->rss_base = val & 0xffff;
10937 /* value is in 512-byte units */
10941 /* value is in 256-byte units */
10952 *thres = G_QUEFULLTHRSH(v) * 8; /* 8-byte unit */
10963 /* value is in 512-byte units */
10967 /* value is in 256-byte units */
10980 * t4_read_cimq_cfg_core - read CIM queue configuration on specific core
10993 unsigned int cim_num_ibq = adap->chip_params->cim_num_ibq;
10994 unsigned int cim_num_obq = adap->chip_params->cim_num_obq;
11010 /* It might take 3-10ms before the IBQ debug read access is allowed.
11031 * t4_read_cim_ibq_core - read the contents of a CIM inbound queue on
11037 * @n: capacity of @data in 32-bit words
11041 * of 4. Returns < 0 on error and the number of 32-bit words actually
11047 unsigned int cim_num_ibq = adap->chip_params->cim_num_ibq;
11051 if (qid > (cim_num_ibq - 1) || (n & 3))
11052 return -EINVAL;
11091 * t4_read_cim_obq_core - read the contents of a CIM outbound queue on
11097 * @n: capacity of @data in 32-bit words
11101 * of 4. Returns < 0 on error and the number of 32-bit words actually
11107 unsigned int cim_num_obq = adap->chip_params->cim_num_obq;
11111 if ((qid > (cim_num_obq - 1)) || (n & 3))
11112 return -EINVAL;
11131 * t4_cim_read_core - read a block from CIM internal address space
11140 * Reads a block of 4-byte words from the CIM intenal address space
11158 return -EBUSY;
11160 for ( ; !ret && n--; addr += 4) {
11172 * t4_cim_write_core - write a block into CIM internal address space
11181 * Writes a block of 4-byte words into the CIM intenal address space
11201 return -EBUSY;
11203 for ( ; !ret && n--; addr += 4) {
11214 * t4_cim_read_la_core - read CIM LA capture buffer on specific core
11251 for (i = 0; i < adap->params.cim_la_size; i++) {
11262 ret = -ETIMEDOUT;
11270 /* Bits 0-3 of UpDbgLaRdPtr can be between 0000 to 1001 to
11271 * identify the 32-bit portion of the full 312-bit data
11295 * t4_tp_read_la - read TP LA capture buffer
11312 adap->params.tp.la_mask | (cfg ^ F_DBGLAENABLE));
11324 val |= adap->params.tp.la_mask;
11334 la_buf[TPLA_SIZE - 1] = ~0ULL;
11338 cfg | adap->params.tp.la_mask);
11353 * t4_idma_monitor_init - initialize SGE Ingress DMA Monitor
11374 idma->idma_1s_thresh = core_ticks_per_usec(adapter) * 1000000; /* 1s */
11375 idma->idma_stalled[0] = idma->idma_stalled[1] = 0;
11379 * t4_idma_monitor - monitor SGE Ingress DMA state
11411 if (idma_same_state_cnt[i] < idma->idma_1s_thresh) {
11412 if (idma->idma_stalled[i] >= SGE_IDMA_WARN_THRESH*hz)
11415 i, idma->idma_qid[i],
11416 idma->idma_stalled[i]/hz);
11417 idma->idma_stalled[i] = 0;
11430 if (idma->idma_stalled[i] == 0) {
11431 idma->idma_stalled[i] = hz;
11432 idma->idma_warn[i] = 0;
11434 idma->idma_stalled[i] += ticks;
11435 idma->idma_warn[i] -= ticks;
11438 if (idma->idma_stalled[i] < SGE_IDMA_WARN_THRESH*hz)
11443 if (idma->idma_warn[i] > 0)
11445 idma->idma_warn[i] = SGE_IDMA_WARN_REPEAT*hz;
11453 idma->idma_state[i] = (debug0 >> (i * 9)) & 0x3f;
11457 idma->idma_qid[i] = (debug11 >> (i * 16)) & 0xffff;
11461 i, idma->idma_qid[i], idma->idma_state[i],
11462 idma->idma_stalled[i]/hz,
11464 t4_sge_decode_idma_state(adapter, idma->idma_state[i]);
11469 * t4_set_vf_mac - Set MAC address for the specified VF
11507 return t4_wr_mbox(adapter, adapter->mbox, &cmd, sizeof(cmd), &cmd);
11511 * t4_read_pace_tbl - read the pace table
11529 * t4_get_tx_sched - get the configuration of a Tx HW traffic scheduler
11543 addr = A_TP_TX_MOD_Q1_Q0_RATE_LIMIT - sched / 2;
11552 v = (adap->params.vpd.cclk * 1000) / cpt; /* ticks/s */
11557 addr = A_TP_TX_MOD_Q1_Q0_TIMER_SEPARATOR - sched / 2;
11567 * t4_load_cfg - download config file
11572 * Write the supplied config text file to the card's serial flash.
11586 return -EFBIG;
11592 flash_cfg_start_sec + i - 1);
11595 * with the on-adapter Firmware Configuration File.
11603 n = min(size - i, SF_PAGE_SIZE);
11613 CH_ERR(adap, "config file %s failed %d\n",
11619 * t5_fw_init_extern_mem - initialize the external memory
11635 ret = t4_set_params_timeout(adap, adap->mbox, adap->pf, 0, 1, params, val,
11670 * 0x2-0xFFFF: Reserved
11691 * 0x00: Intel IA-32, PC-AT compatible. Legacy
11693 * 0x02: Hewlett-Packard PA RISC. HP reserved
11695 * 0x04-0xFF: Reserved.
11713 * modify_device_id - Modifies the device ID of the Boot BIOS image
11731 le16_to_cpu(*(u16*)header->pcir_offset)];
11738 * 0x04-0xFF: Do not modify
11740 if (pcir_header->code_type == 0x00) {
11747 *(u16*) pcir_header->device_id = device_id;
11753 header->cksum = 0x0;
11758 for (i = 0; i < (header->size512 * 512); i++)
11765 boot_data[cur_header + 7] = -csum;
11767 } else if (pcir_header->code_type == 0x03) {
11772 *(u16*) pcir_header->device_id = device_id;
11781 if (pcir_header->indicator & 0x80)
11787 cur_header += header->size512 * 512;
11792 * t4_load_boot - download boot flash
11799 * The boot image has the following sections: a 28-byte header and the
11820 return -EFBIG;
11824 * The boot sector is comprised of the Expansion-ROM boot, iSCSI boot,
11830 (boot_sector >> 16) + i - 1);
11834 * with the on-adapter option ROM file
11841 pcir_offset = le16_to_cpu(*(u16 *)header->pcir_offset);
11852 return -EFBIG;
11859 if (le16_to_cpu(*(u16*)header->signature) != BOOT_SIGNATURE ) {
11861 return -EINVAL;
11867 if (le32_to_cpu(*(u32*)pcir_header->signature) != PCIR_SIGNATURE) {
11869 return -EINVAL;
11875 if (le16_to_cpu(*(u16*)pcir_header->vendor_id) != VENDOR_ID) {
11877 return -EINVAL;
11891 if (le16_to_cpu(*(u16*)pcir_header->device_id) != device_id) {
11906 for (size -= SF_PAGE_SIZE; size; size -= SF_PAGE_SIZE) {
11924 * t4_flash_bootcfg_addr - return the address of the flash optionrom configuration
11940 if (adapter->params.sf_size < start + len)
11941 return -ENOSPC;
11959 return -EFBIG;
11965 flash_cfg_start_sec + i - 1);
11969 * with the on-adapter OptionROM Configuration File.
11977 n = min(size - i, SF_PAGE_SIZE);
11987 CH_ERR(adap, "boot config data %s failed %d\n",
11993 * t4_set_filter_cfg - set up filter mode/mask and ingress config.
11997 * @vnic_mode: the ingress config/vnic mode setting
12009 const int maxbits = adap->chip_params->filter_opt_len;
12010 const int nopt = adap->chip_params->filter_num_opt;
12013 if (mode != -1 || mask != -1) {
12014 if (mode != -1) {
12026 return -E2BIG;
12047 fmask = fmode & adap->params.tp.filter_mask;
12048 if (fmask != adap->params.tp.filter_mask) {
12052 adap->params.tp.filter_mask, fmask, fmode);
12055 fmode = adap->params.tp.filter_mode;
12061 return -EINVAL;
12070 rc = t4_set_params(adap, adap->mbox, adap->pf, 0, 1, ¶m,
12076 if (vnic_mode != -1) {
12081 rc = t4_set_params(adap, adap->mbox, adap->pf, 0, 1, ¶m,
12094 * t4_clr_port_stats - clear port statistics
12106 port_id = adap->port_map[idx];
12107 MPASS(port_id >= 0 && port_id <= adap->params.nports);
12108 pi = adap->port[port_id];
12110 for (tx_chan = pi->tx_chan;
12111 tx_chan < pi->tx_chan + adap->params.tp.lb_nchan; tx_chan++) {
12121 bgmap = pi->mps_bg_map;
12132 * t4_i2c_io - read/write I2C data from adapter
12134 * @port: Port number if per-port device; <0 if not
12135 * @devid: per-port device ID or absolute device ID
12153 return -EINVAL;
12157 return -EINVAL;
12187 len -= i2c_len;
12210 * t4_sge_ctxt_rd - read an SGE context through FW
12256 * t4_sge_ctxt_rd_bd - read an SGE context bypassing FW
12292 cmd.u.config.sc = FW_SCHED_SC_CONFIG;
12293 cmd.u.config.type = type;
12294 cmd.u.config.minmaxen = minmaxen;
12296 return t4_wr_mbox_meat(adapter,adapter->mbox, &cmd, sizeof(cmd),
12327 return t4_wr_mbox_meat(adapter,adapter->mbox, &cmd, sizeof(cmd),
12349 return t4_wr_mbox_meat(adapter,adapter->mbox, &cmd, sizeof(cmd),
12359 return -EINVAL;
12374 return t4_wr_mbox_meat(adapter,adapter->mbox, &cmd, sizeof(cmd),
12400 return t4_wr_mbox_meat(adapter,adapter->mbox, &cmd, sizeof(cmd),
12405 * t4_config_watchdog - configure (enable/disable) a watchdog timer
12414 * action. Configure one of the watchdog timers by setting a non-zero
12427 * "tick" if the timeout is non-zero but the conversion results in 0
12456 ret = t4_wr_mbox(adapter, adapter->mbox, &devlog_cmd,
12475 return t4_wr_mbox(adapter, adapter->mbox, &devlog_cmd,
12484 adap->params.smac_add_support = 0;
12493 ret = t4_query_params(adap, adap->mbox, adap->pf, 0, 1, ¶m, &val);
12498 ret = t4_set_params(adap, adap->mbox, adap->pf, 0, 1,
12504 adap->params.smac_add_support = 1;
12522 ret = t4_query_params(adap, adap->mbox, adap->pf, 0, 1, ¶m, &val);
12534 ret = t4_set_params(adap, adap->mbox, adap->pf, 0, 1, ¶m, &val);
12546 * t4_set_vlan_acl - Set a VLAN id for the specified VF
12579 return t4_wr_mbox(adap, adap->mbox, &vlan_cmd, sizeof(vlan_cmd), NULL);
12583 * t4_del_mac - Removes the exact-match filter for a MAC address
12590 * Modifies an exact-match filter and sets it to the new MAC address if
12603 unsigned int max_mac_addr = adap->chip_params->mps_tcam_size;
12613 memcpy(p->macaddr, addr, sizeof(p->macaddr));
12614 p->valid_to_idx = cpu_to_be16(
12620 ret = G_FW_VI_MAC_CMD_IDX(be16_to_cpu(p->valid_to_idx));
12622 return -ENOMEM;
12629 * t4_add_mac - Adds an exact-match filter for a MAC address
12633 * @idx: index of existing filter for old value of MAC address, or -1
12639 * Modifies an exact-match filter and sets it to the new MAC address if
12652 unsigned int max_mac_addr = adap->chip_params->mps_tcam_size;
12665 p->valid_to_idx = cpu_to_be16(F_FW_VI_MAC_CMD_VALID |
12668 memcpy(p->macaddr, addr, sizeof(p->macaddr));
12672 ret = G_FW_VI_MAC_CMD_IDX(be16_to_cpu(p->valid_to_idx));
12674 return -ENOMEM;
12677 if (adap->params.viid_smt_extn_support)