Lines Matching +full:125 +full:ma
461 * actually backed by T4's "MA" interface rather than in t4_wr_mbox_meat_timeout()
465 * race in front of the writes to the MA-backed VF in t4_wr_mbox_meat_timeout()
4948 { F_MATAGPERR, "PCIe MA tag parity error" }, in pcie_intr_handler()
4968 { F_MAGRPPERR, "MA group FIFO parity error" }, in pcie_intr_handler()
5363 { F_TIMEOUTMAINT, "CIM PIF MA timeout" }, in cim_intr_handler()
5711 { F_MA_INTF_SDC_ERR, "PMRX MA interface SDC parity error" }, in pmrx_intr_handler()
6216 " MA address wrap-around by client %u to address %#x\n", in ma_wrap_status()
6226 * MA interrupt handler.
6579 { F_MAMST_INT_CAUSE, "MA master access error" }, in hma_intr_handler()
6602 { F_MA_FIFO_PERR, "MA arbiter FIFO parity error" }, in cryptokey_intr_handler()
6603 { F_MA_RSP_PERR, "MA response IF parity error" }, in cryptokey_intr_handler()
6613 { F_MA_INV_RSP_TAG, "MA invalid response tag" }, in cryptokey_intr_handler()
6907 { F_MA, "MA" }, in t4_slow_intr_handler()
6984 { F_T7_MA, "MA" }, in t4_slow_intr_handler()
7083 { F_T7_PL_PERR_MA, "MA" }, in t4_slow_intr_handler()
8208 kbps *= 125; /* -> bytes */ in t4_set_sched_bps()
12501 *kbps = (v * bpt) / 125; in t4_get_tx_sched()