52 		int cfg = t3_read_reg(adap, A_XGM_PORT_CFG + mac->offset);  in xgm_reset_ctrl()
80 	(void)t3_read_reg(adap, ctrl);  in xaui_serdes_reset()
163 	(void) t3_read_reg(adap, A_XGM_RESET_CTRL + oft);    /* flush */  in t3_mac_init()
209 	(void) t3_read_reg(adap, A_XGM_RESET_CTRL + oft);  /* flush */  in t3_mac_init()
228 	store_mps = t3_read_reg(adap, A_MPS_CFG);  in t3_mac_reset()
242 	(void) t3_read_reg(adap, A_XGM_RESET_CTRL + oft);    /* flush */  in t3_mac_reset()
246 	store = t3_read_reg(adap, A_TP_PIO_DATA);  in t3_mac_reset()
263 		u32 intr = t3_read_reg(adap, A_XGM_INT_ENABLE + oft);  in t3_mac_reset()
272 		(void) t3_read_reg(adap, A_XGM_PORT_CFG + oft);  in t3_mac_reset()
275 		(void) t3_read_reg(adap, A_XGM_PORT_CFG + oft);  in t3_mac_reset()
282 		(void) t3_read_reg(adap, A_XGM_RESET_CTRL + oft);    /* flush */  in t3_mac_reset()
286 		(void) t3_read_reg(adap, A_XGM_RESET_CTRL + oft);  /* flush */  in t3_mac_reset()
370 		u32 v = t3_read_reg(mac->adapter, reg);  in t3_mac_disable_exact_filters()
373 	t3_read_reg(mac->adapter, A_XGM_RX_EXACT_MATCH_LOW_1); /* flush */  in t3_mac_disable_exact_filters()
381 		u32 v = t3_read_reg(mac->adapter, reg);  in t3_mac_enable_exact_filters()
384 	t3_read_reg(mac->adapter, A_XGM_RX_EXACT_MATCH_LOW_1); /* flush */  in t3_mac_enable_exact_filters()
503 	    (t3_read_reg(adap, A_XGM_RX_CTRL + mac->offset) & F_RXEN)) {  in t3_mac_set_mtu()
505 		v = t3_read_reg(adap, A_XGM_RX_CFG + mac->offset);  in t3_mac_set_mtu()
534 	v = t3_read_reg(adap, A_XGM_RXFIFO_CFG + mac->offset);  in t3_mac_set_mtu()
586 		    G_RXMAXPKTSIZE(t3_read_reg(adap,  in t3_mac_set_speed_duplex_fc()
588 		val = t3_read_reg(adap, A_XGM_RXFIFO_CFG + oft);  in t3_mac_set_speed_duplex_fc()
613 			u32 old = t3_read_reg(adap, A_XGM_PORT_CFG + oft);  in t3_mac_set_speed_duplex_fc()
622 	val = t3_read_reg(adap, A_XGM_RXFIFO_CFG + oft);  in t3_mac_set_speed_duplex_fc()
626 		    G_RXMAXPKTSIZE(t3_read_reg(adap,  in t3_mac_set_speed_duplex_fc()
670 		mac->tx_tcnt = (G_TXDROPCNTCH0RCVD(t3_read_reg(adap,  in t3_mac_enable()
672 		mac->tx_xcnt = (G_TXSPI4SOPCNT(t3_read_reg(adap,  in t3_mac_enable()
677 		mac->rx_xcnt = (G_TXSPI4SOPCNT(t3_read_reg(adap,  in t3_mac_enable()
730 		tx_mcnt = t3_read_reg(adap, A_XGM_STAT_TX_FRAME_LOW);  in t3b2_mac_watchdog_task()
738 		tx_xcnt = (G_TXSPI4SOPCNT(t3_read_reg(adap,  in t3b2_mac_watchdog_task()
741 		cfg = t3_read_reg(adap, A_MPS_CFG);  in t3b2_mac_watchdog_task()
747 			tx_tcnt = (G_TXDROPCNTCH0RCVD(t3_read_reg(adap,  in t3b2_mac_watchdog_task()
777 		t3_read_reg(adap, A_XGM_TX_CTRL + mac->offset);  /* flush */  in t3b2_mac_watchdog_task()
779 		t3_read_reg(adap, A_XGM_TX_CTRL + mac->offset);  /* flush */  in t3b2_mac_watchdog_task()
800 #define RMON_READ(mac, addr) t3_read_reg(mac->adapter, addr + mac->offset)  in t3_mac_update_stats()
855 	v = t3_read_reg(mac->adapter, A_TP_MIB_RDATA);  in t3_mac_update_stats()