97 static int ael2xxx_get_module_type(struct cphy *phy, int delay_ms);
99 static int set_phy_regs(struct cphy *phy, const struct reg_val *rv)  in set_phy_regs()  argument
105 			err = mdio_write(phy, rv->mmd_addr, rv->reg_addr,  in set_phy_regs()
108 			err = t3_mdio_change_bits(phy, rv->mmd_addr,  in set_phy_regs()
115 static void ael100x_txon(struct cphy *phy)  in ael100x_txon()  argument
117 	int tx_on_gpio = phy->addr == 0 ? F_GPIO7_OUT_VAL : F_GPIO2_OUT_VAL;  in ael100x_txon()
120 	t3_set_reg_field(phy->adapter, A_T3DBG_GPIO_EN, 0, tx_on_gpio);  in ael100x_txon()
127 static int ael_i2c_rd(struct cphy *phy, int dev_addr, int word_addr)  in ael_i2c_rd()  argument
132 	err = mdio_write(phy, MDIO_DEV_PMA_PMD, AEL_I2C_CTRL,  in ael_i2c_rd()
139 		err = mdio_read(phy, MDIO_DEV_PMA_PMD, AEL_I2C_STAT, &stat);  in ael_i2c_rd()
143 			err = mdio_read(phy, MDIO_DEV_PMA_PMD, AEL_I2C_DATA,  in ael_i2c_rd()
150 	CH_WARN(phy->adapter, "PHY %u i2c read of dev.addr %x.%x timed out\n",  in ael_i2c_rd()
151 		phy->addr, dev_addr, word_addr);  in ael_i2c_rd()
158 static int ael_i2c_wr(struct cphy *phy, int dev_addr, int word_addr, int data)  in ael_i2c_wr()  argument
163 	err = mdio_write(phy, MDIO_DEV_PMA_PMD, AEL_I2C_DATA, data);  in ael_i2c_wr()
167 	err = mdio_write(phy, MDIO_DEV_PMA_PMD, AEL_I2C_CTRL,  in ael_i2c_wr()
174 		err = mdio_read(phy, MDIO_DEV_PMA_PMD, AEL_I2C_STAT, &stat);  in ael_i2c_wr()
180 	CH_WARN(phy->adapter, "PHY %u i2c Write of dev.addr %x.%x = %#x timed out\n",  in ael_i2c_wr()
181 		phy->addr, dev_addr, word_addr, data);  in ael_i2c_wr()
185 static int get_phytrans_type(struct cphy *phy)  in get_phytrans_type()  argument
189 	v = ael_i2c_rd(phy, MODULE_DEV_ADDR, 0);  in get_phytrans_type()
196 static int ael_laser_down(struct cphy *phy, int enable)  in ael_laser_down()  argument
200 	v = get_phytrans_type(phy);  in ael_laser_down()
206 		v = ael_i2c_rd(phy, MODULE_DEV_ADDR, 93);  in ael_laser_down()
220 	v = ael_i2c_rd(phy, dev_addr, 110);  in ael_laser_down()
229 	v = ael_i2c_wr(phy, dev_addr, 110, v);  in ael_laser_down()
234 static int ael1002_power_down(struct cphy *phy, int enable)  in ael1002_power_down()  argument
238 	err = mdio_write(phy, MDIO_DEV_PMA_PMD, AEL100X_TX_DISABLE, !!enable);  in ael1002_power_down()
240 		err = t3_mdio_change_bits(phy, MDIO_DEV_PMA_PMD, MII_BMCR,  in ael1002_power_down()
245 static int ael1002_get_module_type(struct cphy *phy, int delay_ms)  in ael1002_get_module_type()  argument
252 	v = ael2xxx_get_module_type(phy, delay_ms);  in ael1002_get_module_type()
257 static int ael1002_reset(struct cphy *phy, int wait)  in ael1002_reset()  argument
261 	if ((err = ael1002_power_down(phy, 0)) ||  in ael1002_reset()
262 	    (err = mdio_write(phy, MDIO_DEV_PMA_PMD, AEL100X_TX_CONFIG1, 1)) ||  in ael1002_reset()
263 	    (err = mdio_write(phy, MDIO_DEV_PMA_PMD, AEL1002_PWR_DOWN_HI, 0)) ||  in ael1002_reset()
264 	    (err = mdio_write(phy, MDIO_DEV_PMA_PMD, AEL1002_PWR_DOWN_LO, 0)) ||  in ael1002_reset()
265 	    (err = mdio_write(phy, MDIO_DEV_PMA_PMD, AEL1002_XFI_EQL, 0x18)) ||  in ael1002_reset()
266 	    (err = t3_mdio_change_bits(phy, MDIO_DEV_PMA_PMD, AEL1002_LB_EN,  in ael1002_reset()
270 	err = ael1002_get_module_type(phy, 300);  in ael1002_reset()
272 		phy->modtype = err;  in ael1002_reset()
277 static int ael1002_intr_noop(struct cphy *phy)  in ael1002_intr_noop()  argument
285 static int get_link_status_r(struct cphy *phy, int *link_state, int *speed,  in get_link_status_r()  argument
290 		int err = mdio_read(phy, MDIO_DEV_PMA_PMD, PMD_RSD, &stat0);  in get_link_status_r()
293 			err = mdio_read(phy, MDIO_DEV_PCS, PCS_STAT1_R, &stat1);  in get_link_status_r()
295 			err = mdio_read(phy, MDIO_DEV_XGXS, XS_LN_STAT, &stat2);  in get_link_status_r()
347 	struct cphy *phy = &pinfo->phy;  in t3_ael1002_phy_prep()  local
349 	cphy_init(phy, pinfo->adapter, pinfo, phy_addr, &ael1002_ops, mdio_ops,  in t3_ael1002_phy_prep()
352 	ael100x_txon(phy);  in t3_ael1002_phy_prep()
353 	ael_laser_down(phy, 0);  in t3_ael1002_phy_prep()
355 	err = ael1002_get_module_type(phy, 0);  in t3_ael1002_phy_prep()
357 		phy->modtype = err;  in t3_ael1002_phy_prep()
362 static int ael1006_reset(struct cphy *phy, int wait)  in ael1006_reset()  argument
366 	err = t3_phy_reset(phy, MDIO_DEV_PMA_PMD, wait);  in ael1006_reset()
370 	t3_set_reg_field(phy->adapter, A_T3DBG_GPIO_EN,   in ael1006_reset()
375 	t3_set_reg_field(phy->adapter, A_T3DBG_GPIO_EN,   in ael1006_reset()
380 	err = t3_phy_reset(phy, MDIO_DEV_PMA_PMD, wait);  in ael1006_reset()
386 	err = t3_mdio_change_bits(phy, MDIO_DEV_PMA_PMD, MII_BMCR, 1, 1);  in ael1006_reset()
392 	err = t3_mdio_change_bits(phy, MDIO_DEV_PMA_PMD, MII_BMCR, 1, 0);  in ael1006_reset()
428 	struct cphy *phy = &pinfo->phy;  in t3_ael1006_phy_prep()  local
430 	cphy_init(phy, pinfo->adapter, pinfo, phy_addr, &ael1006_ops, mdio_ops,  in t3_ael1006_phy_prep()
433 	phy->modtype = phy_modtype_sr;  in t3_ael1006_phy_prep()
434 	ael100x_txon(phy);  in t3_ael1006_phy_prep()
441 static int ael2xxx_get_module_type(struct cphy *phy, int delay_ms)  in ael2xxx_get_module_type()  argument
448 	v = get_phytrans_type(phy);  in ael2xxx_get_module_type()
452 		v = ael_i2c_rd(phy, MODULE_DEV_ADDR, 3);  in ael2xxx_get_module_type()
465 		v = ael_i2c_rd(phy, MODULE_DEV_ADDR, 8);  in ael2xxx_get_module_type()
469 			v = ael_i2c_rd(phy, MODULE_DEV_ADDR, 60);  in ael2xxx_get_module_type()
476 		v = ael_i2c_rd(phy, MODULE_DEV_ADDR, 6);  in ael2xxx_get_module_type()
482 		v = ael_i2c_rd(phy, MODULE_DEV_ADDR, 10);  in ael2xxx_get_module_type()
488 			v = ael_i2c_rd(phy, MODULE_DEV_ADDR, 0x12);  in ael2xxx_get_module_type()
497 		v = ael_i2c_rd(phy, MODULE_DEV_ADDR, 127);  in ael2xxx_get_module_type()
506 		v = ael_i2c_rd(phy, MODULE_DEV_ADDR, 131);  in ael2xxx_get_module_type()
524 static int ael2005_setup_sr_edc(struct cphy *phy)  in ael2005_setup_sr_edc()  argument
807 	err = set_phy_regs(phy, regs);  in ael2005_setup_sr_edc()
814 		err = mdio_write(phy, MDIO_DEV_PMA_PMD, sr_edc[i],  in ael2005_setup_sr_edc()
817 		phy->priv = edc_sr;  in ael2005_setup_sr_edc()
821 static int ael2005_setup_twinax_edc(struct cphy *phy, int modtype)  in ael2005_setup_twinax_edc()  argument
1202 	err = set_phy_regs(phy, regs);  in ael2005_setup_twinax_edc()
1204 		err = set_phy_regs(phy, preemphasis);  in ael2005_setup_twinax_edc()
1211 		err = mdio_write(phy, MDIO_DEV_PMA_PMD, twinax_edc[i],  in ael2005_setup_twinax_edc()
1214 		phy->priv = edc_twinax;  in ael2005_setup_twinax_edc()
1218 static int ael2005_get_module_type(struct cphy *phy, int delay_ms)  in ael2005_get_module_type()  argument
1223 	v = mdio_read(phy, MDIO_DEV_PMA_PMD, AEL2005_GPIO_CTRL, &stat);  in ael2005_get_module_type()
1230 	return ael2xxx_get_module_type(phy, delay_ms);  in ael2005_get_module_type()
1233 static int ael2005_intr_enable(struct cphy *phy)  in ael2005_intr_enable()  argument
1235 	int err = mdio_write(phy, MDIO_DEV_PMA_PMD, AEL2005_GPIO_CTRL, 0x200);  in ael2005_intr_enable()
1236 	return err ? err : t3_phy_lasi_intr_enable(phy);  in ael2005_intr_enable()
1239 static int ael2005_intr_disable(struct cphy *phy)  in ael2005_intr_disable()  argument
1241 	int err = mdio_write(phy, MDIO_DEV_PMA_PMD, AEL2005_GPIO_CTRL, 0x100);  in ael2005_intr_disable()
1242 	return err ? err : t3_phy_lasi_intr_disable(phy);  in ael2005_intr_disable()
1245 static int ael2005_intr_clear(struct cphy *phy)  in ael2005_intr_clear()  argument
1247 	int err = mdio_write(phy, MDIO_DEV_PMA_PMD, AEL2005_GPIO_CTRL, 0xd00);  in ael2005_intr_clear()
1248 	return err ? err : t3_phy_lasi_intr_clear(phy);  in ael2005_intr_clear()
1251 static int ael2005_reset(struct cphy *phy, int wait)  in ael2005_reset()  argument
1272 	err = mdio_read(phy, MDIO_DEV_PMA_PMD, LASI_CTRL, &lasi_ctrl);  in ael2005_reset()
1276 	err = t3_phy_reset(phy, MDIO_DEV_PMA_PMD, 0);  in ael2005_reset()
1281 	phy->priv = edc_none;  in ael2005_reset()
1282 	err = set_phy_regs(phy, regs0);  in ael2005_reset()
1288 	err = ael2005_get_module_type(phy, 0);  in ael2005_reset()
1291 	phy->modtype = (u8)err;  in ael2005_reset()
1296 		err = ael2005_setup_twinax_edc(phy, err);  in ael2005_reset()
1298 		err = ael2005_setup_sr_edc(phy);  in ael2005_reset()
1302 	err = set_phy_regs(phy, regs1);  in ael2005_reset()
1308 		err = ael2005_intr_enable(phy);  in ael2005_reset()
1312 static int ael2005_intr_handler(struct cphy *phy)  in ael2005_intr_handler()  argument
1317 	ret = mdio_read(phy, MDIO_DEV_PMA_PMD, AEL2005_GPIO_STAT, &stat);  in ael2005_intr_handler()
1322 		ret = mdio_write(phy, MDIO_DEV_PMA_PMD, AEL2005_GPIO_CTRL,  in ael2005_intr_handler()
1328 		ret = ael2005_get_module_type(phy, 300);  in ael2005_intr_handler()
1332 		phy->modtype = (u8)ret;  in ael2005_intr_handler()
1334 			edc_needed = phy->priv;       /* on unplug retain EDC */  in ael2005_intr_handler()
1341 		if (edc_needed != phy->priv) {  in ael2005_intr_handler()
1342 			ret = ael2005_reset(phy, 0);  in ael2005_intr_handler()
1348 	ret = t3_phy_lasi_intr_handler(phy);  in ael2005_intr_handler()
1387 	struct cphy *phy = &pinfo->phy;  in t3_ael2005_phy_prep()  local
1389 	cphy_init(phy, pinfo->adapter, pinfo, phy_addr, &ael2005_ops, mdio_ops,  in t3_ael2005_phy_prep()
1393 	ael_laser_down(phy, 0);  in t3_ael2005_phy_prep()
1395 	err = ael2005_get_module_type(phy, 0);  in t3_ael2005_phy_prep()
1397 		phy->modtype = err;  in t3_ael2005_phy_prep()
1399 	return t3_mdio_change_bits(phy, MDIO_DEV_PMA_PMD, AEL_OPT_SETTINGS, 0,  in t3_ael2005_phy_prep()
1406 static int ael2020_setup_sr_edc(struct cphy *phy)  in ael2020_setup_sr_edc()  argument
1420 	err = set_phy_regs(phy, regs);  in ael2020_setup_sr_edc()
1425 	phy->priv = edc_sr;  in ael2020_setup_sr_edc()
1432 static int ael2020_setup_twinax_edc(struct cphy *phy, int modtype)  in ael2020_setup_twinax_edc()  argument
1895 	err = set_phy_regs(phy, uCclock40MHz);  in ael2020_setup_twinax_edc()
1899 	err = set_phy_regs(phy, uCclockActivate);  in ael2020_setup_twinax_edc()
1905 		err = mdio_write(phy, MDIO_DEV_PMA_PMD, twinax_edc[i],  in ael2020_setup_twinax_edc()
1908 	err = set_phy_regs(phy, uCactivate);  in ael2020_setup_twinax_edc()
1910 		phy->priv = edc_twinax;  in ael2020_setup_twinax_edc()
1917 static int ael2020_get_module_type(struct cphy *phy, int delay_ms)  in ael2020_get_module_type()  argument
1922 	v = mdio_read(phy, MDIO_DEV_PMA_PMD, AEL2020_GPIO_STAT, &stat);  in ael2020_get_module_type()
1931 	return ael2xxx_get_module_type(phy, delay_ms);  in ael2020_get_module_type()
1938 static int ael2020_intr_enable(struct cphy *phy)  in ael2020_intr_enable()  argument
1954 	err = set_phy_regs(phy, regs);  in ael2020_intr_enable()
1959 	err = t3_phy_lasi_intr_enable(phy);  in ael2020_intr_enable()
1969 static int ael2020_intr_disable(struct cphy *phy)  in ael2020_intr_disable()  argument
1983 	err = set_phy_regs(phy, regs);  in ael2020_intr_disable()
1988 	return t3_phy_lasi_intr_disable(phy);  in ael2020_intr_disable()
1994 static int ael2020_intr_clear(struct cphy *phy)  in ael2020_intr_clear()  argument
1997 	int err = mdio_read(phy, MDIO_DEV_PMA_PMD, AEL2020_GPIO_INTR, &stat);  in ael2020_intr_clear()
1998 	return err ? err : t3_phy_lasi_intr_clear(phy);  in ael2020_intr_clear()
2024 static int ael2020_reset(struct cphy *phy, int wait)  in ael2020_reset()  argument
2030 	err = mdio_read(phy, MDIO_DEV_PMA_PMD, LASI_CTRL, &lasi_ctrl);  in ael2020_reset()
2034 	err = t3_phy_reset(phy, MDIO_DEV_PMA_PMD, 125);  in ael2020_reset()
2040 	phy->priv = edc_none;  in ael2020_reset()
2041 	err = set_phy_regs(phy, ael2020_reset_regs);  in ael2020_reset()
2047 	err = ael2020_get_module_type(phy, 0);  in ael2020_reset()
2050 	phy->modtype = (u8)err;  in ael2020_reset()
2054 		err = ael2020_setup_twinax_edc(phy, err);  in ael2020_reset()
2056 		err = ael2020_setup_sr_edc(phy);  in ael2020_reset()
2062 		err = ael2020_intr_enable(phy);  in ael2020_reset()
2069 static int ael2020_intr_handler(struct cphy *phy)  in ael2020_intr_handler()  argument
2074 	ret = mdio_read(phy, MDIO_DEV_PMA_PMD, AEL2020_GPIO_INTR, &stat);  in ael2020_intr_handler()
2080 		ret = ael2020_get_module_type(phy, 300);  in ael2020_intr_handler()
2084 		phy->modtype = (u8)ret;  in ael2020_intr_handler()
2086 			edc_needed = phy->priv;       /* on unplug retain EDC */  in ael2020_intr_handler()
2093 		if (edc_needed != phy->priv) {  in ael2020_intr_handler()
2094 			ret = ael2020_reset(phy, 0);  in ael2020_intr_handler()
2100 	ret = t3_phy_lasi_intr_handler(phy);  in ael2020_intr_handler()
2139 	struct cphy *phy = &pinfo->phy;  in t3_ael2020_phy_prep()  local
2141 	cphy_init(phy, pinfo->adapter, pinfo, phy_addr, &ael2020_ops, mdio_ops,  in t3_ael2020_phy_prep()
2146 	err = set_phy_regs(phy, ael2020_reset_regs);  in t3_ael2020_phy_prep()
2151 	err = ael2020_get_module_type(phy, 0);  in t3_ael2020_phy_prep()
2153 		phy->modtype = err;  in t3_ael2020_phy_prep()
2155 	ael_laser_down(phy, 0);  in t3_ael2020_phy_prep()
2162 static int get_link_status_x(struct cphy *phy, int *link_state, int *speed,  in get_link_status_x()  argument
2167 		int err = mdio_read(phy, MDIO_DEV_PMA_PMD, PMD_RSD, &stat0);  in get_link_status_x()
2170 			err = mdio_read(phy, MDIO_DEV_PCS, PCS_STAT1_X, &stat1);  in get_link_status_x()
2172 			err = mdio_read(phy, MDIO_DEV_XGXS, XS_LN_STAT, &stat2);  in get_link_status_x()
2218 	struct cphy *phy = &pinfo->phy;  in t3_qt2045_phy_prep()  local
2220 	cphy_init(phy, pinfo->adapter, pinfo, phy_addr, &qt2045_ops, mdio_ops,  in t3_qt2045_phy_prep()
2228 	if (!phy_addr && !mdio_read(phy, MDIO_DEV_PMA_PMD, MII_BMSR, &stat) &&  in t3_qt2045_phy_prep()
2230 		phy->addr = 1;  in t3_qt2045_phy_prep()
2234 static int xaui_direct_reset(struct cphy *phy, int wait)  in xaui_direct_reset()  argument
2239 static int xaui_direct_get_link_status(struct cphy *phy, int *link_state,  in xaui_direct_get_link_status()  argument
2244 		adapter_t *adapter = phy->adapter;  in xaui_direct_get_link_status()
2247 				     XGM_REG(A_XGM_SERDES_STAT0, phy->addr)) |  in xaui_direct_get_link_status()
2249 				     XGM_REG(A_XGM_SERDES_STAT1, phy->addr)) |  in xaui_direct_get_link_status()
2251 				     XGM_REG(A_XGM_SERDES_STAT2, phy->addr)) |  in xaui_direct_get_link_status()
2253 				     XGM_REG(A_XGM_SERDES_STAT3, phy->addr));  in xaui_direct_get_link_status()
2263 static int xaui_direct_power_down(struct cphy *phy, int enable)  in xaui_direct_power_down()  argument
2298 	cphy_init(&pinfo->phy, pinfo->adapter, pinfo, phy_addr, &xaui_direct_ops, mdio_ops,  in t3_xaui_direct_phy_prep()