2 SPDX-License-Identifier: BSD-2-Clause
4 Copyright (c) 2007-2009, Chelsio Inc.
38 	PMD_RSD     = 10,   /* PMA/PMD receive signal detect register */
39 	PCS_STAT1_X = 24,   /* 10GBASE-X PCS status 1 register */
40 	PCS_STAT1_R = 32,   /* 10GBASE-R PCS status 1 register */
103 	for (err = 0; rv->mmd_addr && !err; rv++) {  in set_phy_regs()
104 		if (rv->clear_bits == 0xffff)  in set_phy_regs()
105 			err = mdio_write(phy, rv->mmd_addr, rv->reg_addr,  in set_phy_regs()
106 					 rv->set_bits);  in set_phy_regs()
108 			err = t3_mdio_change_bits(phy, rv->mmd_addr,  in set_phy_regs()
109 						  rv->reg_addr, rv->clear_bits,  in set_phy_regs()
110 						  rv->set_bits);  in set_phy_regs()
117 	int tx_on_gpio = phy->addr == 0 ? F_GPIO7_OUT_VAL : F_GPIO2_OUT_VAL;  in ael100x_txon()
120 	t3_set_reg_field(phy->adapter, A_T3DBG_GPIO_EN, 0, tx_on_gpio);  in ael100x_txon()
125  * Read an 8-bit word from a device attached to the PHY's i2c bus.
150 	CH_WARN(phy->adapter, "PHY %u i2c read of dev.addr %x.%x timed out\n",  in ael_i2c_rd()
151 		phy->addr, dev_addr, word_addr);  in ael_i2c_rd()
152 	return -ETIMEDOUT;  in ael_i2c_rd()
156  * Write an 8-bit word to a device attached to the PHY's i2c bus.
180 	CH_WARN(phy->adapter, "PHY %u i2c Write of dev.addr %x.%x = %#x timed out\n",  in ael_i2c_wr()
181 		phy->addr, dev_addr, word_addr, data);  in ael_i2c_wr()
182 	return -ETIMEDOUT;  in ael_i2c_wr()
254 	return (v == -ETIMEDOUT ? phy_modtype_none : v);  in ael1002_get_module_type()
272 		phy->modtype = err;  in ael1002_reset()
283  * Get link status for a 10GBASE-R device.
347 	struct cphy *phy = &pinfo->phy;  in t3_ael1002_phy_prep()
349 	cphy_init(phy, pinfo->adapter, pinfo, phy_addr, &ael1002_ops, mdio_ops,  in t3_ael1002_phy_prep()
351 		  "10GBASE-R");  in t3_ael1002_phy_prep()
357 		phy->modtype = err;  in t3_ael1002_phy_prep()
370 	t3_set_reg_field(phy->adapter, A_T3DBG_GPIO_EN,   in ael1006_reset()
375 	t3_set_reg_field(phy->adapter, A_T3DBG_GPIO_EN,   in ael1006_reset()
428 	struct cphy *phy = &pinfo->phy;  in t3_ael1006_phy_prep()
430 	cphy_init(phy, pinfo->adapter, pinfo, phy_addr, &ael1006_ops, mdio_ops,  in t3_ael1006_phy_prep()
432 		  "10GBASE-SR");  in t3_ael1006_phy_prep()
433 	phy->modtype = phy_modtype_sr;  in t3_ael1006_phy_prep()
450 		/* SFP: see SFF-8472 for below */  in ael2xxx_get_module_type()
482 		v = ael_i2c_rd(phy, MODULE_DEV_ADDR, 10);  in ael2xxx_get_module_type()
491 			return v > 10 ? phy_modtype_twinax_long :  in ael2xxx_get_module_type()
495 		/* XFP: See INF-8077i for details. */  in ael2xxx_get_module_type()
522  * Code to support the Aeluros/NetLogic 2005 10Gb PHY.
817 		phy->priv = edc_sr;  in ael2005_setup_sr_edc()
1214 		phy->priv = edc_twinax;  in ael2005_setup_twinax_edc()
1281 	phy->priv = edc_none;  in ael2005_reset()
1291 	phy->modtype = (u8)err;  in ael2005_reset()
1332 		phy->modtype = (u8)ret;  in ael2005_intr_handler()
1334 			edc_needed = phy->priv;       /* on unplug retain EDC */  in ael2005_intr_handler()
1341 		if (edc_needed != phy->priv) {  in ael2005_intr_handler()
1387 	struct cphy *phy = &pinfo->phy;  in t3_ael2005_phy_prep()
1389 	cphy_init(phy, pinfo->adapter, pinfo, phy_addr, &ael2005_ops, mdio_ops,  in t3_ael2005_phy_prep()
1391 		  SUPPORTED_IRQ, "10GBASE-R");  in t3_ael2005_phy_prep()
1397 		phy->modtype = err;  in t3_ael2005_phy_prep()
1425 	phy->priv = edc_sr;  in ael2020_setup_sr_edc()
1910 		phy->priv = edc_twinax;  in ael2020_setup_twinax_edc()
2040 	phy->priv = edc_none;  in ael2020_reset()
2050 	phy->modtype = (u8)err;  in ael2020_reset()
2084 		phy->modtype = (u8)ret;  in ael2020_intr_handler()
2086 			edc_needed = phy->priv;       /* on unplug retain EDC */  in ael2020_intr_handler()
2093 		if (edc_needed != phy->priv) {  in ael2020_intr_handler()
2139 	struct cphy *phy = &pinfo->phy;  in t3_ael2020_phy_prep()
2141 	cphy_init(phy, pinfo->adapter, pinfo, phy_addr, &ael2020_ops, mdio_ops,  in t3_ael2020_phy_prep()
2143 		  SUPPORTED_IRQ, "10GBASE-R");  in t3_ael2020_phy_prep()
2153 		phy->modtype = err;  in t3_ael2020_phy_prep()
2160  * Get link status for a 10GBASE-X device.
2218 	struct cphy *phy = &pinfo->phy;  in t3_qt2045_phy_prep()
2220 	cphy_init(phy, pinfo->adapter, pinfo, phy_addr, &qt2045_ops, mdio_ops,  in t3_qt2045_phy_prep()
2222 		  "10GBASE-CX4");  in t3_qt2045_phy_prep()
2230 		phy->addr = 1;  in t3_qt2045_phy_prep()
2244 		adapter_t *adapter = phy->adapter;  in xaui_direct_get_link_status()
2247 				     XGM_REG(A_XGM_SERDES_STAT0, phy->addr)) |  in xaui_direct_get_link_status()
2249 				     XGM_REG(A_XGM_SERDES_STAT1, phy->addr)) |  in xaui_direct_get_link_status()
2251 				     XGM_REG(A_XGM_SERDES_STAT2, phy->addr)) |  in xaui_direct_get_link_status()
2253 				     XGM_REG(A_XGM_SERDES_STAT3, phy->addr));  in xaui_direct_get_link_status()
2298 	cphy_init(&pinfo->phy, pinfo->adapter, pinfo, phy_addr, &xaui_direct_ops, mdio_ops,  in t3_xaui_direct_phy_prep()
2300 		  "10GBASE-CX4");  in t3_xaui_direct_phy_prep()