Lines Matching +full:jh7110 +full:- +full:pll
1 /*-
2 * SPDX-License-Identifier: BSD-2-Clause
10 /* Clocks for JH7110 SYS group. PLL driver must be attached before this. */
31 #include <dt-bindings/clock/starfive,jh7110-crg.h>
37 { "starfive,jh7110-syscrg", 1 },
46 /* parents for non-pll SYS clocks */
92 /* non-pll SYS clocks */
165 if (ofw_bus_search_compatible(dev, compat_data)->ocd_data == 0) in jh7110_clk_sys_probe()
168 device_set_desc(dev, "StarFive JH7110 SYS clock generator"); in jh7110_clk_sys_probe()
181 sc->reset_status_offset = SYSCRG_RESET_STATUS; in jh7110_clk_sys_attach()
182 sc->reset_selector_offset = SYSCRG_RESET_SELECTOR; in jh7110_clk_sys_attach()
184 mtx_init(&sc->mtx, device_get_nameunit(dev), NULL, MTX_DEF); in jh7110_clk_sys_attach()
187 error = bus_alloc_resources(dev, res_spec, &sc->mem_res); in jh7110_clk_sys_attach()
195 sc->clkdom = clkdom_create(dev); in jh7110_clk_sys_attach()
196 if (sc->clkdom == NULL) { in jh7110_clk_sys_attach()
203 error = jh7110_clk_register(sc->clkdom, &sys_clks[i]); in jh7110_clk_sys_attach()
211 if (clkdom_finit(sc->clkdom) != 0) in jh7110_clk_sys_attach()
215 clkdom_dump(sc->clkdom); in jh7110_clk_sys_attach()
235 mtx_lock(&sc->mtx); in jh7110_clk_sys_device_lock()
244 mtx_unlock(&sc->mtx); in jh7110_clk_sys_device_unlock()