49 	struct rk_clk_pll_rate	*rates;  member
206 	struct rk_clk_pll_rate *rates;  in rk3066_clk_pll_set_freq()  local
213 	if (sc->rates == NULL)  in rk3066_clk_pll_set_freq()
216 	for (rates = sc->rates; rates->freq; rates++) {  in rk3066_clk_pll_set_freq()
217 		if (rates->freq == *fout)  in rk3066_clk_pll_set_freq()
220 	if (rates->freq == 0) {  in rk3066_clk_pll_set_freq()
240 	reg |= (rates->postdiv1 - 1) << RK3066_CLK_PLL_POSTDIV_SHIFT;  in rk3066_clk_pll_set_freq()
243 	reg |= (rates->refdiv - 1)<< RK3066_CLK_PLL_REFDIV_SHIFT;  in rk3066_clk_pll_set_freq()
253 	reg = (rates->fbdiv - 1) << RK3066_CLK_PLL_FBDIV_SHIFT;  in rk3066_clk_pll_set_freq()
259 	reg =  rates->bwadj - 1;  in rk3066_clk_pll_set_freq()
260 	dprintf("Set PLL_CON2 to %x (%x)\n", reg, rates->bwadj);  in rk3066_clk_pll_set_freq()
330 	sc->rates = clkdef->rates;  in rk3066_clk_pll_register()
425 	struct rk_clk_pll_rate *rates;  in rk3328_clk_pll_set_freq()  local
432 	if (sc->rates)  in rk3328_clk_pll_set_freq()
433 		rates = sc->rates;  in rk3328_clk_pll_set_freq()
435 		rates = sc->frac_rates;  in rk3328_clk_pll_set_freq()
439 	for (; rates->freq; rates++) {  in rk3328_clk_pll_set_freq()
440 		if (rates->freq == *fout)  in rk3328_clk_pll_set_freq()
443 	if (rates->freq == 0) {  in rk3328_clk_pll_set_freq()
457 	reg = (rates->postdiv1 << RK3328_CLK_PLL_POSTDIV1_SHIFT) |  in rk3328_clk_pll_set_freq()
458 		(rates->fbdiv << RK3328_CLK_PLL_FBDIV_SHIFT);  in rk3328_clk_pll_set_freq()
464 	reg = (rates->dsmpd << RK3328_CLK_PLL_DSMPD_SHIFT) |  in rk3328_clk_pll_set_freq()
465 		(rates->postdiv2 << RK3328_CLK_PLL_POSTDIV2_SHIFT) |  in rk3328_clk_pll_set_freq()
466 		(rates->refdiv << RK3328_CLK_PLL_REFDIV_SHIFT);  in rk3328_clk_pll_set_freq()
476 	reg |= rates->frac << RK3328_CLK_PLL_FRAC_SHIFT;  in rk3328_clk_pll_set_freq()
532 	sc->rates = clkdef->rates;  in rk3328_clk_pll_register()
666 	struct rk_clk_pll_rate *rates;  in rk3399_clk_pll_set_freq()  local
673 	if (sc->rates)  in rk3399_clk_pll_set_freq()
674 		rates = sc->rates;  in rk3399_clk_pll_set_freq()
676 		rates = sc->frac_rates;  in rk3399_clk_pll_set_freq()
680 	for (; rates->freq; rates++) {  in rk3399_clk_pll_set_freq()
681 		if (rates->freq == *fout)  in rk3399_clk_pll_set_freq()
684 	if (rates->freq == 0) {  in rk3399_clk_pll_set_freq()
697 	reg = rates->fbdiv << RK3399_CLK_PLL_FBDIV_SHIFT;  in rk3399_clk_pll_set_freq()
702 	reg = rates->postdiv1 << RK3399_CLK_PLL_POSTDIV1_SHIFT;  in rk3399_clk_pll_set_freq()
703 	reg |= rates->postdiv2 << RK3399_CLK_PLL_POSTDIV2_SHIFT;  in rk3399_clk_pll_set_freq()
704 	reg |= rates->refdiv << RK3399_CLK_PLL_REFDIV_SHIFT;  in rk3399_clk_pll_set_freq()
712 	reg |= rates->frac << RK3399_CLK_PLL_FRAC_SHIFT;  in rk3399_clk_pll_set_freq()
716 	reg = rates->dsmpd << RK3399_CLK_PLL_DSMPD_SHIFT;  in rk3399_clk_pll_set_freq()
768 	sc->rates = clkdef->rates;  in rk3399_clk_pll_register()