1 /*-
2  * SPDX-License-Identifier: BSD-2-Clause
32 #include <dev/clk/clk.h>
33 #include <dev/syscon/syscon.h>
35 #include <dev/clk/rockchip/rk_clk_composite.h>
52 	struct syscon	*grf;
68 	printf("%s:(%s)" format, __func__, clknode_get_name(clk), arg)
74 rk_clk_composite_read_4(struct clknode *clk, bus_addr_t addr, uint32_t *val)  in rk_clk_composite_read_4()  argument
78 	sc = clknode_get_softc(clk);  in rk_clk_composite_read_4()
79 	if (sc->grf)  in rk_clk_composite_read_4()
80 		*val = SYSCON_READ_4(sc->grf, addr);  in rk_clk_composite_read_4()
82 		CLKDEV_READ_4(clknode_get_device(clk), addr, val);  in rk_clk_composite_read_4()
86 rk_clk_composite_write_4(struct clknode *clk, bus_addr_t addr, uint32_t val)  in rk_clk_composite_write_4()  argument
90 	sc = clknode_get_softc(clk);  in rk_clk_composite_write_4()
91 	if (sc->grf)  in rk_clk_composite_write_4()
92 		SYSCON_WRITE_4(sc->grf, addr, val | (0xffff << 16));  in rk_clk_composite_write_4()
94 		CLKDEV_WRITE_4(clknode_get_device(clk), addr, val);  in rk_clk_composite_write_4()
97 static struct syscon *
98 rk_clk_composite_get_grf(struct clknode *clk)  in rk_clk_composite_get_grf()  argument
102 	struct syscon *grf;  in rk_clk_composite_get_grf()
105 	dev = clknode_get_device(clk);  in rk_clk_composite_get_grf()
117 rk_clk_composite_init(struct clknode *clk, device_t dev)  in rk_clk_composite_init()  argument
122 	sc = clknode_get_softc(clk);  in rk_clk_composite_init()
123 	if ((sc->flags & RK_CLK_COMPOSITE_GRF) != 0) {  in rk_clk_composite_init()
124 		sc->grf = rk_clk_composite_get_grf(clk);  in rk_clk_composite_init()
125 		if (sc->grf == NULL)  in rk_clk_composite_init()
126 			panic("clock %s has GRF flag set but no syscon is available",  in rk_clk_composite_init()
127 			    clknode_get_name(clk));  in rk_clk_composite_init()
131 	if ((sc->flags & RK_CLK_COMPOSITE_HAVE_MUX) != 0) {  in rk_clk_composite_init()
132 		DEVICE_LOCK(clk);  in rk_clk_composite_init()
133 		READ4(clk, sc->muxdiv_offset, &val);  in rk_clk_composite_init()
134 		DEVICE_UNLOCK(clk);  in rk_clk_composite_init()
136 		idx = (val & sc->mux_mask) >> sc->mux_shift;  in rk_clk_composite_init()
139 	clknode_init_parent_idx(clk, idx);  in rk_clk_composite_init()
145 rk_clk_composite_set_mux(struct clknode *clk, int index)  in rk_clk_composite_set_mux()  argument
150 	sc = clknode_get_softc(clk);  in rk_clk_composite_set_mux()
152 	if ((sc->flags & RK_CLK_COMPOSITE_HAVE_MUX) == 0)  in rk_clk_composite_set_mux()
156 	DEVICE_LOCK(clk);  in rk_clk_composite_set_mux()
157 	val |= (index << sc->mux_shift);  in rk_clk_composite_set_mux()
158 	val |= sc->mux_mask << RK_CLK_COMPOSITE_MASK_SHIFT;  in rk_clk_composite_set_mux()
159 	dprintf("Write: muxdiv_offset=%x, val=%x\n", sc->muxdiv_offset, val);  in rk_clk_composite_set_mux()
160 	WRITE4(clk, sc->muxdiv_offset, val);  in rk_clk_composite_set_mux()
161 	DEVICE_UNLOCK(clk);  in rk_clk_composite_set_mux()
167 rk_clk_composite_recalc(struct clknode *clk, uint64_t *freq)  in rk_clk_composite_recalc()  argument
172 	sc = clknode_get_softc(clk);  in rk_clk_composite_recalc()
174 	DEVICE_LOCK(clk);  in rk_clk_composite_recalc()
176 	READ4(clk, sc->muxdiv_offset, &reg);  in rk_clk_composite_recalc()
177 	dprintf("Read: muxdiv_offset=%x, val=%x\n", sc->muxdiv_offset, reg);  in rk_clk_composite_recalc()
179 	DEVICE_UNLOCK(clk);  in rk_clk_composite_recalc()
181 	div = ((reg & sc->div_mask) >> sc->div_shift);  in rk_clk_composite_recalc()
182 	if (sc->flags & RK_CLK_COMPOSITE_DIV_EXP)  in rk_clk_composite_recalc()
204 	for (div_reg = 0;  div_reg <= ((sc->div_mask >> sc->div_shift) + 1);  in rk_clk_composite_find_best()
206 		if (sc->flags == RK_CLK_COMPOSITE_DIV_EXP)  in rk_clk_composite_find_best()
211 		if ((freq - cur) < (freq - best)) {  in rk_clk_composite_find_best()
223 rk_clk_composite_set_freq(struct clknode *clk, uint64_t fparent, uint64_t *fout,  in rk_clk_composite_set_freq()  argument
233 	sc = clknode_get_softc(clk);  in rk_clk_composite_set_freq()
235 	p_names = clknode_get_parent_names(clk);  in rk_clk_composite_set_freq()
237 	     p_idx != clknode_get_parents_num(clk); p_idx++) {  in rk_clk_composite_set_freq()
244 		if ((*fout - cur) < (*fout - best)) {  in rk_clk_composite_set_freq()
270 	p_idx = clknode_get_parent_idx(clk);  in rk_clk_composite_set_freq()
274 		clknode_set_parent_by_idx(clk, best_parent);  in rk_clk_composite_set_freq()
278 	dprintf(" div_mask: 0x%X, div_shift: %d\n", sc->div_mask,  in rk_clk_composite_set_freq()
279 	    sc->div_shift);  in rk_clk_composite_set_freq()
281 	DEVICE_LOCK(clk);  in rk_clk_composite_set_freq()
282 	val = best_div_reg << sc->div_shift;  in rk_clk_composite_set_freq()
283 	val |= sc->div_mask << RK_CLK_COMPOSITE_MASK_SHIFT;  in rk_clk_composite_set_freq()
284 	dprintf("Write: muxdiv_offset=%x, val=%x\n", sc->muxdiv_offset, val);  in rk_clk_composite_set_freq()
285 	WRITE4(clk, sc->muxdiv_offset, val);  in rk_clk_composite_set_freq()
286 	DEVICE_UNLOCK(clk);  in rk_clk_composite_set_freq()
309 	struct clknode *clk;  in rk_clk_composite_register()  local
312 	clk = clknode_create(clkdom, &rk_clk_composite_clknode_class,  in rk_clk_composite_register()
313 	    &clkdef->clkdef);  in rk_clk_composite_register()
314 	if (clk == NULL)  in rk_clk_composite_register()
317 	sc = clknode_get_softc(clk);  in rk_clk_composite_register()
319 	sc->muxdiv_offset = clkdef->muxdiv_offset;  in rk_clk_composite_register()
321 	sc->mux_shift = clkdef->mux_shift;  in rk_clk_composite_register()
322 	sc->mux_width = clkdef->mux_width;  in rk_clk_composite_register()
323 	sc->mux_mask = ((1 << clkdef->mux_width) - 1) << sc->mux_shift;  in rk_clk_composite_register()
325 	sc->div_shift = clkdef->div_shift;  in rk_clk_composite_register()
326 	sc->div_width = clkdef->div_width;  in rk_clk_composite_register()
327 	sc->div_mask = ((1 << clkdef->div_width) - 1) << sc->div_shift;  in rk_clk_composite_register()
329 	sc->flags = clkdef->flags;  in rk_clk_composite_register()
331 	clknode_register(clkdom, clk);  in rk_clk_composite_register()