Lines Matching +full:sel +full:- +full:clk
1 /*-
2 * SPDX-License-Identifier: BSD-2-Clause
45 #include <dev/clk/clk_div.h>
46 #include <dev/clk/clk_fixed.h>
47 #include <dev/clk/clk_mux.h>
53 #include <dev/clk/allwinner/aw_ccung.h>
55 #include <dt-bindings/clock/sun8i-h3-ccu.h>
56 #include <dt-bindings/reset/sun8i-h3-ccu.h>
58 /* Non-exported resets */
61 /* Non-exported clocks */
160 CCU_GATE(CLK_BUS_CE, "bus-ce", "ahb1", 0x60, 5)
161 CCU_GATE(CLK_BUS_DMA, "bus-dma", "ahb1", 0x60, 6)
162 CCU_GATE(CLK_BUS_MMC0, "bus-mmc0", "ahb1", 0x60, 8)
163 CCU_GATE(CLK_BUS_MMC1, "bus-mmc1", "ahb1", 0x60, 9)
164 CCU_GATE(CLK_BUS_MMC2, "bus-mmc2", "ahb1", 0x60, 10)
165 CCU_GATE(CLK_BUS_NAND, "bus-nand", "ahb1", 0x60, 13)
166 CCU_GATE(CLK_BUS_DRAM, "bus-dram", "ahb1", 0x60, 14)
167 CCU_GATE(CLK_BUS_EMAC, "bus-emac", "ahb2", 0x60, 17)
168 CCU_GATE(CLK_BUS_TS, "bus-ts", "ahb1", 0x60, 18)
169 CCU_GATE(CLK_BUS_HSTIMER, "bus-hstimer", "ahb1", 0x60, 19)
170 CCU_GATE(CLK_BUS_SPI0, "bus-spi0", "ahb1", 0x60, 20)
171 CCU_GATE(CLK_BUS_SPI1, "bus-spi1", "ahb1", 0x60, 21)
172 CCU_GATE(CLK_BUS_OTG, "bus-otg", "ahb1", 0x60, 23)
173 CCU_GATE(CLK_BUS_EHCI0, "bus-ehci0", "ahb1", 0x60, 24)
174 CCU_GATE(CLK_BUS_EHCI1, "bus-ehci1", "ahb2", 0x60, 25)
175 CCU_GATE(CLK_BUS_EHCI2, "bus-ehci2", "ahb2", 0x60, 26)
176 CCU_GATE(CLK_BUS_EHCI3, "bus-ehci3", "ahb2", 0x60, 27)
177 CCU_GATE(CLK_BUS_OHCI0, "bus-ohci0", "ahb1", 0x60, 28)
178 CCU_GATE(CLK_BUS_OHCI1, "bus-ohci1", "ahb2", 0x60, 29)
179 CCU_GATE(CLK_BUS_OHCI2, "bus-ohci2", "ahb2", 0x60, 30)
180 CCU_GATE(CLK_BUS_OHCI3, "bus-ohci3", "ahb2", 0x60, 31)
182 CCU_GATE(CLK_BUS_VE, "bus-ve", "ahb1", 0x64, 0)
183 CCU_GATE(CLK_BUS_TCON0, "bus-tcon0", "ahb1", 0x64, 3)
184 CCU_GATE(CLK_BUS_TCON1, "bus-tcon1", "ahb1", 0x64, 4)
185 CCU_GATE(CLK_BUS_DEINTERLACE, "bus-deinterlace", "ahb1", 0x64, 5)
186 CCU_GATE(CLK_BUS_CSI, "bus-csi", "ahb1", 0x64, 8)
187 CCU_GATE(CLK_BUS_TVE, "bus-tve", "ahb1", 0x64, 9)
188 CCU_GATE(CLK_BUS_HDMI, "bus-hdmi", "ahb1", 0x64, 11)
189 CCU_GATE(CLK_BUS_DE, "bus-de", "ahb1", 0x64, 12)
190 CCU_GATE(CLK_BUS_GPU, "bus-gpu", "ahb1", 0x64, 20)
191 CCU_GATE(CLK_BUS_MSGBOX, "bus-msgbox", "ahb1", 0x64, 21)
192 CCU_GATE(CLK_BUS_SPINLOCK, "bus-spinlock", "ahb1", 0x64, 22)
194 CCU_GATE(CLK_BUS_CODEC, "bus-codec", "apb1", 0x68, 0)
195 CCU_GATE(CLK_BUS_SPDIF, "bus-spdif", "apb1", 0x68, 1)
196 CCU_GATE(CLK_BUS_PIO, "bus-pio", "apb1", 0x68, 5)
197 CCU_GATE(CLK_BUS_THS, "bus-ths", "apb1", 0x68, 8)
198 CCU_GATE(CLK_BUS_I2S0, "bus-i2s0", "apb1", 0x68, 12)
199 CCU_GATE(CLK_BUS_I2S1, "bus-i2s1", "apb1", 0x68, 13)
200 CCU_GATE(CLK_BUS_I2S2, "bus-i2s2", "apb1", 0x68, 14)
202 CCU_GATE(CLK_BUS_I2C0, "bus-i2c0", "apb2", 0x6c, 0)
203 CCU_GATE(CLK_BUS_I2C1, "bus-i2c1", "apb2", 0x6c, 1)
204 CCU_GATE(CLK_BUS_I2C2, "bus-i2c2", "apb2", 0x6c, 2)
205 CCU_GATE(CLK_BUS_UART0, "bus-uart0", "apb2", 0x6c, 16)
206 CCU_GATE(CLK_BUS_UART1, "bus-uart1", "apb2", 0x6c, 17)
207 CCU_GATE(CLK_BUS_UART2, "bus-uart2", "apb2", 0x6c, 18)
208 CCU_GATE(CLK_BUS_UART3, "bus-uart3", "apb2", 0x6c, 19)
209 CCU_GATE(CLK_BUS_SCR, "bus-scr", "apb2", 0x6c, 20)
211 CCU_GATE(CLK_BUS_EPHY, "bus-ephy", "ahb1", 0x70, 0)
212 CCU_GATE(CLK_BUS_DBG, "bus-dbg", "ahb1", 0x70, 7)
214 CCU_GATE(CLK_USBPHY0, "usb-phy0", "osc24M", 0xcc, 8)
215 CCU_GATE(CLK_USBPHY1, "usb-phy1", "osc24M", 0xcc, 9)
216 CCU_GATE(CLK_USBPHY2, "usb-phy2", "osc24M", 0xcc, 10)
217 CCU_GATE(CLK_USBPHY3, "usb-phy3", "osc24M", 0xcc, 11)
218 CCU_GATE(CLK_USBOHCI0, "usb-ohci0", "osc24M", 0xcc, 16)
219 CCU_GATE(CLK_USBOHCI1, "usb-ohci1", "osc24M", 0xcc, 17)
220 CCU_GATE(CLK_USBOHCI2, "usb-ohci2", "osc24M", 0xcc, 18)
221 CCU_GATE(CLK_USBOHCI3, "usb-ohci3", "osc24M", 0xcc, 19)
228 CCU_GATE(CLK_DRAM_VE, "dram-ve", "dram", 0x100, 0)
229 CCU_GATE(CLK_DRAM_CSI, "dram-csi", "dram", 0x100, 1)
230 CCU_GATE(CLK_DRAM_DEINTERLACE, "dram-deinterlace", "dram", 0x100, 2)
231 CCU_GATE(CLK_DRAM_TS, "dram-ts", "dram", 0x100, 3)
233 CCU_GATE(CLK_AC_DIG, "ac-dig", "pll_audio", 0x140, 31)
237 CCU_GATE(CLK_CSI_MISC, "csi-misc", "osc24M", 0x130, 31)
239 CCU_GATE(CLK_HDMI_DDC, "hdmi-ddc", "osc24M", 0x154, 31)
271 "pll_audio-2x", /* name */
279 "pll_audio-4x", /* name */
287 "pll_audio-8x", /* name */
304 24, 25, /* mode sel, freq sel */
317 24, 25, /* mode sel, freq sel */
349 "pll_periph0-2x", /* name */
366 24, 25, /* mode sel, freq sel */
392 24, 25, /* mode sel, freq sel */
549 static const char *i2s_parents[] = {"pll_audio-8x", "pll_audio-4x", "pll_audio-2x", "pll_audio"};
570 static const char *dram_parents[] = {"pll_ddr", "pll_periph0-2x"};
580 static const char *de_parents[] = {"pll_periph0-2x", "pll_de"};
622 CLK_CSI_SCLK, "csi-sclk", csi_sclk_parents, /* id, name, parents */
632 CLK_CSI_MCLK, "csi-mclk", csi_mclk_parents, /* id, name, parents */
660 static const char *mbus_parents[] = {"osc24M", "pll_periph0-2x", "pll_ddr"};
681 { .type = AW_CLK_NKMP, .clk.nkmp = &pll_cpux_clk},
682 { .type = AW_CLK_NKMP, .clk.nkmp = &pll_audio_clk},
683 { .type = AW_CLK_NKMP, .clk.nkmp = &pll_periph0_clk},
684 { .type = AW_CLK_NKMP, .clk.nkmp = &pll_periph1_clk},
685 { .type = AW_CLK_NKMP, .clk.nkmp = &pll_ddr_clk},
686 { .type = AW_CLK_FRAC, .clk.frac = &pll_video_clk},
687 { .type = AW_CLK_FRAC, .clk.frac = &pll_ve_clk},
688 { .type = AW_CLK_FRAC, .clk.frac = &pll_gpu_clk},
689 { .type = AW_CLK_FRAC, .clk.frac = &pll_de_clk},
690 { .type = AW_CLK_NM, .clk.nm = &apb2_clk},
691 { .type = AW_CLK_NM, .clk.nm = &nand_clk},
692 { .type = AW_CLK_NM, .clk.nm = &mmc0_clk},
693 { .type = AW_CLK_NM, .clk.nm = &mmc1_clk},
694 { .type = AW_CLK_NM, .clk.nm = &mmc2_clk},
695 { .type = AW_CLK_NM, .clk.nm = &ts_clk},
696 { .type = AW_CLK_NM, .clk.nm = &ce_clk},
697 { .type = AW_CLK_NM, .clk.nm = &spi0_clk},
698 { .type = AW_CLK_NM, .clk.nm = &spi1_clk},
699 { .type = AW_CLK_NM, .clk.nm = &spdif_clk},
700 { .type = AW_CLK_NM, .clk.nm = &dram_clk},
701 { .type = AW_CLK_NM, .clk.nm = &de_clk},
702 { .type = AW_CLK_NM, .clk.nm = &tcon0_clk},
703 { .type = AW_CLK_NM, .clk.nm = &tve_clk},
704 { .type = AW_CLK_NM, .clk.nm = &deinterlace_clk},
705 { .type = AW_CLK_NM, .clk.nm = &csi_sclk_clk},
706 { .type = AW_CLK_NM, .clk.nm = &csi_mclk_clk},
707 { .type = AW_CLK_NM, .clk.nm = &ve_clk},
708 { .type = AW_CLK_NM, .clk.nm = &hdmi_clk},
709 { .type = AW_CLK_NM, .clk.nm = &mbus_clk},
710 { .type = AW_CLK_NM, .clk.nm = &gpu_clk},
711 { .type = AW_CLK_PREDIV_MUX, .clk.prediv_mux = &ahb1_clk},
712 { .type = AW_CLK_PREDIV_MUX, .clk.prediv_mux = &ahb2_clk},
713 { .type = AW_CLK_MUX, .clk.mux = &cpux_clk},
714 { .type = AW_CLK_MUX, .clk.mux = &i2s0mux_clk},
715 { .type = AW_CLK_MUX, .clk.mux = &i2s1mux_clk},
716 { .type = AW_CLK_MUX, .clk.mux = &i2s2mux_clk},
717 { .type = AW_CLK_DIV, .clk.div = &axi_clk},
718 { .type = AW_CLK_DIV, .clk.div = &apb1_clk},
719 { .type = AW_CLK_DIV, .clk.div = &thsdiv_clk},
720 { .type = AW_CLK_FIXED, .clk.fixed = &pll_periph0_2x_clk},
721 { .type = AW_CLK_FIXED, .clk.fixed = &pll_audio_2x_clk},
722 { .type = AW_CLK_FIXED, .clk.fixed = &pll_audio_4x_clk},
723 { .type = AW_CLK_FIXED, .clk.fixed = &pll_audio_8x_clk},
734 { "allwinner,sun8i-h3-ccu", 1 },
737 { "allwinner,sun50i-h5-ccu", 1 },
749 if (ofw_bus_search_compatible(dev, compat_data)->ocd_data == 0) in ccu_h3_probe()
763 sc->resets = h3_ccu_resets; in ccu_h3_attach()
764 sc->nresets = nitems(h3_ccu_resets); in ccu_h3_attach()
765 sc->gates = h3_ccu_gates; in ccu_h3_attach()
766 sc->ngates = nitems(h3_ccu_gates); in ccu_h3_attach()
767 sc->clks = h3_ccu_clks; in ccu_h3_attach()
768 sc->nclks = nitems(h3_ccu_clks); in ccu_h3_attach()
769 sc->clk_init = h3_init_clks; in ccu_h3_attach()
770 sc->n_clk_init = nitems(h3_init_clks); in ccu_h3_attach()