Lines Matching +full:0 +full:x2d0
62 #define CLK_PLL_CPUX 0
97 CCU_RESET(RST_USB_PHY0, 0xcc, 0)
98 CCU_RESET(RST_USB_PHY1, 0xcc, 1)
99 CCU_RESET(RST_USB_PHY2, 0xcc, 2)
100 CCU_RESET(RST_USB_PHY3, 0xcc, 3)
102 CCU_RESET(RST_MBUS, 0xfc, 31)
104 CCU_RESET(RST_BUS_CE, 0x2c0, 5)
105 CCU_RESET(RST_BUS_DMA, 0x2c0, 6)
106 CCU_RESET(RST_BUS_MMC0, 0x2c0, 8)
107 CCU_RESET(RST_BUS_MMC1, 0x2c0, 9)
108 CCU_RESET(RST_BUS_MMC2, 0x2c0, 10)
109 CCU_RESET(RST_BUS_NAND, 0x2c0, 13)
110 CCU_RESET(RST_BUS_DRAM, 0x2c0, 14)
111 CCU_RESET(RST_BUS_EMAC, 0x2c0, 17)
112 CCU_RESET(RST_BUS_TS, 0x2c0, 18)
113 CCU_RESET(RST_BUS_HSTIMER, 0x2c0, 19)
114 CCU_RESET(RST_BUS_SPI0, 0x2c0, 20)
115 CCU_RESET(RST_BUS_SPI1, 0x2c0, 21)
116 CCU_RESET(RST_BUS_OTG, 0x2c0, 23)
117 CCU_RESET(RST_BUS_EHCI0, 0x2c0, 24)
118 CCU_RESET(RST_BUS_EHCI1, 0x2c0, 25)
119 CCU_RESET(RST_BUS_EHCI2, 0x2c0, 26)
120 CCU_RESET(RST_BUS_EHCI3, 0x2c0, 27)
121 CCU_RESET(RST_BUS_OHCI0, 0x2c0, 28)
122 CCU_RESET(RST_BUS_OHCI1, 0x2c0, 29)
123 CCU_RESET(RST_BUS_OHCI2, 0x2c0, 30)
124 CCU_RESET(RST_BUS_OHCI3, 0x2c0, 31)
126 CCU_RESET(RST_BUS_VE, 0x2c4, 0)
127 CCU_RESET(RST_BUS_TCON0, 0x2c4, 3)
128 CCU_RESET(RST_BUS_TCON1, 0x2c4, 4)
129 CCU_RESET(RST_BUS_DEINTERLACE, 0x2c4, 5)
130 CCU_RESET(RST_BUS_CSI, 0x2c4, 8)
131 CCU_RESET(RST_BUS_TVE, 0x2c4, 9)
132 CCU_RESET(RST_BUS_HDMI0, 0x2c4, 10)
133 CCU_RESET(RST_BUS_HDMI1, 0x2c4, 11)
134 CCU_RESET(RST_BUS_DE, 0x2c4, 12)
135 CCU_RESET(RST_BUS_GPU, 0x2c4, 20)
136 CCU_RESET(RST_BUS_MSGBOX, 0x2c4, 21)
137 CCU_RESET(RST_BUS_SPINLOCK, 0x2c4, 22)
138 CCU_RESET(RST_BUS_DBG, 0x2c4, 31)
140 CCU_RESET(RST_BUS_EPHY, 0x2c8, 2)
142 CCU_RESET(RST_BUS_CODEC, 0x2d0, 0)
143 CCU_RESET(RST_BUS_SPDIF, 0x2d0, 1)
144 CCU_RESET(RST_BUS_THS, 0x2d0, 8)
145 CCU_RESET(RST_BUS_I2S0, 0x2d0, 12)
146 CCU_RESET(RST_BUS_I2S1, 0x2d0, 13)
147 CCU_RESET(RST_BUS_I2S2, 0x2d0, 14)
149 CCU_RESET(RST_BUS_I2C0, 0x2d8, 0)
150 CCU_RESET(RST_BUS_I2C1, 0x2d8, 1)
151 CCU_RESET(RST_BUS_I2C2, 0x2d8, 2)
152 CCU_RESET(RST_BUS_UART0, 0x2d8, 16)
153 CCU_RESET(RST_BUS_UART1, 0x2d8, 17)
154 CCU_RESET(RST_BUS_UART2, 0x2d8, 18)
155 CCU_RESET(RST_BUS_UART3, 0x2d8, 19)
156 CCU_RESET(RST_BUS_SCR, 0x2d8, 20)
160 CCU_GATE(CLK_BUS_CE, "bus-ce", "ahb1", 0x60, 5)
161 CCU_GATE(CLK_BUS_DMA, "bus-dma", "ahb1", 0x60, 6)
162 CCU_GATE(CLK_BUS_MMC0, "bus-mmc0", "ahb1", 0x60, 8)
163 CCU_GATE(CLK_BUS_MMC1, "bus-mmc1", "ahb1", 0x60, 9)
164 CCU_GATE(CLK_BUS_MMC2, "bus-mmc2", "ahb1", 0x60, 10)
165 CCU_GATE(CLK_BUS_NAND, "bus-nand", "ahb1", 0x60, 13)
166 CCU_GATE(CLK_BUS_DRAM, "bus-dram", "ahb1", 0x60, 14)
167 CCU_GATE(CLK_BUS_EMAC, "bus-emac", "ahb2", 0x60, 17)
168 CCU_GATE(CLK_BUS_TS, "bus-ts", "ahb1", 0x60, 18)
169 CCU_GATE(CLK_BUS_HSTIMER, "bus-hstimer", "ahb1", 0x60, 19)
170 CCU_GATE(CLK_BUS_SPI0, "bus-spi0", "ahb1", 0x60, 20)
171 CCU_GATE(CLK_BUS_SPI1, "bus-spi1", "ahb1", 0x60, 21)
172 CCU_GATE(CLK_BUS_OTG, "bus-otg", "ahb1", 0x60, 23)
173 CCU_GATE(CLK_BUS_EHCI0, "bus-ehci0", "ahb1", 0x60, 24)
174 CCU_GATE(CLK_BUS_EHCI1, "bus-ehci1", "ahb2", 0x60, 25)
175 CCU_GATE(CLK_BUS_EHCI2, "bus-ehci2", "ahb2", 0x60, 26)
176 CCU_GATE(CLK_BUS_EHCI3, "bus-ehci3", "ahb2", 0x60, 27)
177 CCU_GATE(CLK_BUS_OHCI0, "bus-ohci0", "ahb1", 0x60, 28)
178 CCU_GATE(CLK_BUS_OHCI1, "bus-ohci1", "ahb2", 0x60, 29)
179 CCU_GATE(CLK_BUS_OHCI2, "bus-ohci2", "ahb2", 0x60, 30)
180 CCU_GATE(CLK_BUS_OHCI3, "bus-ohci3", "ahb2", 0x60, 31)
182 CCU_GATE(CLK_BUS_VE, "bus-ve", "ahb1", 0x64, 0)
183 CCU_GATE(CLK_BUS_TCON0, "bus-tcon0", "ahb1", 0x64, 3)
184 CCU_GATE(CLK_BUS_TCON1, "bus-tcon1", "ahb1", 0x64, 4)
185 CCU_GATE(CLK_BUS_DEINTERLACE, "bus-deinterlace", "ahb1", 0x64, 5)
186 CCU_GATE(CLK_BUS_CSI, "bus-csi", "ahb1", 0x64, 8)
187 CCU_GATE(CLK_BUS_TVE, "bus-tve", "ahb1", 0x64, 9)
188 CCU_GATE(CLK_BUS_HDMI, "bus-hdmi", "ahb1", 0x64, 11)
189 CCU_GATE(CLK_BUS_DE, "bus-de", "ahb1", 0x64, 12)
190 CCU_GATE(CLK_BUS_GPU, "bus-gpu", "ahb1", 0x64, 20)
191 CCU_GATE(CLK_BUS_MSGBOX, "bus-msgbox", "ahb1", 0x64, 21)
192 CCU_GATE(CLK_BUS_SPINLOCK, "bus-spinlock", "ahb1", 0x64, 22)
194 CCU_GATE(CLK_BUS_CODEC, "bus-codec", "apb1", 0x68, 0)
195 CCU_GATE(CLK_BUS_SPDIF, "bus-spdif", "apb1", 0x68, 1)
196 CCU_GATE(CLK_BUS_PIO, "bus-pio", "apb1", 0x68, 5)
197 CCU_GATE(CLK_BUS_THS, "bus-ths", "apb1", 0x68, 8)
198 CCU_GATE(CLK_BUS_I2S0, "bus-i2s0", "apb1", 0x68, 12)
199 CCU_GATE(CLK_BUS_I2S1, "bus-i2s1", "apb1", 0x68, 13)
200 CCU_GATE(CLK_BUS_I2S2, "bus-i2s2", "apb1", 0x68, 14)
202 CCU_GATE(CLK_BUS_I2C0, "bus-i2c0", "apb2", 0x6c, 0)
203 CCU_GATE(CLK_BUS_I2C1, "bus-i2c1", "apb2", 0x6c, 1)
204 CCU_GATE(CLK_BUS_I2C2, "bus-i2c2", "apb2", 0x6c, 2)
205 CCU_GATE(CLK_BUS_UART0, "bus-uart0", "apb2", 0x6c, 16)
206 CCU_GATE(CLK_BUS_UART1, "bus-uart1", "apb2", 0x6c, 17)
207 CCU_GATE(CLK_BUS_UART2, "bus-uart2", "apb2", 0x6c, 18)
208 CCU_GATE(CLK_BUS_UART3, "bus-uart3", "apb2", 0x6c, 19)
209 CCU_GATE(CLK_BUS_SCR, "bus-scr", "apb2", 0x6c, 20)
211 CCU_GATE(CLK_BUS_EPHY, "bus-ephy", "ahb1", 0x70, 0)
212 CCU_GATE(CLK_BUS_DBG, "bus-dbg", "ahb1", 0x70, 7)
214 CCU_GATE(CLK_USBPHY0, "usb-phy0", "osc24M", 0xcc, 8)
215 CCU_GATE(CLK_USBPHY1, "usb-phy1", "osc24M", 0xcc, 9)
216 CCU_GATE(CLK_USBPHY2, "usb-phy2", "osc24M", 0xcc, 10)
217 CCU_GATE(CLK_USBPHY3, "usb-phy3", "osc24M", 0xcc, 11)
218 CCU_GATE(CLK_USBOHCI0, "usb-ohci0", "osc24M", 0xcc, 16)
219 CCU_GATE(CLK_USBOHCI1, "usb-ohci1", "osc24M", 0xcc, 17)
220 CCU_GATE(CLK_USBOHCI2, "usb-ohci2", "osc24M", 0xcc, 18)
221 CCU_GATE(CLK_USBOHCI3, "usb-ohci3", "osc24M", 0xcc, 19)
223 CCU_GATE(CLK_THS, "ths", "thsdiv", 0x74, 31)
224 CCU_GATE(CLK_I2S0, "i2s0", "i2s0mux", 0xB0, 31)
225 CCU_GATE(CLK_I2S1, "i2s1", "i2s1mux", 0xB4, 31)
226 CCU_GATE(CLK_I2S2, "i2s2", "i2s2mux", 0xB8, 31)
228 CCU_GATE(CLK_DRAM_VE, "dram-ve", "dram", 0x100, 0)
229 CCU_GATE(CLK_DRAM_CSI, "dram-csi", "dram", 0x100, 1)
230 CCU_GATE(CLK_DRAM_DEINTERLACE, "dram-deinterlace", "dram", 0x100, 2)
231 CCU_GATE(CLK_DRAM_TS, "dram-ts", "dram", 0x100, 3)
233 CCU_GATE(CLK_AC_DIG, "ac-dig", "pll_audio", 0x140, 31)
235 CCU_GATE(CLK_AVS, "avs", "osc24M", 0x144, 31)
237 CCU_GATE(CLK_CSI_MISC, "csi-misc", "osc24M", 0x130, 31)
239 CCU_GATE(CLK_HDMI_DDC, "hdmi-ddc", "osc24M", 0x154, 31)
246 0x00, /* offset */
247 8, 5, 0, 0, /* n factor */
248 4, 2, 0, 0, /* k factor */
249 0, 2, 0, 0, /* m factor */
250 16, 2, 0, AW_CLK_FACTOR_POWER_OF_TWO, /* p factor */
259 0x08, /* offset */
260 8, 7, 0, 0, /* n factor */
261 0, 0, 1, AW_CLK_FACTOR_FIXED, /* k factor (fake) */
262 0, 5, 0, 0, /* m factor */
263 16, 4, 0, 0, /* p factor */
273 0, /* freq */
276 0); /* flags */
281 0, /* freq */
284 0); /* flags */
289 0, /* freq */
292 0); /* flags */
298 0x10, /* offset */
299 8, 7, 0, 0, /* n factor */
300 0, 4, 0, 0, /* m factor */
311 0x18, /* offset */
312 8, 7, 0, 0, /* n factor */
313 0, 4, 0, 0, /* m factor */
324 0x20, /* offset */
325 8, 5, 0, 0, /* n factor */
326 4, 2, 0, 0, /* k factor */
327 0, 2, 0, 0, /* m factor */
328 0, 0, 1, AW_CLK_FACTOR_FIXED, /* p factor (fake) */
339 0x28, /* offset */
340 8, 5, 0, 0, /* n factor */
341 4, 2, 0, 0, /* k factor */
342 0, 0, 2, AW_CLK_FACTOR_FIXED, /* m factor (fake) */
343 0, 0, 1, AW_CLK_FACTOR_FIXED, /* p factor (fake) */
351 0, /* freq */
354 0); /* flags */
360 0x38, /* offset */
361 8, 7, 0, 0, /* n factor */
362 0, 4, 0, 0, /* m factor */
373 0x44, /* offset */
374 8, 5, 0, 0, /* n factor */
375 4, 2, 0, 0, /* k factor */
376 0, 0, 2, AW_CLK_FACTOR_FIXED, /* m factor (fake) */
377 0, 0, 1, AW_CLK_FACTOR_FIXED, /* p factor (fake) */
386 0x48, /* offset */
387 8, 7, 0, 0, /* n factor */
388 0, 4, 0, 0, /* m factor */
399 0x50, 16, 2); /* offset, shift, width */
405 0x50, /* offset */
406 0, 2, /* shift, width */
407 0, NULL); /* flags, div table */
412 0x54, /* offset */
414 4, 2, 0, AW_CLK_FACTOR_POWER_OF_TWO, /* div */
415 6, 2, 0, AW_CLK_FACTOR_HAS_COND, /* prediv */
420 { .value = 0, .divider = 2, },
429 0x54, /* offset */
438 0x58, /* offset */
439 16, 2, 0, AW_CLK_FACTOR_POWER_OF_TWO, /* n factor */
440 0, 5, 0, 0, /* m factor */
442 0, /* gate */
448 0x5c, /* offset */
449 0, 2, /* mux */
450 0, 0, 1, AW_CLK_FACTOR_FIXED, /* div */
451 0, 0, 2, AW_CLK_FACTOR_HAS_COND | AW_CLK_FACTOR_FIXED, /* prediv */
452 0, 2, 1); /* prediv condition */
456 { .value = 0, .divider = 1, },
463 0, /* id */
465 0x74, /* offset */
466 0, 2, /* shift, width */
473 0x80, /* offset */
474 16, 2, 0, AW_CLK_FACTOR_POWER_OF_TWO, /* n factor */
475 0, 4, 0, 0, /* m factor */
482 0x88, /* offset */
483 16, 2, 0, AW_CLK_FACTOR_POWER_OF_TWO, /* n factor */
484 0, 4, 0, 0, /* m factor */
492 0x8c, /* offset */
493 16, 2, 0, AW_CLK_FACTOR_POWER_OF_TWO, /* n factor */
494 0, 4, 0, 0, /* m factor */
502 0x90, /* offset */
503 16, 2, 0, AW_CLK_FACTOR_POWER_OF_TWO, /* n factor */
504 0, 4, 0, 0, /* m factor */
513 0x98, /* offset */
514 16, 2, 0, AW_CLK_FACTOR_POWER_OF_TWO, /* n factor */
515 0, 4, 0, 0, /* m factor */
522 0x9C, /* offset */
523 16, 2, 0, AW_CLK_FACTOR_POWER_OF_TWO, /* n factor */
524 0, 4, 0, 0, /* m factor */
531 0xA0, /* offset */
532 16, 2, 0, AW_CLK_FACTOR_POWER_OF_TWO, /* n factor */
533 0, 4, 0, 0, /* m factor */
541 0xA4, /* offset */
542 16, 2, 0, AW_CLK_FACTOR_POWER_OF_TWO, /* n factor */
543 0, 4, 0, 0, /* m factor */
551 0, "i2s0mux", i2s_parents, /* id, name, parents */
552 0xb0, 16, 2); /* offset, mux shift, mux width */
554 0, "i2s1mux", i2s_parents, /* id, name, parents */
555 0xb4, 16, 2); /* offset, mux shift, mux width */
557 0, "i2s2mux", i2s_parents, /* id, name, parents */
558 0xb8, 16, 2); /* offset, mux shift, mux width */
563 0xC0, /* offset */
564 0, 0, 1, AW_CLK_FACTOR_FIXED, /* n factor (fake); */
565 0, 4, 0, 0, /* m factor */
566 0, 0, /* mux */
573 0xF4, /* offset */
574 0, 0, 1, AW_CLK_FACTOR_FIXED, /* n factor (fake) */
575 0, 4, 0, 0, /* m factor */
577 0, /* gate */
583 0x104, /* offset */
584 0, 0, 1, AW_CLK_FACTOR_FIXED, /* n factor (fake) */
585 0, 4, 0, 0, /* m factor */
593 0x118, /* offset */
594 0, 0, 1, AW_CLK_FACTOR_FIXED, /* n factor (fake) */
595 0, 4, 0, 0, /* m factor */
603 0x120, /* offset */
604 0, 0, 1, AW_CLK_FACTOR_FIXED, /* n factor (fake) */
605 0, 4, 0, 0, /* m factor */
613 0x124, /* offset */
614 0, 0, 1, AW_CLK_FACTOR_FIXED, /* n factor (fake) */
615 0, 4, 0, 0, /* m factor */
623 0x134, /* offset */
624 0, 0, 1, AW_CLK_FACTOR_FIXED, /* n factor (fake) */
625 16, 4, 0, 0, /* m factor */
633 0x134, /* offset */
634 0, 0, 1, AW_CLK_FACTOR_FIXED, /* n factor (fake) */
635 0, 4, 0, 0, /* m factor */
643 0x13C, /* offset */
644 16, 3, 0, 0, /* n factor */
645 0, 0, 1, AW_CLK_FACTOR_FIXED, /* m factor (fake) */
646 0, 0, /* mux */
653 0x150, /* offset */
654 0, 0, 1, AW_CLK_FACTOR_FIXED, /* n factor (fake) */
655 0, 4, 0, 0, /* m factor */
663 0x15C, /* offset */
664 0, 0, 1, AW_CLK_FACTOR_FIXED, /* n factor (fake) */
665 0, 3, 0, 0, /* m factor */
673 0x1A0, /* offset */
674 0, 2, 0, 0, /* n factor */
675 0, 0, 1, AW_CLK_FACTOR_FIXED, /* m factor (fake) */
676 0, 0, /* mux */
727 {"ahb1", "pll_periph0", 0, false},
728 {"ahb2", "pll_periph0", 0, false},
729 {"dram", "pll_ddr", 0, false},
739 { NULL, 0},
749 if (ofw_bus_search_compatible(dev, compat_data)->ocd_data == 0) in ccu_h3_probe()
786 EARLY_DRIVER_MODULE(ccu_h3ng, simplebus, ccu_h3ng_driver, 0, 0,