Lines Matching +full:0 +full:x2c4

52 #define	CLK_PLL_C0CPUX		0
80 CCU_RESET(RST_USB_PHY0, 0xcc, 0)
81 CCU_RESET(RST_USB_PHY1, 0xcc, 1)
82 CCU_RESET(RST_USB_HSIC, 0xcc, 2)
84 CCU_RESET(RST_DRAM, 0xf4, 31)
85 CCU_RESET(RST_MBUS, 0xfc, 31)
87 CCU_RESET(RST_BUS_MIPI_DSI, 0x2c0, 1)
88 CCU_RESET(RST_BUS_SS, 0x2c0, 5)
89 CCU_RESET(RST_BUS_DMA, 0x2c0, 6)
90 CCU_RESET(RST_BUS_MMC0, 0x2c0, 8)
91 CCU_RESET(RST_BUS_MMC1, 0x2c0, 9)
92 CCU_RESET(RST_BUS_MMC2, 0x2c0, 10)
93 CCU_RESET(RST_BUS_NAND, 0x2c0, 13)
94 CCU_RESET(RST_BUS_DRAM, 0x2c0, 14)
95 CCU_RESET(RST_BUS_EMAC, 0x2c0, 17)
96 CCU_RESET(RST_BUS_HSTIMER, 0x2c0, 19)
97 CCU_RESET(RST_BUS_SPI0, 0x2c0, 20)
98 CCU_RESET(RST_BUS_SPI1, 0x2c0, 21)
99 CCU_RESET(RST_BUS_OTG, 0x2c0, 24)
100 CCU_RESET(RST_BUS_EHCI0, 0x2c0, 26)
101 CCU_RESET(RST_BUS_EHCI1, 0x2c0, 27)
102 CCU_RESET(RST_BUS_OHCI0, 0x2c0, 29)
104 CCU_RESET(RST_BUS_VE, 0x2c4, 0)
105 CCU_RESET(RST_BUS_TCON0, 0x2c4, 4)
106 CCU_RESET(RST_BUS_TCON1, 0x2c4, 5)
107 CCU_RESET(RST_BUS_CSI, 0x2c4, 8)
108 CCU_RESET(RST_BUS_HDMI0, 0x2c4, 10)
109 CCU_RESET(RST_BUS_HDMI1, 0x2c4, 11)
110 CCU_RESET(RST_BUS_DE, 0x2c4, 12)
111 CCU_RESET(RST_BUS_GPU, 0x2c4, 20)
112 CCU_RESET(RST_BUS_MSGBOX, 0x2c4, 21)
113 CCU_RESET(RST_BUS_SPINLOCK, 0x2c4, 22)
115 CCU_RESET(RST_BUS_LVDS, 0x2c8, 0)
117 CCU_RESET(RST_BUS_SPDIF, 0x2d0, 1)
118 CCU_RESET(RST_BUS_I2S0, 0x2d0, 12)
119 CCU_RESET(RST_BUS_I2S1, 0x2d0, 13)
120 CCU_RESET(RST_BUS_I2S2, 0x2d0, 14)
121 CCU_RESET(RST_BUS_TDM, 0x2d0, 15)
123 CCU_RESET(RST_BUS_I2C0, 0x2d8, 0)
124 CCU_RESET(RST_BUS_I2C1, 0x2d8, 1)
125 CCU_RESET(RST_BUS_I2C2, 0x2d8, 2)
126 CCU_RESET(RST_BUS_UART0, 0x2d8, 16)
127 CCU_RESET(RST_BUS_UART1, 0x2d8, 17)
128 CCU_RESET(RST_BUS_UART2, 0x2d8, 18)
129 CCU_RESET(RST_BUS_UART3, 0x2d8, 19)
130 CCU_RESET(RST_BUS_UART4, 0x2d8, 20)
134 CCU_GATE(CLK_BUS_MIPI_DSI, "bus-mipi-dsi", "ahb1", 0x60, 1)
135 CCU_GATE(CLK_BUS_SS, "bus-ss", "ahb1", 0x60, 5)
136 CCU_GATE(CLK_BUS_DMA, "bus-dma", "ahb1", 0x60, 6)
137 CCU_GATE(CLK_BUS_MMC0, "bus-mmc0", "ahb1", 0x60, 8)
138 CCU_GATE(CLK_BUS_MMC1, "bus-mmc1", "ahb1", 0x60, 9)
139 CCU_GATE(CLK_BUS_MMC2, "bus-mmc2", "ahb1", 0x60, 10)
140 CCU_GATE(CLK_BUS_NAND, "bus-nand", "ahb1", 0x60, 13)
141 CCU_GATE(CLK_BUS_DRAM, "bus-dram", "ahb1", 0x60, 14)
142 CCU_GATE(CLK_BUS_EMAC, "bus-emac", "ahb1", 0x60, 17)
143 CCU_GATE(CLK_BUS_HSTIMER, "bus-hstimer", "ahb1", 0x60, 19)
144 CCU_GATE(CLK_BUS_SPI0, "bus-spi0", "ahb1", 0x60, 20)
145 CCU_GATE(CLK_BUS_SPI1, "bus-spi1", "ahb1", 0x60, 21)
146 CCU_GATE(CLK_BUS_OTG, "bus-otg", "ahb1", 0x60, 24)
147 CCU_GATE(CLK_BUS_EHCI0, "bus-ehci0", "ahb2", 0x60, 26)
148 CCU_GATE(CLK_BUS_EHCI1, "bus-ehci1", "ahb2", 0x60, 27)
149 CCU_GATE(CLK_BUS_OHCI0, "bus-ohci0", "ahb2", 0x60, 29)
151 CCU_GATE(CLK_BUS_VE, "bus-ve", "ahb1", 0x64, 0)
152 CCU_GATE(CLK_BUS_TCON0, "bus-tcon0", "ahb1", 0x64, 4)
153 CCU_GATE(CLK_BUS_TCON1, "bus-tcon1", "ahb1", 0x64, 5)
154 CCU_GATE(CLK_BUS_CSI, "bus-csi", "ahb1", 0x64, 8)
155 CCU_GATE(CLK_BUS_HDMI, "bus-hdmi", "ahb1", 0x64, 11)
156 CCU_GATE(CLK_BUS_DE, "bus-de", "ahb1", 0x64, 12)
157 CCU_GATE(CLK_BUS_GPU, "bus-gpu", "ahb1", 0x64, 20)
158 CCU_GATE(CLK_BUS_MSGBOX, "bus-msgbox", "ahb1", 0x64, 21)
159 CCU_GATE(CLK_BUS_SPINLOCK, "bus-spinlock", "ahb1", 0x64, 22)
161 CCU_GATE(CLK_BUS_SPDIF, "bus-spdif", "apb1", 0x68, 1)
162 CCU_GATE(CLK_BUS_PIO, "bus-pio", "apb1", 0x68, 5)
163 CCU_GATE(CLK_BUS_I2S0, "bus-i2s0", "apb1", 0x68, 12)
164 CCU_GATE(CLK_BUS_I2S1, "bus-i2s1", "apb1", 0x68, 13)
165 CCU_GATE(CLK_BUS_I2S2, "bus-i2s2", "apb1", 0x68, 14)
166 CCU_GATE(CLK_BUS_TDM, "bus-tdm", "apb1", 0x68, 15)
168 CCU_GATE(CLK_BUS_I2C0, "bus-i2c0", "apb2", 0x6c, 0)
169 CCU_GATE(CLK_BUS_I2C1, "bus-i2c1", "apb2", 0x6c, 1)
170 CCU_GATE(CLK_BUS_I2C2, "bus-i2c2", "apb2", 0x6c, 2)
171 CCU_GATE(CLK_BUS_UART0, "bus-uart0", "apb2", 0x6c, 16)
172 CCU_GATE(CLK_BUS_UART1, "bus-uart1", "apb2", 0x6c, 17)
173 CCU_GATE(CLK_BUS_UART2, "bus-uart2", "apb2", 0x6c, 18)
174 CCU_GATE(CLK_BUS_UART3, "bus-uart3", "apb2", 0x6c, 19)
175 CCU_GATE(CLK_BUS_UART4, "bus-uart4", "apb2", 0x6c, 20)
177 CCU_GATE(CLK_USB_PHY0, "usb-phy0", "osc24M", 0xcc, 8)
178 CCU_GATE(CLK_USB_PHY1, "usb-phy1", "osc24M", 0xcc, 9)
179 CCU_GATE(CLK_USB_HSIC, "usb-hsic", "pll_hsic", 0xcc, 10)
180 CCU_GATE(CLK_USB_HSIC_12M, "usb-hsic-12M", "osc12M", 0xcc, 11)
181 CCU_GATE(CLK_USB_OHCI0, "usb-ohci0", "osc12M", 0xcc, 16)
183 CCU_GATE(CLK_DRAM_VE, "dram-ve", "dram", 0x100, 0)
184 CCU_GATE(CLK_DRAM_CSI, "dram-csi", "dram", 0x100, 1)
186 CCU_GATE(CLK_CSI_MISC, "csi-misc", "osc24M", 0x130, 16)
187 CCU_GATE(CLK_MIPI_CSI, "mipi-csi", "osc24M", 0x130, 31)
189 CCU_GATE(CLK_AVS, "avs", "osc24M", 0x144, 31)
191 CCU_GATE(CLK_HDMI_SLOW, "hdmi-ddc", "osc24M", 0x154, 31)
198 0, /* freq */
201 0); /* flags */
209 0x00, /* offset */
210 8, 8, 0, AW_CLK_FACTOR_ZERO_BASED, /* n factor */
211 0, 0, 1, AW_CLK_FACTOR_FIXED, /* k factor (fake) */
212 0, 0, 1, AW_CLK_FACTOR_FIXED, /* m factor */
213 0, 0, 1, AW_CLK_FACTOR_FIXED, /* p factor (fake) */
214 0, 0, /* lock */
220 0x04, /* offset */
221 8, 8, 0, AW_CLK_FACTOR_ZERO_BASED, /* n factor */
222 0, 0, 1, AW_CLK_FACTOR_FIXED, /* k factor (fake) */
223 0, 0, 1, AW_CLK_FACTOR_FIXED, /* m factor */
224 0, 0, 1, AW_CLK_FACTOR_FIXED, /* p factor (fake) */
225 0, 0, /* lock */
233 0x08, /* offset */
234 8, 8, 0, AW_CLK_FACTOR_ZERO_BASED, /* n factor */
235 0, 0, 1, AW_CLK_FACTOR_FIXED, /* k factor (fake) */
236 16, 1, 0, 0, /* m factor */
237 18, 1, 0, 0, /* p factor */
239 0, 0, /* lock */
246 0x10, /* offset */
247 8, 8, 0, AW_CLK_FACTOR_ZERO_BASED, /* n factor */
248 0, 0, 1, AW_CLK_FACTOR_FIXED, /* k factor (fake) */
249 16, 1, 0, 0, /* m factor */
250 0, 2, 0, AW_CLK_FACTOR_POWER_OF_TWO, /* p factor */
252 0, 0, /* lock */
259 0x18, /* offset */
260 8, 8, 0, AW_CLK_FACTOR_ZERO_BASED, /* n factor */
261 0, 0, 1, AW_CLK_FACTOR_FIXED, /* k factor (fake) */
262 16, 1, 0, 0, /* m factor */
263 18, 1, 0, 0, /* p factor */
265 0, 0, /* lock */
272 0x20, /* offset */
273 8, 5, 0, 0, /* n factor */
274 0, 0, 1, AW_CLK_FACTOR_FIXED, /* k factor (fake) */
275 16, 1, 0, 0, /* m factor */
276 18, 1, 0, 0, /* p factor */
278 0, 0, /* lock */
285 0x28, /* offset */
286 8, 8, 0, AW_CLK_FACTOR_ZERO_BASED, /* n factor */
287 0, 0, 1, AW_CLK_FACTOR_FIXED, /* k factor (fake) */
288 16, 1, 1, 0, /* m factor */
289 18, 1, 1, 0, /* p factor */
291 0, 0, /* lock */
298 0x38, /* offset */
299 8, 8, 0, AW_CLK_FACTOR_ZERO_BASED, /* n factor */
300 0, 0, 1, AW_CLK_FACTOR_FIXED, /* k factor (fake) */
301 16, 1, 1, 0, /* m factor */
302 18, 1, 1, 0, /* p factor */
304 0, 0, /* lock */
311 0x44, /* offset */
312 8, 8, 0, AW_CLK_FACTOR_ZERO_BASED, /* n factor */
313 0, 0, 1, AW_CLK_FACTOR_FIXED, /* k factor (fake) */
314 16, 1, 1, 0, /* m factor */
315 18, 1, 1, 0, /* p factor */
317 0, 0, /* lock */
324 0x48, /* offset */
325 8, 8, 0, AW_CLK_FACTOR_ZERO_BASED, /* n factor */
326 0, 0, 1, AW_CLK_FACTOR_FIXED, /* k factor (fake) */
327 16, 1, 1, 0, /* m factor */
328 18, 1, 1, 0, /* p factor */
330 0, 0, /* lock */
337 0x4c, /* offset */
338 8, 8, 0, AW_CLK_FACTOR_ZERO_BASED, /* n factor */
339 0, 0, 1, AW_CLK_FACTOR_FIXED, /* k factor (fake) */
340 16, 1, 1, 0, /* m factor */
341 0, 2, 0, AW_CLK_FACTOR_POWER_OF_TWO, /* p factor */
343 0, 0, /* lock */
350 0x50, 12, 1); /* offset, shift, width */
356 0x50, 28, 1); /* offset, shift, width */
362 0x50, /* offset */
363 0, 2, /* shift, width */
364 0, NULL); /* flags, div table */
370 0x50, /* offset */
372 0, NULL); /* flags, div table */
378 0x54, /* offset */
380 4, 2, 0, AW_CLK_FACTOR_POWER_OF_TWO, /* div */
381 6, 2, 0, AW_CLK_FACTOR_HAS_COND, /* prediv */
388 0x54, /* offset */
390 0, NULL); /* flags, div table */
396 0x58, /* offset */
397 16, 2, 0, AW_CLK_FACTOR_POWER_OF_TWO, /* n factor */
398 0, 5, 0, 0, /* m factor */
400 0, /* gate */
407 0x5c,
408 0, 2, /* mux */
409 0, 0, 1, AW_CLK_FACTOR_FIXED, /* div (fake) */
410 0, 0, 2, AW_CLK_FACTOR_HAS_COND | AW_CLK_FACTOR_FIXED, /* prediv */
411 0, 2, 1); /* prediv cond */
418 0x78, 24, 2); /* offset, shift, width */
425 0x80, /* offset */
426 16, 2, 0, AW_CLK_FACTOR_POWER_OF_TWO, /* n factor */
427 0, 4, 0, 0, /* m factor */
435 0x88, /* offset */
436 16, 2, 0, AW_CLK_FACTOR_POWER_OF_TWO, /* n factor */
437 0, 4, 0, 0, /* m factor */
445 0x8c, /* offset */
446 16, 2, 0, AW_CLK_FACTOR_POWER_OF_TWO, /* n factor */
447 0, 4, 0, 0, /* m factor */
455 0x90, /* offset */
456 16, 2, 0, AW_CLK_FACTOR_POWER_OF_TWO, /* n factor */
457 0, 4, 0, 0, /* m factor */
466 0x9c, /* offset */
467 16, 2, 0, AW_CLK_FACTOR_POWER_OF_TWO, /* n factor */
468 0, 4, 0, 0, /* m factor */
476 0xa0, /* offset */
477 16, 2, 0, AW_CLK_FACTOR_POWER_OF_TWO, /* n factor */
478 0, 4, 0, 0, /* m factor */
485 0xa4, /* offset */
486 16, 2, 0, AW_CLK_FACTOR_POWER_OF_TWO, /* n factor */
487 0, 4, 0, 0, /* m factor */
496 0xb0, /* offset */
497 0, 0, 1, AW_CLK_FACTOR_FIXED, /* n factor (fake) */
498 0, 4, 0, 0, /* m factor */
499 0, 0, /* mux */
505 0xb4, /* offset */
506 0, 0, 1, AW_CLK_FACTOR_FIXED, /* n factor (fake) */
507 0, 4, 0, 0, /* m factor */
508 0, 0, /* mux */
514 0xb8, /* offset */
515 0, 0, 1, AW_CLK_FACTOR_FIXED, /* n factor (fake) */
516 0, 4, 0, 0, /* m factor */
517 0, 0, /* mux */
525 0xbc, /* offset */
526 0, 0, 1, AW_CLK_FACTOR_FIXED, /* n factor (fake) */
527 0, 4, 0, 0, /* m factor */
528 0, 0, /* mux */
536 0xc0, /* offset */
537 0, 0, 1, AW_CLK_FACTOR_FIXED, /* n factor (fake) */
538 0, 4, 0, 0, /* m factor */
539 0, 0, /* mux */
547 0xf4, /* offset */
548 0, 0, 1, AW_CLK_FACTOR_FIXED, /* n factor (fake) */
549 0, 4, 0, 0, /* m factor */
550 0, 0, /* mux */
551 0, /* gate */
552 0);
558 0x118, 24, 2); /* offset, shift, width */
564 0x11c, /* offset */
565 0, 0, 1, AW_CLK_FACTOR_FIXED, /* n factor (fake) */
566 0, 4, 0, 0, /* m factor */
567 0, 0, /* mux */
575 0x134, /* offset */
576 0, 0, 1, AW_CLK_FACTOR_FIXED, /* n factor (fake) */
577 0, 4, 0, 0, /* m factor */
586 0x134, /* offset */
587 0, 0, 1, AW_CLK_FACTOR_FIXED, /* n factor (fake) */
588 16, 4, 0, 0, /* m factor */
597 0x13c, /* offset */
598 0, 0, 1, AW_CLK_FACTOR_FIXED, /* n factor (fake) */
599 16, 3, 0, 0, /* m factor */
600 0, 0, /* mux */
608 0x150, /* offset */
609 0, 0, 1, AW_CLK_FACTOR_FIXED, /* n factor (fake) */
610 0, 4, 0, 0, /* m factor */
619 0x15c, /* offset */
620 0, 0, 1, AW_CLK_FACTOR_FIXED, /* n factor (fake) */
621 0, 3, 0, 0, /* m factor */
630 0x168, /* offset */
631 0, 0, 1, AW_CLK_FACTOR_FIXED, /* n factor (fake) */
632 0, 4, 0, 0, /* m factor */
641 0x16c, /* offset */
642 0, 0, 1, AW_CLK_FACTOR_FIXED, /* n factor (fake) */
643 0, 4, 0, 0, /* m factor */
652 0x1a0, /* offset */
653 0, 0, 1, AW_CLK_FACTOR_FIXED, /* n factor (fake) */
654 0, 3, 0, 0, /* m factor */
655 0, 0, /* mux */
663 0x1a4, /* offset */
664 0, 0, 1, AW_CLK_FACTOR_FIXED, /* n factor (fake) */
665 0, 3, 0, 0, /* m factor */
674 0x1a0, /* offset */
675 0, 0, 1, AW_CLK_FACTOR_FIXED, /* n factor (fake) */
676 0, 3, 0, 0, /* m factor */
677 0, 0, /* mux */
731 {"ahb1", "pll_periph", 0, false},
732 {"ahb2", "ahb1", 0, false},
733 {"dram", "pll_ddr", 0, false},
780 EARLY_DRIVER_MODULE(ccu_a83tng, simplebus, ccu_a83tng_driver, 0, 0,