Lines Matching refs:CCU_RESET

84 	CCU_RESET(RST_USB_PHY0, 0x0cc, 0)
85 	CCU_RESET(RST_USB_PHY1, 0x0cc, 1)
86 	CCU_RESET(RST_USB_HSIC, 0x0cc, 2)
88 	CCU_RESET(RST_BUS_MIPI_DSI, 0x2c0, 1)
89 	CCU_RESET(RST_BUS_CE, 0x2c0, 5)
90 	CCU_RESET(RST_BUS_DMA, 0x2c0, 6)
91 	CCU_RESET(RST_BUS_MMC0, 0x2c0, 8)
92 	CCU_RESET(RST_BUS_MMC1, 0x2c0, 9)
93 	CCU_RESET(RST_BUS_MMC2, 0x2c0, 10)
94 	CCU_RESET(RST_BUS_NAND, 0x2c0, 13)
95 	CCU_RESET(RST_BUS_DRAM, 0x2c0, 14)
96 	CCU_RESET(RST_BUS_EMAC, 0x2c0, 17)
97 	CCU_RESET(RST_BUS_TS, 0x2c0, 18)
98 	CCU_RESET(RST_BUS_HSTIMER, 0x2c0, 19)
99 	CCU_RESET(RST_BUS_SPI0, 0x2c0, 20)
100 	CCU_RESET(RST_BUS_SPI1, 0x2c0, 21)
101 	CCU_RESET(RST_BUS_OTG, 0x2c0, 23)
102 	CCU_RESET(RST_BUS_EHCI0, 0x2c0, 24)
103 	CCU_RESET(RST_BUS_EHCI1, 0x2c0, 25)
104 	CCU_RESET(RST_BUS_OHCI0, 0x2c0, 28)
105 	CCU_RESET(RST_BUS_OHCI1, 0x2c0, 29)
107 	CCU_RESET(RST_BUS_VE, 0x2c4, 0)
108 	CCU_RESET(RST_BUS_TCON0, 0x2c4, 3)
109 	CCU_RESET(RST_BUS_TCON1, 0x2c4, 4)
110 	CCU_RESET(RST_BUS_DEINTERLACE, 0x2c4, 5)
111 	CCU_RESET(RST_BUS_CSI, 0x2c4, 8)
112 	CCU_RESET(RST_BUS_HDMI0, 0x2c4, 10)
113 	CCU_RESET(RST_BUS_HDMI1, 0x2c4, 11)
114 	CCU_RESET(RST_BUS_DE, 0x2c4, 12)
115 	CCU_RESET(RST_BUS_GPU, 0x2c4, 20)
116 	CCU_RESET(RST_BUS_MSGBOX, 0x2c4, 21)
117 	CCU_RESET(RST_BUS_SPINLOCK, 0x2c4, 22)
118 	CCU_RESET(RST_BUS_DBG, 0x2c4, 31)
120 	CCU_RESET(RST_BUS_LVDS, 0x2C8, 31)
122 	CCU_RESET(RST_BUS_CODEC, 0x2D0, 0)
123 	CCU_RESET(RST_BUS_SPDIF, 0x2D0, 1)
124 	CCU_RESET(RST_BUS_THS, 0x2D0, 8)
125 	CCU_RESET(RST_BUS_I2S0, 0x2D0, 12)
126 	CCU_RESET(RST_BUS_I2S1, 0x2D0, 13)
127 	CCU_RESET(RST_BUS_I2S2, 0x2D0, 14)
129 	CCU_RESET(RST_BUS_I2C0, 0x2D8, 0)
130 	CCU_RESET(RST_BUS_I2C1, 0x2D8, 1)
131 	CCU_RESET(RST_BUS_I2C2, 0x2D8, 2)
132 	CCU_RESET(RST_BUS_SCR, 0x2D8, 5)
133 	CCU_RESET(RST_BUS_UART0, 0x2D8, 16)
134 	CCU_RESET(RST_BUS_UART1, 0x2D8, 17)
135 	CCU_RESET(RST_BUS_UART2, 0x2D8, 18)
136 	CCU_RESET(RST_BUS_UART3, 0x2D8, 19)
137 	CCU_RESET(RST_BUS_UART4, 0x2D8, 20)