Lines Matching +full:sel +full:- +full:clk
1 /*-
2 * SPDX-License-Identifier: BSD-2-Clause
41 #include <dev/clk/clk_div.h>
42 #include <dev/clk/clk_fixed.h>
43 #include <dev/clk/clk_mux.h>
45 #include <dev/clk/allwinner/aw_ccung.h>
47 #include <dt-bindings/clock/sun50i-a64-ccu.h>
48 #include <dt-bindings/reset/sun50i-a64-ccu.h>
50 /* Non-exported clocks */
141 CCU_GATE(CLK_BUS_MIPI_DSI, "bus-mipi-dsi", "ahb1", 0x60, 1)
142 CCU_GATE(CLK_BUS_CE, "bus-ce", "ahb1", 0x60, 5)
143 CCU_GATE(CLK_BUS_DMA, "bus-dma", "ahb1", 0x60, 6)
144 CCU_GATE(CLK_BUS_MMC0, "bus-mmc0", "ahb1", 0x60, 8)
145 CCU_GATE(CLK_BUS_MMC1, "bus-mmc1", "ahb1", 0x60, 9)
146 CCU_GATE(CLK_BUS_MMC2, "bus-mmc2", "ahb1", 0x60, 10)
147 CCU_GATE(CLK_BUS_NAND, "bus-nand", "ahb1", 0x60, 13)
148 CCU_GATE(CLK_BUS_DRAM, "bus-dram", "ahb1", 0x60, 14)
149 CCU_GATE(CLK_BUS_EMAC, "bus-emac", "ahb2", 0x60, 16)
150 CCU_GATE(CLK_BUS_TS, "bus-ts", "ahb1", 0x60, 18)
151 CCU_GATE(CLK_BUS_HSTIMER, "bus-hstimer", "ahb1", 0x60, 19)
152 CCU_GATE(CLK_BUS_SPI0, "bus-spi0", "ahb1", 0x60, 20)
153 CCU_GATE(CLK_BUS_SPI1, "bus-spi1", "ahb1", 0x60, 21)
154 CCU_GATE(CLK_BUS_OTG, "bus-otg", "ahb1", 0x60, 23)
155 CCU_GATE(CLK_BUS_EHCI0, "bus-ehci0", "ahb1", 0x60, 24)
156 CCU_GATE(CLK_BUS_EHCI1, "bus-ehci1", "ahb2", 0x60, 25)
157 CCU_GATE(CLK_BUS_OHCI0, "bus-ohci0", "ahb1", 0x60, 28)
158 CCU_GATE(CLK_BUS_OHCI1, "bus-ohci1", "ahb2", 0x60, 29)
160 CCU_GATE(CLK_BUS_VE, "bus-ve", "ahb1", 0x64, 0)
161 CCU_GATE(CLK_BUS_TCON0, "bus-tcon0", "ahb1", 0x64, 3)
162 CCU_GATE(CLK_BUS_TCON1, "bus-tcon1", "ahb1", 0x64, 4)
163 CCU_GATE(CLK_BUS_DEINTERLACE, "bus-deinterlace", "ahb1", 0x64, 5)
164 CCU_GATE(CLK_BUS_CSI, "bus-csi", "ahb1", 0x64, 8)
165 CCU_GATE(CLK_BUS_HDMI, "bus-hdmi", "ahb1", 0x64, 11)
166 CCU_GATE(CLK_BUS_DE, "bus-de", "ahb1", 0x64, 12)
167 CCU_GATE(CLK_BUS_GPU, "bus-gpu", "ahb1", 0x64, 20)
168 CCU_GATE(CLK_BUS_MSGBOX, "bus-msgbox", "ahb1", 0x64, 21)
169 CCU_GATE(CLK_BUS_SPINLOCK, "bus-spinlock", "ahb1", 0x64, 22)
171 CCU_GATE(CLK_BUS_CODEC, "bus-codec", "apb1", 0x68, 0)
172 CCU_GATE(CLK_BUS_SPDIF, "bus-spdif", "apb1", 0x68, 1)
173 CCU_GATE(CLK_BUS_PIO, "bus-pio", "apb1", 0x68, 5)
174 CCU_GATE(CLK_BUS_THS, "bus-ths", "apb1", 0x68, 8)
175 CCU_GATE(CLK_BUS_I2S0, "bus-i2s0", "apb1", 0x68, 12)
176 CCU_GATE(CLK_BUS_I2S1, "bus-i2s1", "apb1", 0x68, 13)
177 CCU_GATE(CLK_BUS_I2S2, "bus-i2s2", "apb1", 0x68, 14)
179 CCU_GATE(CLK_BUS_I2C0, "bus-i2c0", "apb2", 0x6C, 0)
180 CCU_GATE(CLK_BUS_I2C1, "bus-i2c1", "apb2", 0x6C, 1)
181 CCU_GATE(CLK_BUS_I2C2, "bus-i2c2", "apb2", 0x6C, 2)
182 CCU_GATE(CLK_BUS_SCR, "bus-src", "apb2", 0x6C, 5)
183 CCU_GATE(CLK_BUS_UART0, "bus-uart0", "apb2", 0x6C, 16)
184 CCU_GATE(CLK_BUS_UART1, "bus-uart1", "apb2", 0x6C, 17)
185 CCU_GATE(CLK_BUS_UART2, "bus-uart2", "apb2", 0x6C, 18)
186 CCU_GATE(CLK_BUS_UART3, "bus-uart3", "apb2", 0x6C, 19)
187 CCU_GATE(CLK_BUS_UART4, "bus-uart4", "apb2", 0x6C, 20)
189 CCU_GATE(CLK_BUS_DBG, "bus-dbg", "ahb1", 0x70, 7)
193 CCU_GATE(CLK_USB_PHY0, "usb-phy0", "osc24M", 0xcc, 8)
194 CCU_GATE(CLK_USB_PHY1, "usb-phy1", "osc24M", 0xcc, 9)
195 CCU_GATE(CLK_USB_HSIC, "usb-hsic", "pll_hsic", 0xcc, 10)
196 CCU_GATE(CLK_USB_HSIC_12M, "usb-hsic-12M", "osc12M", 0xcc, 11)
197 CCU_GATE(CLK_USB_OHCI0, "usb-ohci0", "osc12M", 0xcc, 16)
198 CCU_GATE(CLK_USB_OHCI1, "usb-ohci1", "usb-ohci0", 0xcc, 17)
200 CCU_GATE(CLK_DRAM_VE, "dram-ve", "dram", 0x100, 0)
201 CCU_GATE(CLK_DRAM_CSI, "dram-csi", "dram", 0x100, 1)
202 CCU_GATE(CLK_DRAM_DEINTERLACE, "dram-deinterlace", "dram", 0x100, 2)
203 CCU_GATE(CLK_DRAM_TS, "dram-ts", "dram", 0x100, 3)
205 CCU_GATE(CLK_CSI_MISC, "csi-misc", "osc24M", 0x130, 31)
207 CCU_GATE(CLK_AC_DIG_4X, "ac-dig-4x", "pll_audio-4x", 0x140, 30)
208 CCU_GATE(CLK_AC_DIG, "ac-dig", "pll_audio", 0x140, 31)
212 CCU_GATE(CLK_HDMI_DDC, "hdmi-ddc", "osc24M", 0x154, 31)
254 "pll_audio-2x", /* name */
262 "pll_audio-4x", /* name */
270 "pll_audio-8x", /* name */
287 24, 25, /* mode sel, freq sel */
292 "pll_video0-2x", /* name */
309 24, 25, /* mode sel, freq sel */
380 24, 25, /* mode sel, freq sel */
393 24, 25, /* mode sel, freq sel */
416 24, 25, /* mode sel, freq sel */
429 24, 25, /* mode sel, freq sel */
608 static const char *i2s_parents[] = {"pll_audio-8x", "pll_audio-4x", "pll_audio-2x", "pll_audio"};
628 /* USBPHY clk sel */
649 static const char *tcon0_parents[] = {"pll_mipi", NULL, "pll_video0-2x"};
676 CLK_CSI_SCLK, "csi-sclk", csi_sclk_parents, /* id, name, parents */
685 CLK_CSI_MCLK, "csi-mclk", csi_mclk_parents, /* id, name, parents */
729 { .type = AW_CLK_NKMP, .clk.nkmp = &pll_cpux_clk},
730 { .type = AW_CLK_NKMP, .clk.nkmp = &pll_audio_clk},
731 { .type = AW_CLK_FRAC, .clk.frac = &pll_video0_clk},
732 { .type = AW_CLK_FRAC, .clk.frac = &pll_ve_clk},
733 { .type = AW_CLK_NKMP, .clk.nkmp = &pll_ddr0_clk},
734 { .type = AW_CLK_NKMP, .clk.nkmp = &pll_periph0_2x_clk},
735 { .type = AW_CLK_NKMP, .clk.nkmp = &pll_periph1_2x_clk},
736 { .type = AW_CLK_FRAC, .clk.frac = &pll_video1_clk},
737 { .type = AW_CLK_FRAC, .clk.frac = &pll_gpu_clk},
738 { .type = AW_CLK_MIPI, .clk.mipi = &pll_mipi_clk},
739 { .type = AW_CLK_FRAC, .clk.frac = &pll_hsic_clk},
740 { .type = AW_CLK_FRAC, .clk.frac = &pll_de_clk},
741 { .type = AW_CLK_NKMP, .clk.nkmp = &pll_ddr1_clk},
743 { .type = AW_CLK_NM, .clk.nm = &apb2_clk},
744 { .type = AW_CLK_NM, .clk.nm = &nand_clk},
745 { .type = AW_CLK_NM, .clk.nm = &mmc0_clk},
746 { .type = AW_CLK_NM, .clk.nm = &mmc1_clk},
747 { .type = AW_CLK_NM, .clk.nm = &mmc2_clk},
748 { .type = AW_CLK_NM, .clk.nm = &ts_clk},
749 { .type = AW_CLK_NM, .clk.nm = &ce_clk},
750 { .type = AW_CLK_NM, .clk.nm = &spi0_clk},
751 { .type = AW_CLK_NM, .clk.nm = &spi1_clk},
752 { .type = AW_CLK_M, .clk.m = &spdif_clk},
753 { .type = AW_CLK_M, .clk.m = &dram_clk},
754 { .type = AW_CLK_M, .clk.m = &de_clk},
755 { .type = AW_CLK_M, .clk.m = &tcon1_clk},
756 { .type = AW_CLK_M, .clk.m = &deinterlace_clk},
757 { .type = AW_CLK_M, .clk.m = &csi_sclk_clk},
758 { .type = AW_CLK_M, .clk.m = &csi_mclk_clk},
759 { .type = AW_CLK_M, .clk.m = &ve_clk},
760 { .type = AW_CLK_M, .clk.m = &hdmi_clk},
761 { .type = AW_CLK_M, .clk.m = &mbus_clk},
762 { .type = AW_CLK_M, .clk.m = &gpu_clk},
763 { .type = AW_CLK_PREDIV_MUX, .clk.prediv_mux = &ahb1_clk},
764 { .type = AW_CLK_PREDIV_MUX, .clk.prediv_mux = &ahb2_clk},
765 { .type = AW_CLK_MUX, .clk.mux = &cpux_clk},
766 { .type = AW_CLK_MUX, .clk.mux = &i2s0mux_clk},
767 { .type = AW_CLK_MUX, .clk.mux = &i2s1mux_clk},
768 { .type = AW_CLK_MUX, .clk.mux = &i2s2mux_clk},
769 { .type = AW_CLK_MUX, .clk.mux = &tcon0_clk},
770 { .type = AW_CLK_DIV, .clk.div = &axi_clk},
771 { .type = AW_CLK_DIV, .clk.div = &apb1_clk},
772 { .type = AW_CLK_DIV, .clk.div = &apb_clk},
773 { .type = AW_CLK_DIV, .clk.div = &ths_clk},
774 { .type = AW_CLK_FIXED, .clk.fixed = &osc12m_clk},
775 { .type = AW_CLK_FIXED, .clk.fixed = &pll_periph0_clk},
776 { .type = AW_CLK_FIXED, .clk.fixed = &pll_periph1_clk},
777 { .type = AW_CLK_FIXED, .clk.fixed = &pll_audio_2x_clk},
778 { .type = AW_CLK_FIXED, .clk.fixed = &pll_audio_4x_clk},
779 { .type = AW_CLK_FIXED, .clk.fixed = &pll_audio_8x_clk},
780 { .type = AW_CLK_FIXED, .clk.fixed = &pll_video0_2x_clk},
798 if (!ofw_bus_is_compatible(dev, "allwinner,sun50i-a64-ccu")) in ccu_a64_probe()
812 sc->resets = a64_ccu_resets; in ccu_a64_attach()
813 sc->nresets = nitems(a64_ccu_resets); in ccu_a64_attach()
814 sc->gates = a64_ccu_gates; in ccu_a64_attach()
815 sc->ngates = nitems(a64_ccu_gates); in ccu_a64_attach()
816 sc->clks = a64_ccu_clks; in ccu_a64_attach()
817 sc->nclks = nitems(a64_ccu_clks); in ccu_a64_attach()
818 sc->clk_init = a64_init_clks; in ccu_a64_attach()
819 sc->n_clk_init = nitems(a64_init_clks); in ccu_a64_attach()