Lines Matching +full:24 +full:m

75 #define	CLK_AHB1			24
102 CCU_RESET(RST_BUS_EHCI0, 0x2c0, 24)
155 CCU_GATE(CLK_BUS_EHCI0, "bus-ehci0", "ahb1", 0x60, 24)
196 CCU_GATE(CLK_USB_HSIC_12M, "usb-hsic-12M", "osc12M", 0xcc, 11)
232 0, 2, 0, 0, /* m factor */
245 0, 5, 0, 0, /* m factor */
283 0, 4, 0, 0, /* m factor */
287 24, 25, /* mode sel, freq sel */
305 0, 4, 0, 0, /* m factor */
309 24, 25, /* mode sel, freq sel */
319 0, 2, 0, 0, /* m factor */
334 0, 0, 2, AW_CLK_FACTOR_FIXED, /* m factor (fake) */
356 0, 0, 2, AW_CLK_FACTOR_FIXED, /* m factor (fake) */
376 0, 4, 0, 0, /* m factor */
380 24, 25, /* mode sel, freq sel */
389 0, 4, 0, 0, /* m factor */
393 24, 25, /* mode sel, freq sel */
412 0, 4, 0, 0, /* m factor */
416 24, 25, /* mode sel, freq sel */
425 0, 4, 0, 0, /* m factor */
429 24, 25, /* mode sel, freq sel */
439 0, 2, 0, 0, /* m factor */
499 0, 5, 0, 0, /* m factor */
500 24, 2, /* mux */
534 0, 4, 0, 0, /* m factor */
535 24, 2, /* mux */
543 0, 4, 0, 0, /* m factor */
544 24, 2, /* mux */
553 0, 4, 0, 0, /* m factor */
554 24, 2, /* mux */
563 0, 4, 0, 0, /* m factor */
564 24, 2, /* mux */
574 0, 4, 0, 0, /* m factor */
575 24, 2, /* mux */
583 0, 4, 0, 0, /* m factor */
584 24, 2, /* mux */
592 0, 4, 0, 0, /* m factor */
593 24, 2, /* mux */
602 0, 4, 0, 0, /* m factor */
603 24, 2, /* mux */
623 0, 4, 0, 0, /* m factor */
635 0, 2, 0, 0, /* m factor */
644 0, 4, 0, 0, /* m factor */
645 24, 2, /* mux */
653 0x118, 24, 2); /* offset, shift, width */
659 0, 5, 0, 0, /* m factor */
660 24, 2, /* mux */
669 0, 4, 0, 0, /* m factor */
670 24, 2, /* mux */
678 16, 4, 0, 0, /* m factor */
679 24, 2, /* mux */
687 0, 4, 0, 0, /* m factor */
696 16, 3, 0, 0, /* m factor */
705 0, 4, 0, 0, /* m factor */
706 24, 2, /* mux */
714 0, 3, 0, 0, /* m factor */
715 24, 2, /* mux */
723 0, 2, 0, 0, /* m factor */
752 { .type = AW_CLK_M, .clk.m = &spdif_clk},
753 { .type = AW_CLK_M, .clk.m = &dram_clk},
754 { .type = AW_CLK_M, .clk.m = &de_clk},
755 { .type = AW_CLK_M, .clk.m = &tcon1_clk},
756 { .type = AW_CLK_M, .clk.m = &deinterlace_clk},
757 { .type = AW_CLK_M, .clk.m = &csi_sclk_clk},
758 { .type = AW_CLK_M, .clk.m = &csi_mclk_clk},
759 { .type = AW_CLK_M, .clk.m = &ve_clk},
760 { .type = AW_CLK_M, .clk.m = &hdmi_clk},
761 { .type = AW_CLK_M, .clk.m = &mbus_clk},
762 { .type = AW_CLK_M, .clk.m = &gpu_clk},