Lines Matching +full:sel +full:- +full:clk
1 /*-
2 * SPDX-License-Identifier: BSD-2-Clause
41 #include <dev/clk/clk_div.h>
42 #include <dev/clk/clk_fixed.h>
43 #include <dev/clk/clk_mux.h>
45 #include <dev/clk/allwinner/aw_ccung.h>
47 #include <dt-bindings/clock/sun6i-a31-ccu.h>
48 #include <dt-bindings/reset/sun6i-a31-ccu.h>
50 /* Non-exported clocks */
148 CCU_GATE(CLK_AHB1_MIPIDSI, "ahb1-mipidsi", "ahb1", 0x60, 1)
149 CCU_GATE(CLK_AHB1_SS, "ahb1-ss", "ahb1", 0x60, 5)
150 CCU_GATE(CLK_AHB1_DMA, "ahb1-dma", "ahb1", 0x60, 6)
151 CCU_GATE(CLK_AHB1_MMC0, "ahb1-mmc0", "ahb1", 0x60, 8)
152 CCU_GATE(CLK_AHB1_MMC1, "ahb1-mmc1", "ahb1", 0x60, 9)
153 CCU_GATE(CLK_AHB1_MMC2, "ahb1-mmc2", "ahb1", 0x60, 10)
154 CCU_GATE(CLK_AHB1_MMC3, "ahb1-mmc3", "ahb1", 0x60, 11)
155 CCU_GATE(CLK_AHB1_NAND1, "ahb1-nand1", "ahb1", 0x60, 12)
156 CCU_GATE(CLK_AHB1_NAND0, "ahb1-nand0", "ahb1", 0x60, 13)
157 CCU_GATE(CLK_AHB1_SDRAM, "ahb1-sdram", "ahb1", 0x60, 14)
158 CCU_GATE(CLK_AHB1_EMAC, "ahb1-emac", "ahb1", 0x60, 17)
159 CCU_GATE(CLK_AHB1_TS, "ahb1-ts", "ahb1", 0x60, 18)
160 CCU_GATE(CLK_AHB1_HSTIMER, "ahb1-hstimer", "ahb1", 0x60, 19)
161 CCU_GATE(CLK_AHB1_SPI0, "ahb1-spi0", "ahb1", 0x60, 20)
162 CCU_GATE(CLK_AHB1_SPI1, "ahb1-spi1", "ahb1", 0x60, 21)
163 CCU_GATE(CLK_AHB1_SPI2, "ahb1-spi2", "ahb1", 0x60, 22)
164 CCU_GATE(CLK_AHB1_SPI3, "ahb1-spi3", "ahb1", 0x60, 23)
165 CCU_GATE(CLK_AHB1_OTG, "ahb1-otg", "ahb1", 0x60, 24)
166 CCU_GATE(CLK_AHB1_EHCI0, "ahb1-ehci0", "ahb1", 0x60, 26)
167 CCU_GATE(CLK_AHB1_EHCI1, "ahb1-ehci1", "ahb1", 0x60, 27)
168 CCU_GATE(CLK_AHB1_OHCI0, "ahb1-ohci0", "ahb1", 0x60, 29)
169 CCU_GATE(CLK_AHB1_OHCI1, "ahb1-ohci1", "ahb1", 0x60, 30)
170 CCU_GATE(CLK_AHB1_OHCI2, "ahb1-ohci2", "ahb1", 0x60, 31)
171 CCU_GATE(CLK_AHB1_VE, "ahb1-ve", "ahb1", 0x64, 0)
172 CCU_GATE(CLK_AHB1_LCD0, "ahb1-lcd0", "ahb1", 0x64, 4)
173 CCU_GATE(CLK_AHB1_LCD1, "ahb1-lcd1", "ahb1", 0x64, 5)
174 CCU_GATE(CLK_AHB1_CSI, "ahb1-csi", "ahb1", 0x64, 8)
175 CCU_GATE(CLK_AHB1_HDMI, "ahb1-hdmi", "ahb1", 0x64, 11)
176 CCU_GATE(CLK_AHB1_BE0, "ahb1-be0", "ahb1", 0x64, 12)
177 CCU_GATE(CLK_AHB1_BE1, "ahb1-be1", "ahb1", 0x64, 13)
178 CCU_GATE(CLK_AHB1_FE0, "ahb1-fe0", "ahb1", 0x64, 14)
179 CCU_GATE(CLK_AHB1_FE1, "ahb1-fe1", "ahb1", 0x64, 15)
180 CCU_GATE(CLK_AHB1_MP, "ahb1-mp", "ahb1", 0x64, 18)
181 CCU_GATE(CLK_AHB1_GPU, "ahb1-gpu", "ahb1", 0x64, 20)
182 CCU_GATE(CLK_AHB1_DEU0, "ahb1-deu0", "ahb1", 0x64, 23)
183 CCU_GATE(CLK_AHB1_DEU1, "ahb1-deu1", "ahb1", 0x64, 24)
184 CCU_GATE(CLK_AHB1_DRC0, "ahb1-drc0", "ahb1", 0x64, 25)
185 CCU_GATE(CLK_AHB1_DRC1, "ahb1-drc1", "ahb1", 0x64, 26)
187 CCU_GATE(CLK_APB1_CODEC, "apb1-codec", "apb1", 0x68, 0)
188 CCU_GATE(CLK_APB1_SPDIF, "apb1-spdif", "apb1", 0x68, 1)
189 CCU_GATE(CLK_APB1_DIGITAL_MIC, "apb1-digital-mic", "apb1", 0x68, 4)
190 CCU_GATE(CLK_APB1_PIO, "apb1-pio", "apb1", 0x68, 5)
191 CCU_GATE(CLK_APB1_DAUDIO0, "apb1-daudio0", "apb1", 0x68, 12)
192 CCU_GATE(CLK_APB1_DAUDIO1, "apb1-daudio1", "apb1", 0x68, 13)
194 CCU_GATE(CLK_APB2_I2C0, "apb2-i2c0", "apb2", 0x6c, 0)
195 CCU_GATE(CLK_APB2_I2C1, "apb2-i2c1", "apb2", 0x6c, 1)
196 CCU_GATE(CLK_APB2_I2C2, "apb2-i2c2", "apb2", 0x6c, 2)
197 CCU_GATE(CLK_APB2_I2C3, "apb2-i2c3", "apb2", 0x6c, 3)
198 CCU_GATE(CLK_APB2_UART0, "apb2-uart0", "apb2", 0x6c, 16)
199 CCU_GATE(CLK_APB2_UART1, "apb2-uart1", "apb2", 0x6c, 17)
200 CCU_GATE(CLK_APB2_UART2, "apb2-uart2", "apb2", 0x6c, 18)
201 CCU_GATE(CLK_APB2_UART3, "apb2-uart3", "apb2", 0x6c, 19)
202 CCU_GATE(CLK_APB2_UART4, "apb2-uart4", "apb2", 0x6c, 20)
203 CCU_GATE(CLK_APB2_UART5, "apb2-uart5", "apb2", 0x6c, 21)
208 CCU_GATE(CLK_USB_PHY0, "usb-phy0", "osc24M", 0xcc, 8)
209 CCU_GATE(CLK_USB_PHY1, "usb-phy1", "osc24M", 0xcc, 9)
210 CCU_GATE(CLK_USB_PHY2, "usb-phy2", "osc24M", 0xcc, 10)
211 CCU_GATE(CLK_USB_OHCI0, "usb-ohci0", "osc24M", 0xcc, 16)
212 CCU_GATE(CLK_USB_OHCI1, "usb-ohci1", "osc24M", 0xcc, 17)
213 CCU_GATE(CLK_USB_OHCI2, "usb-ohci2", "osc24M", 0xcc, 18)
215 CCU_GATE(CLK_DRAM_VE, "dram-ve", "mdfs", 0x100, 0)
216 CCU_GATE(CLK_DRAM_CSI_ISP, "dram-csi_isp", "mdfs", 0x100, 1)
217 CCU_GATE(CLK_DRAM_TS, "dram-ts", "mdfs", 0x100, 3)
218 CCU_GATE(CLK_DRAM_DRC0, "dram-drc0", "mdfs", 0x100, 16)
219 CCU_GATE(CLK_DRAM_DRC1, "dram-drc1", "mdfs", 0x100, 17)
220 CCU_GATE(CLK_DRAM_DEU0, "dram-deu0", "mdfs", 0x100, 18)
221 CCU_GATE(CLK_DRAM_DEU1, "dram-deu1", "mdfs", 0x100, 19)
222 CCU_GATE(CLK_DRAM_FE0, "dram-fe0", "mdfs", 0x100, 24)
223 CCU_GATE(CLK_DRAM_FE1, "dram-fe1", "mdfs", 0x100, 25)
224 CCU_GATE(CLK_DRAM_BE0, "dram-be0", "mdfs", 0x100, 26)
225 CCU_GATE(CLK_DRAM_BE1, "dram-be1", "mdfs", 0x100, 27)
226 CCU_GATE(CLK_DRAM_MP, "dram-mp", "mdfs", 0x100, 28)
232 CCU_GATE(CLK_DIGITAL_MIC, "digital-mic", "pll_audio", 0x148, 31)
234 CCU_GATE(CLK_HDMI_DDC, "hdmi-ddc", "osc24M", 0x150, 30)
268 "pll_audio-2x", /* name */
276 "pll_audio-4x", /* name */
284 "pll_audio-8x", /* name */
300 24, 25, /* mode sel, freq sel */
305 "pll_video0-2x", /* name */
321 24, 25, /* mode sel, freq sel */
352 "pll_periph-2x", /* name */
368 24, 25, /* mode sel, freq sel */
374 "pll_video1-2x", /* name */
390 24, 25, /* mode sel, freq sel */
415 24, 25, /* mode sel, freq sel */
427 24, 25, /* mode sel, freq sel */
606 static const char *daudio_parents[] = {"pll_audio-8x", "pll_audio-4x", "pll_audio-2x", "pll_audio"};
644 static const char *befe_parents[] = {"pll_video0", "pll_video1", "pll_periph-2x", "pll_gpu", "pll9"…
690 static const char *lcd_ch0_parents[] = {"pll_video0", "pll_video1", "pll_video0-2x", "pll_video1-2x…
709 static const char *lcd_ch1_parents[] = {"pll_video0", "pll_video1", "pll_video0-2x", "pll_video1-2x…
769 static const char *mipi_parents[] = {"pll_video0", "pll_video1", "pll_video0-2x", "pll_video1-2x"};
797 static const char *iep_parents[] = {"pll_video0", "pll_video1", "pll_periph-2x", "pll_gpu", "pll9",…
835 static const char *gpu_parents[] = {"pll_gpu", "pll_periph-2x", "pll_video0", "pll_video1", "pll9",…
866 { .type = AW_CLK_NKMP, .clk.nkmp = &pll_cpu_clk},
867 { .type = AW_CLK_NKMP, .clk.nkmp = &pll_audio_clk},
868 { .type = AW_CLK_NKMP, .clk.nkmp = &pll_periph_clk},
869 { .type = AW_CLK_NKMP, .clk.nkmp = &pll_ddr_clk},
870 { .type = AW_CLK_NKMP, .clk.nkmp = &pll_mipi_clk},
871 { .type = AW_CLK_FRAC, .clk.frac = &pll_video0_clk},
872 { .type = AW_CLK_FRAC, .clk.frac = &pll_ve_clk},
873 { .type = AW_CLK_FRAC, .clk.frac = &pll_video1_clk},
874 { .type = AW_CLK_FRAC, .clk.frac = &pll_gpu_clk},
875 { .type = AW_CLK_FRAC, .clk.frac = &pll9_clk},
876 { .type = AW_CLK_FRAC, .clk.frac = &pll10_clk},
877 { .type = AW_CLK_NM, .clk.nm = &apb2_clk},
878 { .type = AW_CLK_NM, .clk.nm = &nand0_clk},
879 { .type = AW_CLK_NM, .clk.nm = &nand1_clk},
880 { .type = AW_CLK_NM, .clk.nm = &mmc0_clk},
881 { .type = AW_CLK_NM, .clk.nm = &mmc1_clk},
882 { .type = AW_CLK_NM, .clk.nm = &mmc2_clk},
883 { .type = AW_CLK_NM, .clk.nm = &mmc3_clk},
884 { .type = AW_CLK_NM, .clk.nm = &ts_clk},
885 { .type = AW_CLK_NM, .clk.nm = &ss_clk},
886 { .type = AW_CLK_NM, .clk.nm = &spi0_clk},
887 { .type = AW_CLK_NM, .clk.nm = &spi1_clk},
888 { .type = AW_CLK_NM, .clk.nm = &spi2_clk},
889 { .type = AW_CLK_NM, .clk.nm = &spi3_clk},
890 { .type = AW_CLK_NM, .clk.nm = &mdfs_clk},
891 { .type = AW_CLK_NM, .clk.nm = &sdram0_clk},
892 { .type = AW_CLK_NM, .clk.nm = &sdram1_clk},
893 { .type = AW_CLK_NM, .clk.nm = &be0_clk},
894 { .type = AW_CLK_NM, .clk.nm = &be1_clk},
895 { .type = AW_CLK_NM, .clk.nm = &fe0_clk},
896 { .type = AW_CLK_NM, .clk.nm = &fe1_clk},
897 { .type = AW_CLK_NM, .clk.nm = &mp_clk},
898 { .type = AW_CLK_NM, .clk.nm = &lcd0_ch0_clk},
899 { .type = AW_CLK_NM, .clk.nm = &lcd1_ch0_clk},
900 { .type = AW_CLK_NM, .clk.nm = &lcd0_ch1_clk},
901 { .type = AW_CLK_NM, .clk.nm = &lcd1_ch1_clk},
902 { .type = AW_CLK_NM, .clk.nm = &ve_clk},
903 { .type = AW_CLK_NM, .clk.nm = &hdmi_clk},
904 { .type = AW_CLK_NM, .clk.nm = &mbus0_clk},
905 { .type = AW_CLK_NM, .clk.nm = &mbus1_clk},
906 { .type = AW_CLK_NM, .clk.nm = &mipi_dsi_clk},
907 { .type = AW_CLK_NM, .clk.nm = &mipi_dsi_dphy_clk},
908 { .type = AW_CLK_NM, .clk.nm = &mipi_csi_dphy_clk},
909 { .type = AW_CLK_NM, .clk.nm = &iep_drc0_clk},
910 { .type = AW_CLK_NM, .clk.nm = &iep_drc1_clk},
911 { .type = AW_CLK_NM, .clk.nm = &iep_deu0_clk},
912 { .type = AW_CLK_NM, .clk.nm = &iep_deu1_clk},
913 { .type = AW_CLK_PREDIV_MUX, .clk.prediv_mux = &ahb1_clk},
914 { .type = AW_CLK_PREDIV_MUX, .clk.prediv_mux = &gpu_core_clk},
915 { .type = AW_CLK_PREDIV_MUX, .clk.prediv_mux = &gpu_memory_clk},
916 { .type = AW_CLK_PREDIV_MUX, .clk.prediv_mux = &gpu_hyd_clk},
917 { .type = AW_CLK_DIV, .clk.div = &axi_clk},
918 { .type = AW_CLK_DIV, .clk.div = &apb1_clk},
919 { .type = AW_CLK_MUX, .clk.mux = &cpu_clk},
920 { .type = AW_CLK_MUX, .clk.mux = &daudio0mux_clk},
921 { .type = AW_CLK_MUX, .clk.mux = &daudio1mux_clk},
922 { .type = AW_CLK_FIXED, .clk.fixed = &pll_audio_2x_clk},
923 { .type = AW_CLK_FIXED, .clk.fixed = &pll_audio_4x_clk},
924 { .type = AW_CLK_FIXED, .clk.fixed = &pll_audio_8x_clk},
925 { .type = AW_CLK_FIXED, .clk.fixed = &pll_video0_2x_clk},
926 { .type = AW_CLK_FIXED, .clk.fixed = &pll_periph_2x_clk},
927 { .type = AW_CLK_FIXED, .clk.fixed = &pll_video1_2x_clk},
937 if (!ofw_bus_is_compatible(dev, "allwinner,sun6i-a31-ccu")) in ccu_a31_probe()
951 sc->resets = a31_ccu_resets; in ccu_a31_attach()
952 sc->nresets = nitems(a31_ccu_resets); in ccu_a31_attach()
953 sc->gates = a31_ccu_gates; in ccu_a31_attach()
954 sc->ngates = nitems(a31_ccu_gates); in ccu_a31_attach()
955 sc->clks = a31_ccu_clks; in ccu_a31_attach()
956 sc->nclks = nitems(a31_ccu_clks); in ccu_a31_attach()