Lines Matching +full:0 +full:x2d0
51 #define CLK_PLL_CPU 0
83 CCU_RESET(RST_USB_PHY0, 0xcc, 0)
84 CCU_RESET(RST_USB_PHY1, 0xcc, 1)
85 CCU_RESET(RST_USB_PHY2, 0xcc, 2)
87 CCU_RESET(RST_AHB1_MIPI_DSI, 0x2c0, 1)
88 CCU_RESET(RST_AHB1_SS, 0x2c0, 5)
89 CCU_RESET(RST_AHB1_DMA, 0x2c0, 6)
90 CCU_RESET(RST_AHB1_MMC0, 0x2c0, 8)
91 CCU_RESET(RST_AHB1_MMC1, 0x2c0, 9)
92 CCU_RESET(RST_AHB1_MMC2, 0x2c0, 10)
93 CCU_RESET(RST_AHB1_MMC3, 0x2c0, 11)
94 CCU_RESET(RST_AHB1_NAND1, 0x2c0, 12)
95 CCU_RESET(RST_AHB1_NAND0, 0x2c0, 13)
96 CCU_RESET(RST_AHB1_SDRAM, 0x2c0, 14)
97 CCU_RESET(RST_AHB1_EMAC, 0x2c0, 17)
98 CCU_RESET(RST_AHB1_TS, 0x2c0, 18)
99 CCU_RESET(RST_AHB1_HSTIMER, 0x2c0, 19)
100 CCU_RESET(RST_AHB1_SPI0, 0x2c0, 20)
101 CCU_RESET(RST_AHB1_SPI1, 0x2c0, 21)
102 CCU_RESET(RST_AHB1_SPI2, 0x2c0, 22)
103 CCU_RESET(RST_AHB1_SPI3, 0x2c0, 23)
104 CCU_RESET(RST_AHB1_OTG, 0x2c0, 24)
105 CCU_RESET(RST_AHB1_EHCI0, 0x2c0, 26)
106 CCU_RESET(RST_AHB1_EHCI1, 0x2c0, 27)
107 CCU_RESET(RST_AHB1_OHCI0, 0x2c0, 29)
108 CCU_RESET(RST_AHB1_OHCI1, 0x2c0, 30)
109 CCU_RESET(RST_AHB1_OHCI2, 0x2c0, 31)
111 CCU_RESET(RST_AHB1_VE, 0x2c4, 0)
112 CCU_RESET(RST_AHB1_LCD0, 0x2c4, 4)
113 CCU_RESET(RST_AHB1_LCD1, 0x2c4, 5)
114 CCU_RESET(RST_AHB1_CSI, 0x2c4, 8)
115 CCU_RESET(RST_AHB1_HDMI, 0x2c4, 11)
116 CCU_RESET(RST_AHB1_BE0, 0x2c4, 12)
117 CCU_RESET(RST_AHB1_BE1, 0x2c4, 13)
118 CCU_RESET(RST_AHB1_FE0, 0x2c4, 14)
119 CCU_RESET(RST_AHB1_FE1, 0x2c4, 15)
120 CCU_RESET(RST_AHB1_MP, 0x2c4, 18)
121 CCU_RESET(RST_AHB1_GPU, 0x2c4, 20)
122 CCU_RESET(RST_AHB1_DEU0, 0x2c4, 23)
123 CCU_RESET(RST_AHB1_DEU1, 0x2c4, 24)
124 CCU_RESET(RST_AHB1_DRC0, 0x2c4, 25)
125 CCU_RESET(RST_AHB1_DRC1, 0x2c4, 26)
127 CCU_RESET(RST_AHB1_LVDS, 0x2c8, 0)
129 CCU_RESET(RST_APB1_CODEC, 0x2d0, 0)
130 CCU_RESET(RST_APB1_SPDIF, 0x2d0, 1)
131 CCU_RESET(RST_APB1_DIGITAL_MIC, 0x2d0, 4)
132 CCU_RESET(RST_APB1_DAUDIO0, 0x2d0, 12)
133 CCU_RESET(RST_APB1_DAUDIO1, 0x2d0, 13)
135 CCU_RESET(RST_APB2_I2C0, 0x2d8, 0)
136 CCU_RESET(RST_APB2_I2C1, 0x2d8, 1)
137 CCU_RESET(RST_APB2_I2C2, 0x2d8, 2)
138 CCU_RESET(RST_APB2_I2C3, 0x2d8, 3)
139 CCU_RESET(RST_APB2_UART0, 0x2d8, 16)
140 CCU_RESET(RST_APB2_UART1, 0x2d8, 17)
141 CCU_RESET(RST_APB2_UART2, 0x2d8, 18)
142 CCU_RESET(RST_APB2_UART3, 0x2d8, 19)
143 CCU_RESET(RST_APB2_UART4, 0x2d8, 20)
144 CCU_RESET(RST_APB2_UART5, 0x2d8, 21)
148 CCU_GATE(CLK_AHB1_MIPIDSI, "ahb1-mipidsi", "ahb1", 0x60, 1)
149 CCU_GATE(CLK_AHB1_SS, "ahb1-ss", "ahb1", 0x60, 5)
150 CCU_GATE(CLK_AHB1_DMA, "ahb1-dma", "ahb1", 0x60, 6)
151 CCU_GATE(CLK_AHB1_MMC0, "ahb1-mmc0", "ahb1", 0x60, 8)
152 CCU_GATE(CLK_AHB1_MMC1, "ahb1-mmc1", "ahb1", 0x60, 9)
153 CCU_GATE(CLK_AHB1_MMC2, "ahb1-mmc2", "ahb1", 0x60, 10)
154 CCU_GATE(CLK_AHB1_MMC3, "ahb1-mmc3", "ahb1", 0x60, 11)
155 CCU_GATE(CLK_AHB1_NAND1, "ahb1-nand1", "ahb1", 0x60, 12)
156 CCU_GATE(CLK_AHB1_NAND0, "ahb1-nand0", "ahb1", 0x60, 13)
157 CCU_GATE(CLK_AHB1_SDRAM, "ahb1-sdram", "ahb1", 0x60, 14)
158 CCU_GATE(CLK_AHB1_EMAC, "ahb1-emac", "ahb1", 0x60, 17)
159 CCU_GATE(CLK_AHB1_TS, "ahb1-ts", "ahb1", 0x60, 18)
160 CCU_GATE(CLK_AHB1_HSTIMER, "ahb1-hstimer", "ahb1", 0x60, 19)
161 CCU_GATE(CLK_AHB1_SPI0, "ahb1-spi0", "ahb1", 0x60, 20)
162 CCU_GATE(CLK_AHB1_SPI1, "ahb1-spi1", "ahb1", 0x60, 21)
163 CCU_GATE(CLK_AHB1_SPI2, "ahb1-spi2", "ahb1", 0x60, 22)
164 CCU_GATE(CLK_AHB1_SPI3, "ahb1-spi3", "ahb1", 0x60, 23)
165 CCU_GATE(CLK_AHB1_OTG, "ahb1-otg", "ahb1", 0x60, 24)
166 CCU_GATE(CLK_AHB1_EHCI0, "ahb1-ehci0", "ahb1", 0x60, 26)
167 CCU_GATE(CLK_AHB1_EHCI1, "ahb1-ehci1", "ahb1", 0x60, 27)
168 CCU_GATE(CLK_AHB1_OHCI0, "ahb1-ohci0", "ahb1", 0x60, 29)
169 CCU_GATE(CLK_AHB1_OHCI1, "ahb1-ohci1", "ahb1", 0x60, 30)
170 CCU_GATE(CLK_AHB1_OHCI2, "ahb1-ohci2", "ahb1", 0x60, 31)
171 CCU_GATE(CLK_AHB1_VE, "ahb1-ve", "ahb1", 0x64, 0)
172 CCU_GATE(CLK_AHB1_LCD0, "ahb1-lcd0", "ahb1", 0x64, 4)
173 CCU_GATE(CLK_AHB1_LCD1, "ahb1-lcd1", "ahb1", 0x64, 5)
174 CCU_GATE(CLK_AHB1_CSI, "ahb1-csi", "ahb1", 0x64, 8)
175 CCU_GATE(CLK_AHB1_HDMI, "ahb1-hdmi", "ahb1", 0x64, 11)
176 CCU_GATE(CLK_AHB1_BE0, "ahb1-be0", "ahb1", 0x64, 12)
177 CCU_GATE(CLK_AHB1_BE1, "ahb1-be1", "ahb1", 0x64, 13)
178 CCU_GATE(CLK_AHB1_FE0, "ahb1-fe0", "ahb1", 0x64, 14)
179 CCU_GATE(CLK_AHB1_FE1, "ahb1-fe1", "ahb1", 0x64, 15)
180 CCU_GATE(CLK_AHB1_MP, "ahb1-mp", "ahb1", 0x64, 18)
181 CCU_GATE(CLK_AHB1_GPU, "ahb1-gpu", "ahb1", 0x64, 20)
182 CCU_GATE(CLK_AHB1_DEU0, "ahb1-deu0", "ahb1", 0x64, 23)
183 CCU_GATE(CLK_AHB1_DEU1, "ahb1-deu1", "ahb1", 0x64, 24)
184 CCU_GATE(CLK_AHB1_DRC0, "ahb1-drc0", "ahb1", 0x64, 25)
185 CCU_GATE(CLK_AHB1_DRC1, "ahb1-drc1", "ahb1", 0x64, 26)
187 CCU_GATE(CLK_APB1_CODEC, "apb1-codec", "apb1", 0x68, 0)
188 CCU_GATE(CLK_APB1_SPDIF, "apb1-spdif", "apb1", 0x68, 1)
189 CCU_GATE(CLK_APB1_DIGITAL_MIC, "apb1-digital-mic", "apb1", 0x68, 4)
190 CCU_GATE(CLK_APB1_PIO, "apb1-pio", "apb1", 0x68, 5)
191 CCU_GATE(CLK_APB1_DAUDIO0, "apb1-daudio0", "apb1", 0x68, 12)
192 CCU_GATE(CLK_APB1_DAUDIO1, "apb1-daudio1", "apb1", 0x68, 13)
194 CCU_GATE(CLK_APB2_I2C0, "apb2-i2c0", "apb2", 0x6c, 0)
195 CCU_GATE(CLK_APB2_I2C1, "apb2-i2c1", "apb2", 0x6c, 1)
196 CCU_GATE(CLK_APB2_I2C2, "apb2-i2c2", "apb2", 0x6c, 2)
197 CCU_GATE(CLK_APB2_I2C3, "apb2-i2c3", "apb2", 0x6c, 3)
198 CCU_GATE(CLK_APB2_UART0, "apb2-uart0", "apb2", 0x6c, 16)
199 CCU_GATE(CLK_APB2_UART1, "apb2-uart1", "apb2", 0x6c, 17)
200 CCU_GATE(CLK_APB2_UART2, "apb2-uart2", "apb2", 0x6c, 18)
201 CCU_GATE(CLK_APB2_UART3, "apb2-uart3", "apb2", 0x6c, 19)
202 CCU_GATE(CLK_APB2_UART4, "apb2-uart4", "apb2", 0x6c, 20)
203 CCU_GATE(CLK_APB2_UART5, "apb2-uart5", "apb2", 0x6c, 21)
205 CCU_GATE(CLK_DAUDIO0, "daudio0", "daudio0mux", 0xb0, 31)
206 CCU_GATE(CLK_DAUDIO1, "daudio1", "daudio1mux", 0xb4, 31)
208 CCU_GATE(CLK_USB_PHY0, "usb-phy0", "osc24M", 0xcc, 8)
209 CCU_GATE(CLK_USB_PHY1, "usb-phy1", "osc24M", 0xcc, 9)
210 CCU_GATE(CLK_USB_PHY2, "usb-phy2", "osc24M", 0xcc, 10)
211 CCU_GATE(CLK_USB_OHCI0, "usb-ohci0", "osc24M", 0xcc, 16)
212 CCU_GATE(CLK_USB_OHCI1, "usb-ohci1", "osc24M", 0xcc, 17)
213 CCU_GATE(CLK_USB_OHCI2, "usb-ohci2", "osc24M", 0xcc, 18)
215 CCU_GATE(CLK_DRAM_VE, "dram-ve", "mdfs", 0x100, 0)
216 CCU_GATE(CLK_DRAM_CSI_ISP, "dram-csi_isp", "mdfs", 0x100, 1)
217 CCU_GATE(CLK_DRAM_TS, "dram-ts", "mdfs", 0x100, 3)
218 CCU_GATE(CLK_DRAM_DRC0, "dram-drc0", "mdfs", 0x100, 16)
219 CCU_GATE(CLK_DRAM_DRC1, "dram-drc1", "mdfs", 0x100, 17)
220 CCU_GATE(CLK_DRAM_DEU0, "dram-deu0", "mdfs", 0x100, 18)
221 CCU_GATE(CLK_DRAM_DEU1, "dram-deu1", "mdfs", 0x100, 19)
222 CCU_GATE(CLK_DRAM_FE0, "dram-fe0", "mdfs", 0x100, 24)
223 CCU_GATE(CLK_DRAM_FE1, "dram-fe1", "mdfs", 0x100, 25)
224 CCU_GATE(CLK_DRAM_BE0, "dram-be0", "mdfs", 0x100, 26)
225 CCU_GATE(CLK_DRAM_BE1, "dram-be1", "mdfs", 0x100, 27)
226 CCU_GATE(CLK_DRAM_MP, "dram-mp", "mdfs", 0x100, 28)
228 CCU_GATE(CLK_CODEC, "codec", "pll_audio", 0x140, 31)
230 CCU_GATE(CLK_AVS, "avs", "pll_audio", 0x144, 31)
232 CCU_GATE(CLK_DIGITAL_MIC, "digital-mic", "pll_audio", 0x148, 31)
234 CCU_GATE(CLK_HDMI_DDC, "hdmi-ddc", "osc24M", 0x150, 30)
236 CCU_GATE(CLK_PS, "ps", "lcd1_ch1", 0x154, 31)
244 0x00, /* offset */
245 8, 5, 0, 0, /* n factor */
246 4, 2, 0, 0, /* k factor */
247 0, 2, 0, 0, /* m factor */
248 0, 0, 1, AW_CLK_FACTOR_FIXED, /* p factor (fake) */
256 0x08, /* offset */
257 8, 7, 0, 0, /* n factor */
258 0, 0, 1, AW_CLK_FACTOR_FIXED, /* k factor (fake) */
259 0, 4, 1, 0, /* m factor */
260 16, 3, 1, 0, /* p factor */
270 0, /* freq */
273 0); /* flags */
278 0, /* freq */
281 0); /* flags */
286 0, /* freq */
289 0); /* flags */
294 0x10, /* offset */
295 8, 7, 0, 0, /* n factor */
296 0, 4, 0, 0, /* m factor */
307 0, /* freq */
310 0); /* flags */
315 0x18, /* offset */
316 8, 7, 0, 0, /* n factor */
317 0, 4, 0, 0, /* m factor */
327 0x20, /* offset */
328 8, 5, 0, 0, /* n factor */
329 4, 2, 0, 0, /* k factor */
330 0, 2, 0, 0, /* m factor */
331 0, 0, 1, AW_CLK_FACTOR_FIXED, /* p factor (fake) */
340 0x28, /* offset */
341 8, 4, 0, 0, /* n factor */
342 5, 2, 1, 0, /* k factor */
343 0, 0, 1, AW_CLK_FACTOR_FIXED, /* m factor (fake) */
344 0, 0, 1, AW_CLK_FACTOR_FIXED, /* p factor (fake) */
354 0, /* freq */
357 0); /* flags */
362 0x30, /* offset */
363 8, 7, 0, 0, /* n factor */
364 0, 4, 0, 0, /* m factor */
376 0, /* freq */
379 0); /* flags */
384 0x38, /* offset */
385 8, 7, 0, 0, /* n factor */
386 0, 4, 0, 0, /* m factor */
397 0x40, /* offset */
398 8, 4, 0, 0, /* n factor */
399 4, 2, 1, 0, /* k factor */
400 0, 2, 0, 0, /* m factor (fake) */
401 0, 0, 1, AW_CLK_FACTOR_FIXED, /* p factor (fake) */
409 0x44, /* offset */
410 8, 7, 0, 0, /* n factor */
411 0, 4, 0, 0, /* m factor */
421 0x48, /* offset */
422 8, 7, 0, 0, /* n factor */
423 0, 4, 0, 0, /* m factor */
431 { .value = 0, .divider = 1, },
445 0x50, /* offset */
446 0, 2, /* shift, mask */
447 0, axi_div_table); /* flags, div table */
453 0x50, 16, 2); /* offset, shift, width */
459 0x54, /* offset */
461 4, 2, 0, AW_CLK_FACTOR_POWER_OF_TWO, /* div */
462 6, 2, 0, AW_CLK_FACTOR_HAS_COND, /* prediv */
467 { .value = 0, .divider = 2, },
476 0x54, /* offset */
485 0x58, /* offset */
486 16, 2, 0, AW_CLK_FACTOR_POWER_OF_TWO, /* n factor */
487 0, 5, 0, 0, /* m factor */
489 0, /* gate */
495 0x80, /* offset */
496 16, 3, 0, AW_CLK_FACTOR_POWER_OF_TWO, /* n factor */
497 0, 4, 0, 0, /* m factor */
504 0x80, /* offset */
505 16, 3, 0, AW_CLK_FACTOR_POWER_OF_TWO, /* n factor */
506 0, 4, 0, 0, /* m factor */
513 0x88, /* offset */
514 16, 2, 0, AW_CLK_FACTOR_POWER_OF_TWO, /* n factor */
515 0, 4, 0, 0, /* m factor */
523 0x8c, /* offset */
524 16, 2, 0, AW_CLK_FACTOR_POWER_OF_TWO, /* n factor */
525 0, 4, 0, 0, /* m factor */
533 0x90, /* offset */
534 16, 2, 0, AW_CLK_FACTOR_POWER_OF_TWO, /* n factor */
535 0, 4, 0, 0, /* m factor */
543 0x94, /* offset */
544 16, 2, 0, AW_CLK_FACTOR_POWER_OF_TWO, /* n factor */
545 0, 4, 0, 0, /* m factor */
554 0x98, /* offset */
555 16, 2, 0, AW_CLK_FACTOR_POWER_OF_TWO, /* n factor */
556 0, 4, 0, 0, /* m factor */
563 0x9C, /* offset */
564 16, 2, 0, AW_CLK_FACTOR_POWER_OF_TWO, /* n factor */
565 0, 4, 0, 0, /* m factor */
572 0xA0, /* offset */
573 16, 2, 0, AW_CLK_FACTOR_POWER_OF_TWO, /* n factor */
574 0, 4, 0, 0, /* m factor */
581 0xA4, /* offset */
582 16, 2, 0, AW_CLK_FACTOR_POWER_OF_TWO, /* n factor */
583 0, 4, 0, 0, /* m factor */
590 0xA8, /* offset */
591 16, 2, 0, AW_CLK_FACTOR_POWER_OF_TWO, /* n factor */
592 0, 4, 0, 0, /* m factor */
599 0xAC, /* offset */
600 16, 2, 0, AW_CLK_FACTOR_POWER_OF_TWO, /* n factor */
601 0, 4, 0, 0, /* m factor */
608 0,
610 0xb0, 16, 2);
612 0,
614 0xb4, 16, 2);
619 0xF0, /* offset */
620 16, 2, 0, AW_CLK_FACTOR_POWER_OF_TWO, /* n factor */
621 0, 4, 0, 0, /* m factor */
629 0xF4, /* offset */
630 0, 0, 1, AW_CLK_FACTOR_FIXED, /* n factor (fake) */
631 0, 4, 0, 0, /* m factor */
633 0, /* gate */
637 0xF4, /* offset */
638 0, 0, 1, AW_CLK_FACTOR_FIXED, /* n factor (fake) */
639 8, 4, 0, 0, /* m factor */
641 0, /* gate */
647 0x104, /* offset */
648 0, 0, 1, AW_CLK_FACTOR_FIXED, /* n factor (fake) */
649 0, 4, 0, 0, /* m factor */
656 0x108, /* offset */
657 0, 0, 1, AW_CLK_FACTOR_FIXED, /* n factor (fake) */
658 0, 4, 0, 0, /* m factor */
665 0x104, /* offset */
666 0, 0, 1, AW_CLK_FACTOR_FIXED, /* n factor (fake) */
667 0, 4, 0, 0, /* m factor */
673 0x108, /* offset */
674 0, 0, 1, AW_CLK_FACTOR_FIXED, /* n factor (fake) */
675 0, 4, 0, 0, /* m factor */
683 0x108, /* offset */
684 0, 0, 1, AW_CLK_FACTOR_FIXED, /* n factor (fake) */
685 0, 4, 0, 0, /* m factor */
693 0x118, /* offset */
694 0, 0, 1, AW_CLK_FACTOR_FIXED, /* n factor (fake) */
695 0, 0, 1, AW_CLK_FACTOR_FIXED, /* m factor (fake )*/
702 0x11C, /* offset */
703 0, 0, 1, AW_CLK_FACTOR_FIXED, /* n factor (fake) */
704 0, 0, 1, AW_CLK_FACTOR_FIXED, /* m factor (fake )*/
712 0x12C, /* offset */
713 0, 0, 1, AW_CLK_FACTOR_FIXED, /* n factor (fake) */
714 0, 4, 0, 0, /* m factor */
721 0x130, /* offset */
722 0, 0, 1, AW_CLK_FACTOR_FIXED, /* n factor (fake) */
723 0, 4, 0, 0, /* m factor */
728 /* CSI0 0x134 Need Mux table */
729 /* CSI1 0x138 Need Mux table */
734 0x13C, /* offset */
735 16, 3, 0, 0, /* n factor */
736 0, 0, 1, AW_CLK_FACTOR_FIXED, /* m factor (fake) */
737 0, 0, /* mux */
743 0x150, /* offset */
744 0, 0, 1, AW_CLK_FACTOR_FIXED, /* n factor (fake) */
745 0, 4, 0, 0, /* m factor */
746 0, 0, /* mux */
753 0x15C, /* offset */
754 16, 2, 0, 0, /* n factor */
755 0, 4, 0, 0, /* m factor */
762 0x160, /* offset */
763 16, 2, 0, 0, /* n factor */
764 0, 4, 0, 0, /* m factor */
772 0x168, /* offset */
773 0, 0, 1, AW_CLK_FACTOR_FIXED, /* n factor (fake) */
774 16, 4, 0, 0, /* m factor */
781 0x168, /* offset */
782 0, 0, 1, AW_CLK_FACTOR_FIXED, /* n factor (fake) */
783 0, 4, 0, 0, /* m factor */
790 0x16C, /* offset */
791 0, 0, 1, AW_CLK_FACTOR_FIXED, /* n factor (fake) */
792 0, 4, 0, 0, /* m factor */
801 0x180, /* offset */
802 0, 0, 1, AW_CLK_FACTOR_FIXED, /* n factor (fake) */
803 0, 4, 0, 0, /* m factor */
810 0x184, /* offset */
811 0, 0, 1, AW_CLK_FACTOR_FIXED, /* n factor (fake) */
812 0, 4, 0, 0, /* m factor */
819 0x188, /* offset */
820 0, 0, 1, AW_CLK_FACTOR_FIXED, /* n factor (fake) */
821 0, 4, 0, 0, /* m factor */
828 0x18C, /* offset */
829 0, 0, 1, AW_CLK_FACTOR_FIXED, /* n factor (fake) */
830 0, 4, 0, 0, /* m factor */
839 0x1A0, /* offset */
841 0, 3, 0, 0, /* div */
842 0, 0, 3, AW_CLK_FACTOR_HAS_COND | AW_CLK_FACTOR_FIXED, /* prediv */
848 0x1A4, /* offset */
850 0, 3, 0, 0, /* div */
851 0, 0, 3, AW_CLK_FACTOR_HAS_COND | AW_CLK_FACTOR_FIXED, /* prediv */
857 0x1A8, /* offset */
859 0, 3, 0, 0, /* div */
860 0, 0, 3, AW_CLK_FACTOR_HAS_COND | AW_CLK_FACTOR_FIXED, /* prediv */
863 /* ATS 0x1B0 */
864 /* Trace 0x1B4 */
972 EARLY_DRIVER_MODULE(ccu_a31ng, simplebus, ccu_a31ng_driver, 0, 0,