Lines Matching +full:sun4i +full:- +full:a10 +full:- +full:ts
1 /*-
2 * SPDX-License-Identifier: BSD-2-Clause
47 #include <dt-bindings/clock/sun4i-a10-ccu.h>
48 #include <dt-bindings/clock/sun7i-a20-ccu.h>
49 #include <dt-bindings/reset/sun4i-a10-ccu.h>
51 /* Non-exported resets */
52 /* Non-exported clocks */
66 /* Non-exported fixed clocks */
106 CCU_GATE(CLK_AHB_OTG, "ahb-otg", "ahb", 0x60, 0)
107 CCU_GATE(CLK_AHB_EHCI0, "ahb-ehci0", "ahb", 0x60, 1)
108 CCU_GATE(CLK_AHB_OHCI0, "ahb-ohci0", "ahb", 0x60, 2)
109 CCU_GATE(CLK_AHB_EHCI1, "ahb-ehci1", "ahb", 0x60, 3)
110 CCU_GATE(CLK_AHB_OHCI1, "ahb-ohci1", "ahb", 0x60, 4)
111 CCU_GATE(CLK_AHB_SS, "ahb-ss", "ahb", 0x60, 5)
112 CCU_GATE(CLK_AHB_DMA, "ahb-dma", "ahb", 0x60, 6)
113 CCU_GATE(CLK_AHB_BIST, "ahb-bist", "ahb", 0x60, 7)
114 CCU_GATE(CLK_AHB_MMC0, "ahb-mmc0", "ahb", 0x60, 8)
115 CCU_GATE(CLK_AHB_MMC1, "ahb-mmc1", "ahb", 0x60, 9)
116 CCU_GATE(CLK_AHB_MMC2, "ahb-mmc2", "ahb", 0x60, 10)
117 CCU_GATE(CLK_AHB_MMC3, "ahb-mmc3", "ahb", 0x60, 11)
118 CCU_GATE(CLK_AHB_MS, "ahb-ms", "ahb", 0x60, 12)
119 CCU_GATE(CLK_AHB_NAND, "ahb-nand", "ahb", 0x60, 13)
120 CCU_GATE(CLK_AHB_SDRAM, "ahb-sdram", "ahb", 0x60, 14)
121 CCU_GATE(CLK_AHB_ACE, "ahb-ace", "ahb", 0x60, 16)
122 CCU_GATE(CLK_AHB_EMAC, "ahb-emac", "ahb", 0x60, 17)
123 CCU_GATE(CLK_AHB_TS, "ahb-ts", "ahb", 0x60, 18)
124 CCU_GATE(CLK_AHB_SPI0, "ahb-spi0", "ahb", 0x60, 20)
125 CCU_GATE(CLK_AHB_SPI1, "ahb-spi1", "ahb", 0x60, 21)
126 CCU_GATE(CLK_AHB_SPI2, "ahb-spi2", "ahb", 0x60, 22)
127 CCU_GATE(CLK_AHB_SPI3, "ahb-spi3", "ahb", 0x60, 23)
128 CCU_GATE(CLK_AHB_SATA, "ahb-sata", "ahb", 0x60, 25)
130 CCU_GATE(CLK_AHB_VE, "ahb-ve", "ahb", 0x64, 0)
131 CCU_GATE(CLK_AHB_TVD, "ahb-tvd", "ahb", 0x64, 1)
132 CCU_GATE(CLK_AHB_TVE0, "ahb-tve0", "ahb", 0x64, 2)
133 CCU_GATE(CLK_AHB_TVE1, "ahb-tve1", "ahb", 0x64, 3)
134 CCU_GATE(CLK_AHB_LCD0, "ahb-lcd0", "ahb", 0x64, 4)
135 CCU_GATE(CLK_AHB_LCD1, "ahb-lcd1", "ahb", 0x64, 5)
136 CCU_GATE(CLK_AHB_CSI0, "ahb-csi0", "ahb", 0x64, 8)
137 CCU_GATE(CLK_AHB_CSI1, "ahb-csi1", "ahb", 0x64, 9)
138 CCU_GATE(CLK_AHB_HDMI1, "ahb-hdmi1", "ahb", 0x64, 10)
139 CCU_GATE(CLK_AHB_HDMI0, "ahb-hdmi0", "ahb", 0x64, 11)
140 CCU_GATE(CLK_AHB_DE_BE0, "ahb-de_be0", "ahb", 0x64, 12)
141 CCU_GATE(CLK_AHB_DE_BE1, "ahb-de_be1", "ahb", 0x64, 13)
142 CCU_GATE(CLK_AHB_DE_FE0, "ahb-de_fe0", "ahb", 0x64, 14)
143 CCU_GATE(CLK_AHB_DE_FE1, "ahb-de_fe1", "ahb", 0x64, 15)
144 CCU_GATE(CLK_AHB_GMAC, "ahb-gmac", "ahb", 0x64, 17)
145 CCU_GATE(CLK_AHB_MP, "ahb-mp", "ahb", 0x64, 18)
146 CCU_GATE(CLK_AHB_GPU, "ahb-gpu", "ahb", 0x64, 20)
148 CCU_GATE(CLK_APB0_CODEC, "apb0-codec", "apb0", 0x68, 0)
149 CCU_GATE(CLK_APB0_SPDIF, "apb0-spdif", "apb0", 0x68, 1)
150 CCU_GATE(CLK_APB0_AC97, "apb0-ac97", "apb0", 0x68, 2)
151 CCU_GATE(CLK_APB0_I2S0, "apb0-i2s0", "apb0", 0x68, 3)
152 CCU_GATE(CLK_APB0_I2S1, "apb0-i2s1", "apb0", 0x68, 4)
153 CCU_GATE(CLK_APB0_PIO, "apb0-pi0", "apb0", 0x68, 5)
154 CCU_GATE(CLK_APB0_IR0, "apb0-ir0", "apb0", 0x68, 6)
155 CCU_GATE(CLK_APB0_IR1, "apb0-ir1", "apb0", 0x68, 7)
156 CCU_GATE(CLK_APB0_I2S2, "apb0-i2s2", "apb0",0x68, 8)
157 CCU_GATE(CLK_APB0_KEYPAD, "apb0-keypad", "apb0", 0x68, 10)
159 CCU_GATE(CLK_APB1_I2C0, "apb1-i2c0", "apb1", 0x6c, 0)
160 CCU_GATE(CLK_APB1_I2C1, "apb1-i2c1", "apb1",0x6c, 1)
161 CCU_GATE(CLK_APB1_I2C2, "apb1-i2c2", "apb1",0x6c, 2)
162 CCU_GATE(CLK_APB1_I2C3, "apb1-i2c3", "apb1",0x6c, 3)
163 CCU_GATE(CLK_APB1_CAN, "apb1-can", "apb1",0x6c, 4)
164 CCU_GATE(CLK_APB1_SCR, "apb1-scr", "apb1",0x6c, 5)
165 CCU_GATE(CLK_APB1_PS20, "apb1-ps20", "apb1",0x6c, 6)
166 CCU_GATE(CLK_APB1_PS21, "apb1-ps21", "apb1",0x6c, 7)
167 CCU_GATE(CLK_APB1_I2C4, "apb1-i2c4", "apb1", 0x6c, 15)
168 CCU_GATE(CLK_APB1_UART0, "apb1-uart0", "apb1",0x6c, 16)
169 CCU_GATE(CLK_APB1_UART1, "apb1-uart1", "apb1",0x6c, 17)
170 CCU_GATE(CLK_APB1_UART2, "apb1-uart2", "apb1",0x6c, 18)
171 CCU_GATE(CLK_APB1_UART3, "apb1-uart3", "apb1",0x6c, 19)
172 CCU_GATE(CLK_APB1_UART4, "apb1-uart4", "apb1",0x6c, 20)
173 CCU_GATE(CLK_APB1_UART5, "apb1-uart5", "apb1",0x6c, 21)
174 CCU_GATE(CLK_APB1_UART6, "apb1-uart6", "apb1",0x6c, 22)
175 CCU_GATE(CLK_APB1_UART7, "apb1-uart7", "apb1",0x6c, 23)
177 CCU_GATE(CLK_USB_OHCI0, "usb-ohci0", "ahb", 0xcc, 6)
178 CCU_GATE(CLK_USB_OHCI1, "usb-ohci1", "ahb", 0xcc, 7)
179 CCU_GATE(CLK_USB_PHY, "usb-phy", "ahb", 0xcc, 8)
181 CCU_GATE(CLK_DRAM_VE, "dram-ve", "pll_ddr", 0x100, 0)
182 CCU_GATE(CLK_DRAM_CSI0, "dram-csi0", "pll_ddr", 0x100, 1)
183 CCU_GATE(CLK_DRAM_CSI1, "dram-csi1", "pll_ddr", 0x100, 2)
184 CCU_GATE(CLK_DRAM_TS, "dram-ts", "pll_ddr", 0x100, 3)
185 CCU_GATE(CLK_DRAM_TVD, "dram-tvd", "pll_ddr", 0x100, 4)
186 CCU_GATE(CLK_DRAM_TVE0, "dram-tve0", "pll_ddr", 0x100, 5)
187 CCU_GATE(CLK_DRAM_TVE1, "dram-tve1", "pll_ddr", 0x100, 6)
188 CCU_GATE(CLK_DRAM_OUT, "dram-out", "pll_ddr", 0x100, 15)
189 CCU_GATE(CLK_DRAM_DE_FE1, "dram-de_fe1", "pll_ddr", 0x100, 24)
190 CCU_GATE(CLK_DRAM_DE_FE0, "dram-de_fe0", "pll_ddr", 0x100, 25)
191 CCU_GATE(CLK_DRAM_DE_BE0, "dram-de_be0", "pll_ddr", 0x100, 26)
192 CCU_GATE(CLK_DRAM_DE_BE1, "dram-de_be1", "pll_ddr", 0x100, 27)
193 CCU_GATE(CLK_DRAM_MP, "dram-de_mp", "pll_ddr", 0x100, 28)
194 CCU_GATE(CLK_DRAM_ACE, "dram-ace", "pll_ddr", 0x100, 29)
224 "pll_video0-2x", pll_video0_2x_parents, /* name, parents */
244 "pll_video1-2x", pll_video1_2x_parents, /* name, parents */
420 "ts", mod_parents, /* name, parents */
565 { "allwinner,sun4i-a10-ccu", 1 },
568 { "allwinner,sun7i-a20-ccu", 1 },
580 if (ofw_bus_search_compatible(dev, compat_data)->ocd_data == 0) in ccu_a10_probe()
583 device_set_desc(dev, "Allwinner A10/A20 Clock Control Unit NG"); in ccu_a10_probe()
594 sc->resets = a10_ccu_resets; in ccu_a10_attach()
595 sc->nresets = nitems(a10_ccu_resets); in ccu_a10_attach()
596 sc->gates = a10_ccu_gates; in ccu_a10_attach()
597 sc->ngates = nitems(a10_ccu_gates); in ccu_a10_attach()
598 sc->clks = a10_ccu_clks; in ccu_a10_attach()
599 sc->nclks = nitems(a10_ccu_clks); in ccu_a10_attach()
600 sc->clk_init = a10_init_clks; in ccu_a10_attach()
601 sc->n_clk_init = nitems(a10_init_clks); in ccu_a10_attach()