Lines Matching +full:led +full:- +full:order
1 /*-
2 * SPDX-License-Identifier: BSD-2-Clause
4 * Copyright (c) 2007-2017 QLogic Corporation. All rights reserved.
48 /* wb_write - pointer to 2 32 bits vars to be passed to the DMAE*/
54 /* mode - 0( LOW ) /1(HIGH)*/
195 #define ELINK_SINGLE_MEDIA_DIRECT(params) (params->num_phys == 1)
197 #define ELINK_SINGLE_MEDIA(params) (params->num_phys == 2)
199 #define ELINK_DUAL_MEDIA(params) (params->num_phys == 3)
231 #define ELINK_LINK_CONFIG_SIZE (ELINK_MAX_PHYS - 1)
233 0 : (_phy_idx - 1))
269 /* No Over-Current detection */
356 /* Set link led mode (on/off/oper)*/
432 * operation, according to bits 29:28 -
441 * Bits 31:30 should be 2'b11 in order for EEE to be enabled.
527 In order to use it to read/write internal phy registers, use
544 /* Set/Unset the led
545 Basically, the CLC takes care of the led for the link, but in case one needs
546 to set/unset the led unnaturally, set the "mode" to ELINK_LED_MODE_OPER to
547 blink the led, and ELINK_LED_MODE_OFF to set the led off.*/
565 /* One-time initialization for external phy after power up */
582 /* Check swap bit and adjust PHY order */
630 * valid values are 0 - 5. 0 is highest strict priority.