2089 	uint32_t xmac_base;  in elink_update_pfc_xmac()  local
2093 	xmac_base = (params->port) ? GRCBASE_XMAC1 : GRCBASE_XMAC0;  in elink_update_pfc_xmac()
2119 		REG_WR(sc, xmac_base + XMAC_REG_PAUSE_CTRL, pause_val);  in elink_update_pfc_xmac()
2120 		REG_WR(sc, xmac_base + XMAC_REG_PFC_CTRL, pfc0_val);  in elink_update_pfc_xmac()
2121 		REG_WR(sc, xmac_base + XMAC_REG_PFC_CTRL_HI, pfc1_val);  in elink_update_pfc_xmac()
2127 	REG_WR(sc, xmac_base + XMAC_REG_PAUSE_CTRL, pause_val);  in elink_update_pfc_xmac()
2128 	REG_WR(sc, xmac_base + XMAC_REG_PFC_CTRL, pfc0_val);  in elink_update_pfc_xmac()
2129 	REG_WR(sc, xmac_base + XMAC_REG_PFC_CTRL_HI, pfc1_val);  in elink_update_pfc_xmac()
2133 	REG_WR(sc, xmac_base + XMAC_REG_CTRL_SA_LO,  in elink_update_pfc_xmac()
2138 	REG_WR(sc, xmac_base + XMAC_REG_CTRL_SA_HI,  in elink_update_pfc_xmac()
2496 	uint32_t pfc_ctrl, xmac_base = (port) ? GRCBASE_XMAC1 : GRCBASE_XMAC0;  in elink_set_xmac_rxtx()  local
2505 		pfc_ctrl = REG_RD(sc, xmac_base + XMAC_REG_PFC_CTRL_HI);  in elink_set_xmac_rxtx()
2506 		REG_WR(sc, xmac_base + XMAC_REG_PFC_CTRL_HI,  in elink_set_xmac_rxtx()
2508 		REG_WR(sc, xmac_base + XMAC_REG_PFC_CTRL_HI,  in elink_set_xmac_rxtx()
2511 		val = REG_RD(sc, xmac_base + XMAC_REG_CTRL);  in elink_set_xmac_rxtx()
2516 		REG_WR(sc, xmac_base + XMAC_REG_CTRL, val);  in elink_set_xmac_rxtx()
2523 	uint32_t val, xmac_base;  in elink_xmac_enable()  local
2527 	xmac_base = (params->port) ? GRCBASE_XMAC1 : GRCBASE_XMAC0;  in elink_xmac_enable()
2544 		REG_WR(sc, xmac_base + XMAC_REG_RX_LSS_CTRL,  in elink_xmac_enable()
2547 		REG_WR(sc, xmac_base + XMAC_REG_CLEAR_RX_LSS_STATUS, 0);  in elink_xmac_enable()
2548 		REG_WR(sc, xmac_base + XMAC_REG_CLEAR_RX_LSS_STATUS,  in elink_xmac_enable()
2553 	REG_WR(sc, xmac_base + XMAC_REG_RX_MAX_SIZE, 0x2710);  in elink_xmac_enable()
2556 	REG_WR(sc, xmac_base + XMAC_REG_TX_CTRL, 0xC800);  in elink_xmac_enable()
2563 		REG_WR(sc, xmac_base + XMAC_REG_EEE_TIMERS_HI, 0x1380008);  in elink_xmac_enable()
2564 		REG_WR(sc, xmac_base + XMAC_REG_EEE_CTRL, 0x1);  in elink_xmac_enable()
2566 		REG_WR(sc, xmac_base + XMAC_REG_EEE_CTRL, 0x0);  in elink_xmac_enable()
2581 	REG_WR(sc, xmac_base + XMAC_REG_CTRL, val);  in elink_xmac_enable()
14164 		uint32_t xmac_base = (params->port) ? GRCBASE_XMAC1 : GRCBASE_XMAC0;  in elink_link_reset()  local
14168 			REG_WR(sc, xmac_base + XMAC_REG_CTRL,  in elink_link_reset()