5167 	uint32_t cfg_pin;  in elink_get_mod_abs_int_cfg()  local
5171 		cfg_pin = (REG_RD(sc, shmem_base +  in elink_get_mod_abs_int_cfg()
5183 		if ((cfg_pin < PIN_CFG_GPIO0_P0) ||  in elink_get_mod_abs_int_cfg()
5184 		    (cfg_pin > PIN_CFG_GPIO3_P1)) {  in elink_get_mod_abs_int_cfg()
5187 			   cfg_pin);  in elink_get_mod_abs_int_cfg()
5191 		*gpio_num = (cfg_pin - PIN_CFG_GPIO0_P0) & 0x3;  in elink_get_mod_abs_int_cfg()
5192 		*gpio_port = (cfg_pin - PIN_CFG_GPIO0_P0) >> 2;  in elink_get_mod_abs_int_cfg()
5308 	uint32_t cfg_pin;  in elink_sfp_e3_set_transmitter()  local
5311 	cfg_pin = REG_RD(sc, params->shmem_base +  in elink_sfp_e3_set_transmitter()
5319 	elink_set_cfg_pin(sc, cfg_pin, tx_en ^ 1);  in elink_sfp_e3_set_transmitter()
5321 		elink_set_cfg_pin(sc, cfg_pin + 3, tx_en ^ 1);  in elink_sfp_e3_set_transmitter()
11848 	uint32_t cfg_pin;  in elink_54618se_config_init()  local
11858 	cfg_pin = (REG_RD(sc, params->shmem_base +  in elink_54618se_config_init()
11865 	elink_set_cfg_pin(sc, cfg_pin, 1);  in elink_54618se_config_init()
12088 	uint32_t cfg_pin;  in elink_54618se_link_reset()  local
12099 	cfg_pin = (REG_RD(sc, params->shmem_base +  in elink_54618se_link_reset()
12106 	elink_set_cfg_pin(sc, cfg_pin, 0);  in elink_54618se_link_reset()
14670 	uint32_t cfg_pin;  in elink_check_over_curr()  local
14674 	cfg_pin = (REG_RD(sc, params->shmem_base +  in elink_check_over_curr()
14681 	if (elink_get_cfg_pin(sc, cfg_pin, &pin_val) != ELINK_STATUS_OK)  in elink_check_over_curr()
14841 	uint32_t cfg_pin, value = 0;  in elink_sfp_tx_fault_detection()  local
14845 	cfg_pin = (REG_RD(sc, params->shmem_base + offsetof(struct shmem_region,  in elink_sfp_tx_fault_detection()
14850 	if (elink_get_cfg_pin(sc, cfg_pin, &value)) {  in elink_sfp_tx_fault_detection()
14851 		ELINK_DEBUG_P1(sc, "Failed to read pin 0x%02x\n", cfg_pin);  in elink_sfp_tx_fault_detection()