Lines Matching refs:MDIO_AN_DEVAD
452 #define MDIO_AN_DEVAD 0x7 macro
3788 elink_cl45_write(sc, phy, MDIO_AN_DEVAD, MDIO_AN_REG_EEE_ADV, 0x0); in elink_eee_disable()
3814 elink_cl45_write(sc, phy, MDIO_AN_DEVAD, MDIO_AN_REG_EEE_ADV, val); in elink_eee_advertise()
3841 elink_cl45_read(sc, phy, MDIO_AN_DEVAD, MDIO_AN_REG_EEE_ADV, &adv); in elink_eee_an_resolve()
3842 elink_cl45_read(sc, phy, MDIO_AN_DEVAD, MDIO_AN_REG_LP_EEE_ADV, &lp); in elink_eee_an_resolve()
4290 elink_cl45_read(sc, phy, MDIO_AN_DEVAD, MDIO_AN_REG_ADV_PAUSE, &val); in elink_ext_phy_set_pause()
4307 elink_cl45_write(sc, phy, MDIO_AN_DEVAD, MDIO_AN_REG_ADV_PAUSE, val); in elink_ext_phy_set_pause()
4373 MDIO_AN_DEVAD, MDIO_WC_REG_GP2_STATUS_GP_2_4, in elink_ext_phy_update_adv_fc()
4379 elink_cl45_read(sc, phy, MDIO_AN_DEVAD, in elink_ext_phy_update_adv_fc()
4381 elink_cl45_read(sc, phy, MDIO_AN_DEVAD, in elink_ext_phy_update_adv_fc()
4384 elink_cl45_read(sc, phy, MDIO_AN_DEVAD, in elink_ext_phy_update_adv_fc()
4386 elink_cl45_read(sc, phy, MDIO_AN_DEVAD, in elink_ext_phy_update_adv_fc()
4397 MDIO_AN_DEVAD, in elink_ext_phy_update_adv_fc()
4400 MDIO_AN_DEVAD, in elink_ext_phy_update_adv_fc()
4555 elink_cl45_write(sc, phy, MDIO_AN_DEVAD, in elink_warpcore_restart_AN_KR()
4574 {MDIO_AN_DEVAD, MDIO_WC_REG_IEEE0BLK_MIICNTL, 0}, in elink_warpcore_enable_AN_KR()
4611 elink_cl45_write(sc, phy, MDIO_AN_DEVAD, in elink_warpcore_enable_AN_KR()
4635 elink_cl45_write(sc, phy, MDIO_AN_DEVAD, in elink_warpcore_enable_AN_KR()
4639 elink_cl45_write(sc, phy, MDIO_AN_DEVAD, in elink_warpcore_enable_AN_KR()
4725 {MDIO_AN_DEVAD, MDIO_WC_REG_AN_IEEE1BLK_AN_ADVERTISEMENT1, 0}, in elink_warpcore_set_10G_KR()
4726 {MDIO_AN_DEVAD, MDIO_WC_REG_IEEE0BLK_MIICNTL, 0x0}, in elink_warpcore_set_10G_KR()
4799 elink_cl45_write(sc, phy, MDIO_AN_DEVAD, MDIO_AN_REG_CTRL, 0); in elink_warpcore_set_10G_XFI()
4934 elink_cl45_write(sc, phy, MDIO_AN_DEVAD, in elink_warpcore_set_20G_force_KR2()
5133 {MDIO_AN_DEVAD, MDIO_AN_REG_CTRL, 0}, in elink_warpcore_clear_regs()
5270 elink_cl45_write(sc, phy, MDIO_AN_DEVAD, in elink_warpcore_config_runtime()
6580 elink_cl45_read(sc, phy, MDIO_AN_DEVAD, in elink_warpcore_read_status()
6582 elink_cl45_read(sc, phy, MDIO_AN_DEVAD, in elink_warpcore_read_status()
6621 elink_cl45_read(sc, phy, MDIO_AN_DEVAD, in elink_warpcore_read_status()
7993 MDIO_AN_DEVAD, in elink_ext_phy_10G_an_resolve()
7996 MDIO_AN_DEVAD, in elink_ext_phy_10G_an_resolve()
8024 MDIO_AN_DEVAD, in elink_8073_resolve_fc()
8028 MDIO_AN_DEVAD, in elink_8073_resolve_fc()
8213 MDIO_AN_DEVAD, MDIO_AN_REG_CTRL, 0x0000); in elink_807x_force_10G()
8223 MDIO_AN_DEVAD, MDIO_AN_REG_CL37_FC_LD, &cl37_val); in elink_8073_set_pause_cl37()
8247 MDIO_AN_DEVAD, MDIO_AN_REG_CL37_FC_LD, cl37_val); in elink_8073_set_pause_cl37()
8320 MDIO_AN_DEVAD, in elink_8073_config_init()
8323 MDIO_AN_DEVAD, in elink_8073_config_init()
8359 elink_cl45_write(sc, phy, MDIO_AN_DEVAD, MDIO_AN_REG_ADV, val); in elink_8073_config_init()
8360 elink_cl45_read(sc, phy, MDIO_AN_DEVAD, MDIO_AN_REG_8073_2_5G, &tmp1); in elink_8073_config_init()
8380 elink_cl45_write(sc, phy, MDIO_AN_DEVAD, MDIO_AN_REG_8073_2_5G, tmp1); in elink_8073_config_init()
8383 elink_cl45_read(sc, phy, MDIO_AN_DEVAD, MDIO_AN_REG_CL37_FC_LD, &tmp1); in elink_8073_config_init()
8384 elink_cl45_write(sc, phy, MDIO_AN_DEVAD, MDIO_AN_REG_CL37_FC_LD, in elink_8073_config_init()
8389 elink_cl45_write(sc, phy, MDIO_AN_DEVAD, MDIO_AN_REG_CL37_AN, 0x1000); in elink_8073_config_init()
8401 elink_cl45_read(sc, phy, MDIO_AN_DEVAD, MDIO_AN_REG_ADV2, &tmp1); in elink_8073_config_init()
8403 elink_cl45_write(sc, phy, MDIO_AN_DEVAD, MDIO_AN_REG_ADV2, tmp1); in elink_8073_config_init()
8409 elink_cl45_write(sc, phy, MDIO_AN_DEVAD, MDIO_AN_REG_CTRL, 0x1200); in elink_8073_config_init()
8464 MDIO_AN_DEVAD, MDIO_AN_REG_LINK_STATUS, &an1000_status); in elink_8073_read_status()
8466 MDIO_AN_DEVAD, MDIO_AN_REG_LINK_STATUS, &an1000_status); in elink_8073_read_status()
8546 elink_cl45_read(sc, phy, MDIO_AN_DEVAD, in elink_8073_read_status()
9763 MDIO_AN_DEVAD, MDIO_AN_REG_LINK_STATUS, &val2); in elink_8706_8726_read_status()
9765 MDIO_AN_DEVAD, MDIO_AN_REG_LINK_STATUS, &val2); in elink_8706_8726_read_status()
9859 MDIO_AN_DEVAD, MDIO_AN_REG_CL37_CL73, 0x040c); in elink_8706_config_init()
9863 MDIO_AN_DEVAD, MDIO_AN_REG_CL37_FC_LP, 0x0020); in elink_8706_config_init()
9866 MDIO_AN_DEVAD, MDIO_AN_REG_CL37_AN, 0x1000); in elink_8706_config_init()
9869 MDIO_AN_DEVAD, MDIO_AN_REG_ADV, (1<<5)); in elink_8706_config_init()
9873 MDIO_AN_DEVAD, MDIO_AN_REG_CTRL, 0x1200); in elink_8706_config_init()
10021 MDIO_AN_DEVAD, MDIO_AN_REG_ADV, 0x20); in elink_8726_config_init()
10023 MDIO_AN_DEVAD, MDIO_AN_REG_CL37_CL73, 0x040c); in elink_8726_config_init()
10025 MDIO_AN_DEVAD, MDIO_AN_REG_CL37_FC_LD, 0x0020); in elink_8726_config_init()
10027 MDIO_AN_DEVAD, MDIO_AN_REG_CL37_AN, 0x1000); in elink_8726_config_init()
10029 MDIO_AN_DEVAD, MDIO_AN_REG_CTRL, 0x1200); in elink_8726_config_init()
10179 MDIO_AN_DEVAD, MDIO_AN_REG_8727_MISC_CTRL, 0); in elink_8727_config_speed()
10181 MDIO_AN_DEVAD, MDIO_AN_REG_CL37_AN, 0x1300); in elink_8727_config_speed()
10187 MDIO_AN_DEVAD, MDIO_AN_REG_8727_MISC_CTRL, in elink_8727_config_speed()
10190 MDIO_AN_DEVAD, MDIO_AN_REG_CL37_AN, 0x0100); in elink_8727_config_speed()
10633 {MDIO_AN_DEVAD, 0xFFFB, 0xFFFD} in elink_848xx_set_led()
10697 MDIO_AN_DEVAD, MDIO_AN_REG_8481_1000T_CTRL, in elink_848xx_cmn_config_init()
10702 MDIO_AN_DEVAD, in elink_848xx_cmn_config_init()
10706 MDIO_AN_DEVAD, MDIO_AN_REG_8481_LEGACY_MII_CTRL, in elink_848xx_cmn_config_init()
10725 MDIO_AN_DEVAD, MDIO_AN_REG_8481_1000T_CTRL, in elink_848xx_cmn_config_init()
10773 MDIO_AN_DEVAD, MDIO_AN_REG_8481_AUX_CTRL, in elink_848xx_cmn_config_init()
10785 MDIO_AN_DEVAD, MDIO_AN_REG_8481_AUX_CTRL, in elink_848xx_cmn_config_init()
10791 MDIO_AN_DEVAD, MDIO_AN_REG_8481_LEGACY_AN_ADV, in elink_848xx_cmn_config_init()
10803 MDIO_AN_DEVAD, in elink_848xx_cmn_config_init()
10815 MDIO_AN_DEVAD, in elink_848xx_cmn_config_init()
10819 MDIO_AN_DEVAD, MDIO_AN_REG_CTRL, in elink_848xx_cmn_config_init()
10823 MDIO_AN_DEVAD, in elink_848xx_cmn_config_init()
11106 elink_cl45_write(sc, phy, MDIO_AN_DEVAD, in elink_84833_hw_reset_phy()
11109 elink_cl45_write(sc, phy, MDIO_AN_DEVAD, in elink_84833_hw_reset_phy()
11215 elink_cl45_read(sc, phy, MDIO_AN_DEVAD, in elink_848x3_config_init()
11354 MDIO_AN_DEVAD, 0xFFFA, &val1); in elink_848xx_read_status()
11371 MDIO_AN_DEVAD, in elink_848xx_read_status()
11376 MDIO_AN_DEVAD, in elink_848xx_read_status()
11400 MDIO_AN_DEVAD, in elink_848xx_read_status()
11419 MDIO_AN_DEVAD, in elink_848xx_read_status()
11426 MDIO_AN_DEVAD, in elink_848xx_read_status()
11440 elink_cl45_read(sc, phy, MDIO_AN_DEVAD, in elink_848xx_read_status()
11458 elink_cl45_read(sc, phy, MDIO_AN_DEVAD, in elink_848xx_read_status()
11468 elink_cl45_read(sc, phy, MDIO_AN_DEVAD, in elink_848xx_read_status()
11505 MDIO_AN_DEVAD, MDIO_AN_REG_CTRL, 0x0000); in elink_8481_link_reset()
12029 elink_cl45_write(sc, phy, MDIO_AN_DEVAD, in elink_54618se_config_init()
12292 MDIO_AN_DEVAD, MDIO_AN_REG_CTRL, &val); in elink_7101_config_init()
12295 MDIO_AN_DEVAD, MDIO_AN_REG_CTRL, val); in elink_7101_config_init()
12331 MDIO_AN_DEVAD, MDIO_AN_REG_MASTER_STATUS, in elink_7101_read_status()
14919 elink_cl45_read(sc, phy, MDIO_AN_DEVAD, in elink_check_kr2_wa()
14921 elink_cl45_read(sc, phy, MDIO_AN_DEVAD, in elink_check_kr2_wa()