Lines Matching +full:mac +full:-
1 /*-
32 * This is the top-level N-PHY support for the Broadcom softmac driver.
93 bwn_phy_n_attach(struct bwn_mac *mac) in bwn_phy_n_attach() argument
97 return bwn_nphy_op_allocate(mac); in bwn_phy_n_attach()
99 device_printf(mac->mac_sc->sc_dev, in bwn_phy_n_attach()
101 "no PHY-N support\n", __func__); in bwn_phy_n_attach()
107 bwn_phy_n_detach(struct bwn_mac *mac) in bwn_phy_n_detach() argument
111 return bwn_nphy_op_free(mac); in bwn_phy_n_detach()
116 bwn_phy_n_prepare_hw(struct bwn_mac *mac) in bwn_phy_n_prepare_hw() argument
120 return (bwn_nphy_op_prepare_structs(mac)); in bwn_phy_n_prepare_hw()
127 bwn_phy_n_init_pre(struct bwn_mac *mac) in bwn_phy_n_init_pre() argument
134 bwn_phy_n_init(struct bwn_mac *mac) in bwn_phy_n_init() argument
137 return bwn_nphy_op_init(mac); in bwn_phy_n_init()
144 bwn_phy_n_exit(struct bwn_mac *mac) in bwn_phy_n_exit() argument
151 bwn_phy_n_read(struct bwn_mac *mac, uint16_t reg) in bwn_phy_n_read() argument
154 BWN_WRITE_2(mac, BWN_PHYCTL, reg); in bwn_phy_n_read()
155 return BWN_READ_2(mac, BWN_PHYDATA); in bwn_phy_n_read()
159 bwn_phy_n_write(struct bwn_mac *mac, uint16_t reg, uint16_t value) in bwn_phy_n_write() argument
162 BWN_WRITE_2(mac, BWN_PHYCTL, reg); in bwn_phy_n_write()
163 BWN_WRITE_2(mac, BWN_PHYDATA, value); in bwn_phy_n_write()
167 bwn_phy_n_rf_read(struct bwn_mac *mac, uint16_t reg) in bwn_phy_n_rf_read() argument
170 /* Register 1 is a 32-bit register. */ in bwn_phy_n_rf_read()
171 if (mac->mac_phy.rev < 7 && reg == 1) { in bwn_phy_n_rf_read()
172 BWN_ERRPRINTF(mac->mac_sc, "%s: bad reg access\n", __func__); in bwn_phy_n_rf_read()
175 if (mac->mac_phy.rev >= 7) in bwn_phy_n_rf_read()
180 BWN_WRITE_2(mac, BWN_RFCTL, reg); in bwn_phy_n_rf_read()
181 return BWN_READ_2(mac, BWN_RFDATALO); in bwn_phy_n_rf_read()
185 bwn_phy_n_rf_write(struct bwn_mac *mac, uint16_t reg, uint16_t value) in bwn_phy_n_rf_write() argument
188 /* Register 1 is a 32-bit register. */ in bwn_phy_n_rf_write()
189 if (mac->mac_phy.rev < 7 && reg == 1) { in bwn_phy_n_rf_write()
190 BWN_ERRPRINTF(mac->mac_sc, "%s: bad reg access\n", __func__); in bwn_phy_n_rf_write()
193 BWN_WRITE_2(mac, BWN_RFCTL, reg); in bwn_phy_n_rf_write()
194 BWN_WRITE_2(mac, BWN_RFDATALO, value); in bwn_phy_n_rf_write()
198 bwn_phy_n_hwpctl(struct bwn_mac *mac) in bwn_phy_n_hwpctl() argument
205 bwn_phy_n_rf_onoff(struct bwn_mac *mac, int on) in bwn_phy_n_rf_onoff() argument
208 bwn_nphy_op_software_rfkill(mac, on); in bwn_phy_n_rf_onoff()
213 bwn_phy_n_switch_analog(struct bwn_mac *mac, int on) in bwn_phy_n_switch_analog() argument
216 bwn_nphy_op_switch_analog(mac, on); in bwn_phy_n_switch_analog()
221 bwn_phy_n_switch_channel(struct bwn_mac *mac, uint32_t newchan) in bwn_phy_n_switch_channel() argument
224 return bwn_nphy_op_switch_channel(mac, newchan); in bwn_phy_n_switch_channel()
231 bwn_phy_n_get_default_chan(struct bwn_mac *mac) in bwn_phy_n_get_default_chan() argument
234 if (bwn_current_band(mac) == BWN_BAND_2G) in bwn_phy_n_get_default_chan()
240 bwn_phy_n_set_antenna(struct bwn_mac *mac, int antenna) in bwn_phy_n_set_antenna() argument
246 bwn_phy_n_im(struct bwn_mac *mac, int mode) in bwn_phy_n_im() argument
253 bwn_phy_n_recalc_txpwr(struct bwn_mac *mac, int ignore_tssi) in bwn_phy_n_recalc_txpwr() argument
256 return bwn_nphy_op_recalc_txpower(mac, ignore_tssi); in bwn_phy_n_recalc_txpwr()
263 bwn_phy_n_set_txpwr(struct bwn_mac *mac) in bwn_phy_n_set_txpwr() argument
269 bwn_phy_n_task_15s(struct bwn_mac *mac) in bwn_phy_n_task_15s() argument
275 bwn_phy_n_task_60s(struct bwn_mac *mac) in bwn_phy_n_task_60s() argument