Lines Matching +full:mac +full:-
1 /*-
2 * Copyright (c) 2009-2010 Weongyo Jeong <weongyo@freebsd.org>
124 static uint16_t bwn_phy_g_txctl(struct bwn_mac *mac);
125 static int bwn_phy_shm_tssi_read(struct bwn_mac *mac, uint16_t shm_offset);
126 static void bwn_phy_g_setatt(struct bwn_mac *mac, int *bbattp, int *rfattp);
127 static void bwn_phy_lock(struct bwn_mac *mac);
128 static void bwn_phy_unlock(struct bwn_mac *mac);
129 static void bwn_rf_lock(struct bwn_mac *mac);
130 static void bwn_rf_unlock(struct bwn_mac *mac);
140 bwn_has_hwpctl(struct bwn_mac *mac) in bwn_has_hwpctl() argument
143 if (mac->mac_phy.hwpctl == 0 || mac->mac_phy.use_hwpctl == NULL) in bwn_has_hwpctl()
145 return (mac->mac_phy.use_hwpctl(mac)); in bwn_has_hwpctl()
149 bwn_phy_g_attach(struct bwn_mac *mac) in bwn_phy_g_attach() argument
151 struct bwn_softc *sc = mac->mac_sc; in bwn_phy_g_attach()
152 struct bwn_phy *phy = &mac->mac_phy; in bwn_phy_g_attach()
153 struct bwn_phy_g *pg = &phy->phy_g; in bwn_phy_g_attach()
171 BWN_PHY_G_READVAR(sc->sc_dev, int8, BHND_NVAR_PA0ITSSIT, &bg); in bwn_phy_g_attach()
172 BWN_PHY_G_READVAR(sc->sc_dev, int16, BHND_NVAR_PA0B0, &pab0); in bwn_phy_g_attach()
173 BWN_PHY_G_READVAR(sc->sc_dev, int16, BHND_NVAR_PA0B1, &pab1); in bwn_phy_g_attach()
174 BWN_PHY_G_READVAR(sc->sc_dev, int16, BHND_NVAR_PA0B2, &pab2); in bwn_phy_g_attach()
175 BWN_PHY_G_READVAR(sc->sc_dev, int16, BHND_NVAR_PA0MAXPWR, in bwn_phy_g_attach()
176 &pg->pg_pa0maxpwr); in bwn_phy_g_attach()
180 pg->pg_flags = 0; in bwn_phy_g_attach()
181 if (pab0 == 0 || pab1 == 0 || pab2 == 0 || pab0 == -1 || pab1 == -1 || in bwn_phy_g_attach()
182 pab2 == -1) { in bwn_phy_g_attach()
183 pg->pg_idletssi = 52; in bwn_phy_g_attach()
184 pg->pg_tssi2dbm = bwn_phy_g_tssi2dbm_table; in bwn_phy_g_attach()
188 pg->pg_idletssi = (bg == 0 || bg == -1) ? 62 : bg; in bwn_phy_g_attach()
189 pg->pg_tssi2dbm = (uint8_t *)malloc(64, M_DEVBUF, M_NOWAIT | M_ZERO); in bwn_phy_g_attach()
190 if (pg->pg_tssi2dbm == NULL) { in bwn_phy_g_attach()
191 device_printf(sc->sc_dev, "failed to allocate buffer\n"); in bwn_phy_g_attach()
204 device_printf(sc->sc_dev, in bwn_phy_g_attach()
206 free(pg->pg_tssi2dbm, M_DEVBUF); in bwn_phy_g_attach()
209 q = BWN_TSSI2DBM(f * 4096 - BWN_TSSI2DBM(m2 * f, 16) * in bwn_phy_g_attach()
211 delta = abs(q - f); in bwn_phy_g_attach()
216 pg->pg_tssi2dbm[i] = MIN(MAX(BWN_TSSI2DBM(m1 * f, 8192), -127), in bwn_phy_g_attach()
220 pg->pg_flags |= BWN_PHY_G_FLAG_TSSITABLE_ALLOC; in bwn_phy_g_attach()
225 bwn_phy_g_detach(struct bwn_mac *mac) in bwn_phy_g_detach() argument
227 struct bwn_phy_g *pg = &mac->mac_phy.phy_g; in bwn_phy_g_detach()
229 if (pg->pg_flags & BWN_PHY_G_FLAG_TSSITABLE_ALLOC) { in bwn_phy_g_detach()
230 free(pg->pg_tssi2dbm, M_DEVBUF); in bwn_phy_g_detach()
231 pg->pg_tssi2dbm = NULL; in bwn_phy_g_detach()
233 pg->pg_flags = 0; in bwn_phy_g_detach()
237 bwn_phy_g_init_pre(struct bwn_mac *mac) in bwn_phy_g_init_pre() argument
239 struct bwn_phy *phy = &mac->mac_phy; in bwn_phy_g_init_pre()
240 struct bwn_phy_g *pg = &phy->phy_g; in bwn_phy_g_init_pre()
245 tssi2dbm = pg->pg_tssi2dbm; in bwn_phy_g_init_pre()
246 idletssi = pg->pg_idletssi; in bwn_phy_g_init_pre()
250 pg->pg_tssi2dbm = tssi2dbm; in bwn_phy_g_init_pre()
251 pg->pg_idletssi = idletssi; in bwn_phy_g_init_pre()
253 memset(pg->pg_minlowsig, 0xff, sizeof(pg->pg_minlowsig)); in bwn_phy_g_init_pre()
255 for (i = 0; i < N(pg->pg_nrssi); i++) in bwn_phy_g_init_pre()
256 pg->pg_nrssi[i] = -1000; in bwn_phy_g_init_pre()
257 for (i = 0; i < N(pg->pg_nrssi_lt); i++) in bwn_phy_g_init_pre()
258 pg->pg_nrssi_lt[i] = i; in bwn_phy_g_init_pre()
259 pg->pg_lofcal = 0xffff; in bwn_phy_g_init_pre()
260 pg->pg_initval = 0xffff; in bwn_phy_g_init_pre()
261 pg->pg_immode = BWN_IMMODE_NONE; in bwn_phy_g_init_pre()
262 pg->pg_ofdmtab_dir = BWN_OFDMTAB_DIR_UNKNOWN; in bwn_phy_g_init_pre()
263 pg->pg_avgtssi = 0xff; in bwn_phy_g_init_pre()
265 pg->pg_loctl.tx_bias = 0xff; in bwn_phy_g_init_pre()
266 TAILQ_INIT(&pg->pg_loctl.calib_list); in bwn_phy_g_init_pre()
270 bwn_phy_g_prepare_hw(struct bwn_mac *mac) in bwn_phy_g_prepare_hw() argument
272 struct bwn_phy *phy = &mac->mac_phy; in bwn_phy_g_prepare_hw()
273 struct bwn_phy_g *pg = &phy->phy_g; in bwn_phy_g_prepare_hw()
274 struct bwn_softc *sc = mac->mac_sc; in bwn_phy_g_prepare_hw()
275 struct bwn_txpwr_loctl *lo = &pg->pg_loctl; in bwn_phy_g_prepare_hw()
293 KASSERT(phy->type == BWN_PHYTYPE_G, ("%s fail", __func__)); in bwn_phy_g_prepare_hw()
295 if (phy->rf_ver == 0x2050 && phy->rf_rev < 6) in bwn_phy_g_prepare_hw()
296 pg->pg_bbatt.att = 0; in bwn_phy_g_prepare_hw()
298 pg->pg_bbatt.att = 2; in bwn_phy_g_prepare_hw()
301 pg->pg_rfatt.padmix = 0; in bwn_phy_g_prepare_hw()
303 if (sc->sc_board_info.board_vendor == PCI_VENDOR_BROADCOM && in bwn_phy_g_prepare_hw()
304 sc->sc_board_info.board_type == BHND_BOARD_BCM94309G) { in bwn_phy_g_prepare_hw()
305 if (sc->sc_board_info.board_rev < 0x43) { in bwn_phy_g_prepare_hw()
306 pg->pg_rfatt.att = 2; in bwn_phy_g_prepare_hw()
308 } else if (sc->sc_board_info.board_rev < 0x51) { in bwn_phy_g_prepare_hw()
309 pg->pg_rfatt.att = 3; in bwn_phy_g_prepare_hw()
314 if (phy->type == BWN_PHYTYPE_A) { in bwn_phy_g_prepare_hw()
315 pg->pg_rfatt.att = 0x60; in bwn_phy_g_prepare_hw()
319 switch (phy->rf_ver) { in bwn_phy_g_prepare_hw()
321 switch (phy->rf_rev) { in bwn_phy_g_prepare_hw()
323 pg->pg_rfatt.att = 5; in bwn_phy_g_prepare_hw()
326 if (phy->type == BWN_PHYTYPE_G) { in bwn_phy_g_prepare_hw()
327 if (sc->sc_board_info.board_vendor == in bwn_phy_g_prepare_hw()
329 sc->sc_board_info.board_type == in bwn_phy_g_prepare_hw()
331 sc->sc_board_info.board_rev >= 30) in bwn_phy_g_prepare_hw()
332 pg->pg_rfatt.att = 3; in bwn_phy_g_prepare_hw()
333 else if (sc->sc_board_info.board_vendor == in bwn_phy_g_prepare_hw()
335 sc->sc_board_info.board_type == in bwn_phy_g_prepare_hw()
337 pg->pg_rfatt.att = 3; in bwn_phy_g_prepare_hw()
339 pg->pg_rfatt.att = 1; in bwn_phy_g_prepare_hw()
341 if (sc->sc_board_info.board_vendor == in bwn_phy_g_prepare_hw()
343 sc->sc_board_info.board_type == in bwn_phy_g_prepare_hw()
345 sc->sc_board_info.board_rev >= 30) in bwn_phy_g_prepare_hw()
346 pg->pg_rfatt.att = 7; in bwn_phy_g_prepare_hw()
348 pg->pg_rfatt.att = 6; in bwn_phy_g_prepare_hw()
352 if (phy->type == BWN_PHYTYPE_G) { in bwn_phy_g_prepare_hw()
353 if (sc->sc_board_info.board_vendor == in bwn_phy_g_prepare_hw()
355 sc->sc_board_info.board_type == in bwn_phy_g_prepare_hw()
357 sc->sc_board_info.board_rev >= 30) in bwn_phy_g_prepare_hw()
358 pg->pg_rfatt.att = 3; in bwn_phy_g_prepare_hw()
359 else if (sc->sc_board_info.board_vendor == in bwn_phy_g_prepare_hw()
361 sc->sc_board_info.board_type == in bwn_phy_g_prepare_hw()
363 pg->pg_rfatt.att = 5; in bwn_phy_g_prepare_hw()
364 else if (sc->sc_cid.chip_id == in bwn_phy_g_prepare_hw()
366 pg->pg_rfatt.att = 4; in bwn_phy_g_prepare_hw()
368 pg->pg_rfatt.att = 3; in bwn_phy_g_prepare_hw()
370 pg->pg_rfatt.att = 6; in bwn_phy_g_prepare_hw()
373 pg->pg_rfatt.att = 5; in bwn_phy_g_prepare_hw()
377 pg->pg_rfatt.att = 1; in bwn_phy_g_prepare_hw()
381 pg->pg_rfatt.att = 5; in bwn_phy_g_prepare_hw()
384 pg->pg_rfatt.att = 0xa; in bwn_phy_g_prepare_hw()
385 pg->pg_rfatt.padmix = 1; in bwn_phy_g_prepare_hw()
389 pg->pg_rfatt.att = 5; in bwn_phy_g_prepare_hw()
394 switch (phy->rf_rev) { in bwn_phy_g_prepare_hw()
396 pg->pg_rfatt.att = 6; in bwn_phy_g_prepare_hw()
401 pg->pg_rfatt.att = 5; in bwn_phy_g_prepare_hw()
403 pg->pg_txctl = (bwn_phy_g_txctl(mac) << 4); in bwn_phy_g_prepare_hw()
405 if (!bwn_has_hwpctl(mac)) { in bwn_phy_g_prepare_hw()
406 lo->rfatt.array = rfatt0; in bwn_phy_g_prepare_hw()
407 lo->rfatt.len = N(rfatt0); in bwn_phy_g_prepare_hw()
408 lo->rfatt.min = 0; in bwn_phy_g_prepare_hw()
409 lo->rfatt.max = 9; in bwn_phy_g_prepare_hw()
412 if (phy->rf_ver == 0x2050 && phy->rf_rev == 8) { in bwn_phy_g_prepare_hw()
413 lo->rfatt.array = rfatt1; in bwn_phy_g_prepare_hw()
414 lo->rfatt.len = N(rfatt1); in bwn_phy_g_prepare_hw()
415 lo->rfatt.min = 0; in bwn_phy_g_prepare_hw()
416 lo->rfatt.max = 14; in bwn_phy_g_prepare_hw()
419 lo->rfatt.array = rfatt2; in bwn_phy_g_prepare_hw()
420 lo->rfatt.len = N(rfatt2); in bwn_phy_g_prepare_hw()
421 lo->rfatt.min = 0; in bwn_phy_g_prepare_hw()
422 lo->rfatt.max = 9; in bwn_phy_g_prepare_hw()
424 lo->bbatt.array = bbatt_0; in bwn_phy_g_prepare_hw()
425 lo->bbatt.len = N(bbatt_0); in bwn_phy_g_prepare_hw()
426 lo->bbatt.min = 0; in bwn_phy_g_prepare_hw()
427 lo->bbatt.max = 8; in bwn_phy_g_prepare_hw()
429 BWN_READ_4(mac, BWN_MACCTL); in bwn_phy_g_prepare_hw()
430 if (phy->rev == 1) { in bwn_phy_g_prepare_hw()
431 phy->gmode = 0; in bwn_phy_g_prepare_hw()
432 bwn_reset_core(mac, 0); in bwn_phy_g_prepare_hw()
433 bwn_phy_g_init_sub(mac); in bwn_phy_g_prepare_hw()
434 phy->gmode = 1; in bwn_phy_g_prepare_hw()
435 bwn_reset_core(mac, 1); in bwn_phy_g_prepare_hw()
441 bwn_phy_g_txctl(struct bwn_mac *mac) in bwn_phy_g_txctl() argument
443 struct bwn_phy *phy = &mac->mac_phy; in bwn_phy_g_txctl()
445 if (phy->rf_ver != 0x2050) in bwn_phy_g_txctl()
447 if (phy->rf_rev == 1) in bwn_phy_g_txctl()
449 if (phy->rf_rev < 6) in bwn_phy_g_txctl()
451 if (phy->rf_rev == 8) in bwn_phy_g_txctl()
457 bwn_phy_g_init(struct bwn_mac *mac) in bwn_phy_g_init() argument
460 bwn_phy_g_init_sub(mac); in bwn_phy_g_init()
465 bwn_phy_g_exit(struct bwn_mac *mac) in bwn_phy_g_exit() argument
467 struct bwn_txpwr_loctl *lo = &mac->mac_phy.phy_g.pg_loctl; in bwn_phy_g_exit()
472 TAILQ_FOREACH_SAFE(cal, &lo->calib_list, list, tmp) { in bwn_phy_g_exit()
473 TAILQ_REMOVE(&lo->calib_list, cal, list); in bwn_phy_g_exit()
479 bwn_phy_g_read(struct bwn_mac *mac, uint16_t reg) in bwn_phy_g_read() argument
482 BWN_WRITE_2(mac, BWN_PHYCTL, reg); in bwn_phy_g_read()
483 return (BWN_READ_2(mac, BWN_PHYDATA)); in bwn_phy_g_read()
487 bwn_phy_g_write(struct bwn_mac *mac, uint16_t reg, uint16_t value) in bwn_phy_g_write() argument
490 BWN_WRITE_2(mac, BWN_PHYCTL, reg); in bwn_phy_g_write()
491 BWN_WRITE_2(mac, BWN_PHYDATA, value); in bwn_phy_g_write()
495 bwn_phy_g_rf_read(struct bwn_mac *mac, uint16_t reg) in bwn_phy_g_rf_read() argument
499 BWN_WRITE_2(mac, BWN_RFCTL, reg | 0x80); in bwn_phy_g_rf_read()
500 return (BWN_READ_2(mac, BWN_RFDATALO)); in bwn_phy_g_rf_read()
504 bwn_phy_g_rf_write(struct bwn_mac *mac, uint16_t reg, uint16_t value) in bwn_phy_g_rf_write() argument
508 BWN_WRITE_2(mac, BWN_RFCTL, reg); in bwn_phy_g_rf_write()
509 BWN_WRITE_2(mac, BWN_RFDATALO, value); in bwn_phy_g_rf_write()
513 bwn_phy_g_hwpctl(struct bwn_mac *mac) in bwn_phy_g_hwpctl() argument
516 return (mac->mac_phy.rev >= 6); in bwn_phy_g_hwpctl()
520 bwn_phy_g_rf_onoff(struct bwn_mac *mac, int on) in bwn_phy_g_rf_onoff() argument
522 struct bwn_phy *phy = &mac->mac_phy; in bwn_phy_g_rf_onoff()
523 struct bwn_phy_g *pg = &phy->phy_g; in bwn_phy_g_rf_onoff()
528 if (phy->rf_on) in bwn_phy_g_rf_onoff()
531 BWN_PHY_WRITE(mac, 0x15, 0x8000); in bwn_phy_g_rf_onoff()
532 BWN_PHY_WRITE(mac, 0x15, 0xcc00); in bwn_phy_g_rf_onoff()
533 BWN_PHY_WRITE(mac, 0x15, (phy->gmode ? 0xc0 : 0x0)); in bwn_phy_g_rf_onoff()
534 if (pg->pg_flags & BWN_PHY_G_FLAG_RADIOCTX_VALID) { in bwn_phy_g_rf_onoff()
535 BWN_PHY_WRITE(mac, BWN_PHY_RFOVER, in bwn_phy_g_rf_onoff()
536 pg->pg_radioctx_over); in bwn_phy_g_rf_onoff()
537 BWN_PHY_WRITE(mac, BWN_PHY_RFOVERVAL, in bwn_phy_g_rf_onoff()
538 pg->pg_radioctx_overval); in bwn_phy_g_rf_onoff()
539 pg->pg_flags &= ~BWN_PHY_G_FLAG_RADIOCTX_VALID; in bwn_phy_g_rf_onoff()
541 channel = phy->chan; in bwn_phy_g_rf_onoff()
542 bwn_phy_g_switch_chan(mac, 6, 1); in bwn_phy_g_rf_onoff()
543 bwn_phy_g_switch_chan(mac, channel, 0); in bwn_phy_g_rf_onoff()
547 rfover = BWN_PHY_READ(mac, BWN_PHY_RFOVER); in bwn_phy_g_rf_onoff()
548 rfoverval = BWN_PHY_READ(mac, BWN_PHY_RFOVERVAL); in bwn_phy_g_rf_onoff()
549 pg->pg_radioctx_over = rfover; in bwn_phy_g_rf_onoff()
550 pg->pg_radioctx_overval = rfoverval; in bwn_phy_g_rf_onoff()
551 pg->pg_flags |= BWN_PHY_G_FLAG_RADIOCTX_VALID; in bwn_phy_g_rf_onoff()
552 BWN_PHY_WRITE(mac, BWN_PHY_RFOVER, rfover | 0x008c); in bwn_phy_g_rf_onoff()
553 BWN_PHY_WRITE(mac, BWN_PHY_RFOVERVAL, rfoverval & 0xff73); in bwn_phy_g_rf_onoff()
557 bwn_phy_g_switch_channel(struct bwn_mac *mac, uint32_t newchan) in bwn_phy_g_switch_channel() argument
562 bwn_phy_g_switch_chan(mac, newchan, 0); in bwn_phy_g_switch_channel()
568 bwn_phy_g_get_default_chan(struct bwn_mac *mac) in bwn_phy_g_get_default_chan() argument
575 bwn_phy_g_set_antenna(struct bwn_mac *mac, int antenna) in bwn_phy_g_set_antenna() argument
577 struct bwn_phy *phy = &mac->mac_phy; in bwn_phy_g_set_antenna()
585 hf = bwn_hf_read(mac) & ~BWN_HF_UCODE_ANTDIV_HELPER; in bwn_phy_g_set_antenna()
586 bwn_hf_write(mac, hf); in bwn_phy_g_set_antenna()
588 BWN_PHY_WRITE(mac, BWN_PHY_BBANDCFG, in bwn_phy_g_set_antenna()
589 (BWN_PHY_READ(mac, BWN_PHY_BBANDCFG) & ~BWN_PHY_BBANDCFG_RXANT) | in bwn_phy_g_set_antenna()
594 tmp = BWN_PHY_READ(mac, BWN_PHY_ANTDWELL); in bwn_phy_g_set_antenna()
599 BWN_PHY_WRITE(mac, BWN_PHY_ANTDWELL, tmp); in bwn_phy_g_set_antenna()
601 tmp = BWN_PHY_READ(mac, BWN_PHY_ANTWRSETT); in bwn_phy_g_set_antenna()
606 BWN_PHY_WRITE(mac, BWN_PHY_ANTWRSETT, tmp); in bwn_phy_g_set_antenna()
607 if (phy->rev >= 2) { in bwn_phy_g_set_antenna()
608 BWN_PHY_WRITE(mac, BWN_PHY_OFDM61, in bwn_phy_g_set_antenna()
609 BWN_PHY_READ(mac, BWN_PHY_OFDM61) | BWN_PHY_OFDM61_10); in bwn_phy_g_set_antenna()
610 BWN_PHY_WRITE(mac, BWN_PHY_DIVSRCHGAINBACK, in bwn_phy_g_set_antenna()
611 (BWN_PHY_READ(mac, BWN_PHY_DIVSRCHGAINBACK) & 0xff00) | in bwn_phy_g_set_antenna()
613 if (phy->rev == 2) in bwn_phy_g_set_antenna()
614 BWN_PHY_WRITE(mac, BWN_PHY_ADIVRELATED, 8); in bwn_phy_g_set_antenna()
616 BWN_PHY_WRITE(mac, BWN_PHY_ADIVRELATED, in bwn_phy_g_set_antenna()
617 (BWN_PHY_READ(mac, BWN_PHY_ADIVRELATED) & 0xff00) | in bwn_phy_g_set_antenna()
620 if (phy->rev >= 6) in bwn_phy_g_set_antenna()
621 BWN_PHY_WRITE(mac, BWN_PHY_OFDM9B, 0xdc); in bwn_phy_g_set_antenna()
624 bwn_hf_write(mac, hf); in bwn_phy_g_set_antenna()
628 bwn_phy_g_im(struct bwn_mac *mac, int mode) in bwn_phy_g_im() argument
630 struct bwn_phy *phy = &mac->mac_phy; in bwn_phy_g_im()
631 struct bwn_phy_g *pg = &phy->phy_g; in bwn_phy_g_im()
633 KASSERT(phy->type == BWN_PHYTYPE_G, ("%s: fail", __func__)); in bwn_phy_g_im()
636 if (phy->rev == 0 || !phy->gmode) in bwn_phy_g_im()
639 pg->pg_aci_wlan_automatic = 0; in bwn_phy_g_im()
644 bwn_phy_g_recalc_txpwr(struct bwn_mac *mac, int ignore_tssi) in bwn_phy_g_recalc_txpwr() argument
646 struct bwn_phy *phy = &mac->mac_phy; in bwn_phy_g_recalc_txpwr()
647 struct bwn_phy_g *pg = &phy->phy_g; in bwn_phy_g_recalc_txpwr()
648 struct bwn_softc *sc = mac->mac_sc; in bwn_phy_g_recalc_txpwr()
655 KASSERT(phy->type == BWN_PHYTYPE_G, ("%s: fail", __func__)); in bwn_phy_g_recalc_txpwr()
657 cck = bwn_phy_shm_tssi_read(mac, BWN_SHARED_TSSI_CCK); in bwn_phy_g_recalc_txpwr()
658 ofdm = bwn_phy_shm_tssi_read(mac, BWN_SHARED_TSSI_OFDM_G); in bwn_phy_g_recalc_txpwr()
666 if (pg->pg_avgtssi != 0xff) in bwn_phy_g_recalc_txpwr()
667 tssi = (tssi + pg->pg_avgtssi) / 2; in bwn_phy_g_recalc_txpwr()
668 pg->pg_avgtssi = tssi; in bwn_phy_g_recalc_txpwr()
671 max = pg->pg_pa0maxpwr; in bwn_phy_g_recalc_txpwr()
672 if (sc->sc_board_info.board_flags & BHND_BFL_PACTRL) in bwn_phy_g_recalc_txpwr()
673 max -= 3; in bwn_phy_g_recalc_txpwr()
675 device_printf(sc->sc_dev, "invalid max TX-power value\n"); in bwn_phy_g_recalc_txpwr()
677 pg->pg_pa0maxpwr = max; in bwn_phy_g_recalc_txpwr()
680 power = MIN(MAX((phy->txpower < 0) ? 0 : (phy->txpower << 2), 0), max) - in bwn_phy_g_recalc_txpwr()
681 (pg->pg_tssi2dbm[MIN(MAX(pg->pg_idletssi - pg->pg_curtssi + in bwn_phy_g_recalc_txpwr()
686 rfatt = -((power + 7) / 8); in bwn_phy_g_recalc_txpwr()
687 bbatt = (-(power / 2)) - (4 * rfatt); in bwn_phy_g_recalc_txpwr()
690 pg->pg_bbatt_delta = bbatt; in bwn_phy_g_recalc_txpwr()
691 pg->pg_rfatt_delta = rfatt; in bwn_phy_g_recalc_txpwr()
696 bwn_phy_g_set_txpwr(struct bwn_mac *mac) in bwn_phy_g_set_txpwr() argument
698 struct bwn_phy *phy = &mac->mac_phy; in bwn_phy_g_set_txpwr()
699 struct bwn_phy_g *pg = &phy->phy_g; in bwn_phy_g_set_txpwr()
700 struct bwn_softc *sc = mac->mac_sc; in bwn_phy_g_set_txpwr()
704 bwn_mac_suspend(mac); in bwn_phy_g_set_txpwr()
708 bbatt = pg->pg_bbatt.att; in bwn_phy_g_set_txpwr()
709 bbatt += pg->pg_bbatt_delta; in bwn_phy_g_set_txpwr()
710 rfatt = pg->pg_rfatt.att; in bwn_phy_g_set_txpwr()
711 rfatt += pg->pg_rfatt_delta; in bwn_phy_g_set_txpwr()
713 bwn_phy_g_setatt(mac, &bbatt, &rfatt); in bwn_phy_g_set_txpwr()
714 txctl = pg->pg_txctl; in bwn_phy_g_set_txpwr()
715 if ((phy->rf_ver == 0x2050) && (phy->rf_rev == 2)) { in bwn_phy_g_set_txpwr()
721 } else if (sc->sc_board_info.board_flags & in bwn_phy_g_set_txpwr()
723 bbatt += 4 * (rfatt - 2); in bwn_phy_g_set_txpwr()
729 rfatt -= 3; in bwn_phy_g_set_txpwr()
732 rfatt -= 2; in bwn_phy_g_set_txpwr()
733 bbatt -= 2; in bwn_phy_g_set_txpwr()
737 pg->pg_txctl = txctl; in bwn_phy_g_set_txpwr()
738 bwn_phy_g_setatt(mac, &bbatt, &rfatt); in bwn_phy_g_set_txpwr()
739 pg->pg_rfatt.att = rfatt; in bwn_phy_g_set_txpwr()
740 pg->pg_bbatt.att = bbatt; in bwn_phy_g_set_txpwr()
744 bwn_phy_lock(mac); in bwn_phy_g_set_txpwr()
745 bwn_rf_lock(mac); in bwn_phy_g_set_txpwr()
746 bwn_phy_g_set_txpwr_sub(mac, &pg->pg_bbatt, &pg->pg_rfatt, in bwn_phy_g_set_txpwr()
747 pg->pg_txctl); in bwn_phy_g_set_txpwr()
748 bwn_rf_unlock(mac); in bwn_phy_g_set_txpwr()
749 bwn_phy_unlock(mac); in bwn_phy_g_set_txpwr()
751 bwn_mac_enable(mac); in bwn_phy_g_set_txpwr()
755 bwn_phy_g_task_15s(struct bwn_mac *mac) in bwn_phy_g_task_15s() argument
757 struct bwn_phy *phy = &mac->mac_phy; in bwn_phy_g_task_15s()
758 struct bwn_phy_g *pg = &phy->phy_g; in bwn_phy_g_task_15s()
759 struct bwn_softc *sc = mac->mac_sc; in bwn_phy_g_task_15s()
760 struct bwn_txpwr_loctl *lo = &pg->pg_loctl; in bwn_phy_g_task_15s()
765 bwn_mac_suspend(mac); in bwn_phy_g_task_15s()
771 if (bwn_has_hwpctl(mac)) { in bwn_phy_g_task_15s()
772 expire = now - BWN_LO_PWRVEC_EXPIRE; in bwn_phy_g_task_15s()
773 if (ieee80211_time_before(lo->pwr_vec_read_time, expire)) { in bwn_phy_g_task_15s()
774 bwn_lo_get_powervector(mac); in bwn_phy_g_task_15s()
775 bwn_phy_g_dc_lookup_init(mac, 0); in bwn_phy_g_task_15s()
780 expire = now - BWN_LO_CALIB_EXPIRE; in bwn_phy_g_task_15s()
781 TAILQ_FOREACH_SAFE(cal, &lo->calib_list, list, tmp) { in bwn_phy_g_task_15s()
782 if (!ieee80211_time_before(cal->calib_time, expire)) in bwn_phy_g_task_15s()
784 if (BWN_BBATTCMP(&cal->bbatt, &pg->pg_bbatt) && in bwn_phy_g_task_15s()
785 BWN_RFATTCMP(&cal->rfatt, &pg->pg_rfatt)) { in bwn_phy_g_task_15s()
791 cal->bbatt.att, cal->rfatt.att, cal->rfatt.padmix, in bwn_phy_g_task_15s()
792 cal->ctl.i, cal->ctl.q); in bwn_phy_g_task_15s()
794 TAILQ_REMOVE(&lo->calib_list, cal, list); in bwn_phy_g_task_15s()
797 if (expired || TAILQ_EMPTY(&lo->calib_list)) { in bwn_phy_g_task_15s()
798 cal = bwn_lo_calibset(mac, &pg->pg_bbatt, in bwn_phy_g_task_15s()
799 &pg->pg_rfatt); in bwn_phy_g_task_15s()
801 device_printf(sc->sc_dev, in bwn_phy_g_task_15s()
805 TAILQ_INSERT_TAIL(&lo->calib_list, cal, list); in bwn_phy_g_task_15s()
806 bwn_lo_write(mac, &cal->ctl); in bwn_phy_g_task_15s()
810 bwn_mac_enable(mac); in bwn_phy_g_task_15s()
814 bwn_phy_g_task_60s(struct bwn_mac *mac) in bwn_phy_g_task_60s() argument
816 struct bwn_phy *phy = &mac->mac_phy; in bwn_phy_g_task_60s()
817 struct bwn_softc *sc = mac->mac_sc; in bwn_phy_g_task_60s()
818 uint8_t old = phy->chan; in bwn_phy_g_task_60s()
820 if (!(sc->sc_board_info.board_flags & BHND_BFL_ADCDIV)) in bwn_phy_g_task_60s()
823 bwn_mac_suspend(mac); in bwn_phy_g_task_60s()
824 bwn_nrssi_slope_11g(mac); in bwn_phy_g_task_60s()
825 if ((phy->rf_ver == 0x2050) && (phy->rf_rev == 8)) { in bwn_phy_g_task_60s()
826 bwn_switch_channel(mac, (old >= 8) ? 1 : 13); in bwn_phy_g_task_60s()
827 bwn_switch_channel(mac, old); in bwn_phy_g_task_60s()
829 bwn_mac_enable(mac); in bwn_phy_g_task_60s()
833 bwn_phy_switch_analog(struct bwn_mac *mac, int on) in bwn_phy_switch_analog() argument
836 BWN_WRITE_2(mac, BWN_PHY0, on ? 0 : 0xf4); in bwn_phy_switch_analog()
840 bwn_phy_g_init_sub(struct bwn_mac *mac) in bwn_phy_g_init_sub() argument
842 struct bwn_phy *phy = &mac->mac_phy; in bwn_phy_g_init_sub()
843 struct bwn_phy_g *pg = &phy->phy_g; in bwn_phy_g_init_sub()
844 struct bwn_softc *sc = mac->mac_sc; in bwn_phy_g_init_sub()
847 if (phy->rev == 1) in bwn_phy_g_init_sub()
848 bwn_phy_init_b5(mac); in bwn_phy_g_init_sub()
850 bwn_phy_init_b6(mac); in bwn_phy_g_init_sub()
852 if (phy->rev >= 2 || phy->gmode) in bwn_phy_g_init_sub()
853 bwn_phy_init_a(mac); in bwn_phy_g_init_sub()
855 if (phy->rev >= 2) { in bwn_phy_g_init_sub()
856 BWN_PHY_WRITE(mac, BWN_PHY_ANALOGOVER, 0); in bwn_phy_g_init_sub()
857 BWN_PHY_WRITE(mac, BWN_PHY_ANALOGOVERVAL, 0); in bwn_phy_g_init_sub()
859 if (phy->rev == 2) { in bwn_phy_g_init_sub()
860 BWN_PHY_WRITE(mac, BWN_PHY_RFOVER, 0); in bwn_phy_g_init_sub()
861 BWN_PHY_WRITE(mac, BWN_PHY_PGACTL, 0xc0); in bwn_phy_g_init_sub()
863 if (phy->rev > 5) { in bwn_phy_g_init_sub()
864 BWN_PHY_WRITE(mac, BWN_PHY_RFOVER, 0x400); in bwn_phy_g_init_sub()
865 BWN_PHY_WRITE(mac, BWN_PHY_PGACTL, 0xc0); in bwn_phy_g_init_sub()
867 if (phy->gmode || phy->rev >= 2) { in bwn_phy_g_init_sub()
868 tmp = BWN_PHY_READ(mac, BWN_PHY_VERSION_OFDM); in bwn_phy_g_init_sub()
871 BWN_PHY_WRITE(mac, BWN_PHY_OFDM(0xc2), 0x1816); in bwn_phy_g_init_sub()
872 BWN_PHY_WRITE(mac, BWN_PHY_OFDM(0xc3), 0x8006); in bwn_phy_g_init_sub()
875 BWN_PHY_SETMASK(mac, BWN_PHY_OFDM(0xcc), 0x00ff, in bwn_phy_g_init_sub()
879 if ((phy->rev <= 2 && phy->gmode) || phy->rev >= 2) in bwn_phy_g_init_sub()
880 BWN_PHY_WRITE(mac, BWN_PHY_OFDM(0x7e), 0x78); in bwn_phy_g_init_sub()
881 if (phy->rf_rev == 8) { in bwn_phy_g_init_sub()
882 BWN_PHY_SET(mac, BWN_PHY_EXTG(0x01), 0x80); in bwn_phy_g_init_sub()
883 BWN_PHY_SET(mac, BWN_PHY_OFDM(0x3e), 0x4); in bwn_phy_g_init_sub()
886 bwn_loopback_calcgain(mac); in bwn_phy_g_init_sub()
888 if (phy->rf_rev != 8) { in bwn_phy_g_init_sub()
889 if (pg->pg_initval == 0xffff) in bwn_phy_g_init_sub()
890 pg->pg_initval = bwn_rf_init_bcm2050(mac); in bwn_phy_g_init_sub()
892 BWN_RF_WRITE(mac, 0x0078, pg->pg_initval); in bwn_phy_g_init_sub()
894 bwn_lo_g_init(mac); in bwn_phy_g_init_sub()
896 BWN_RF_WRITE(mac, 0x52, in bwn_phy_g_init_sub()
897 (BWN_RF_READ(mac, 0x52) & 0xff00) in bwn_phy_g_init_sub()
898 | pg->pg_loctl.tx_bias | in bwn_phy_g_init_sub()
899 pg->pg_loctl.tx_magn); in bwn_phy_g_init_sub()
901 BWN_RF_SETMASK(mac, 0x52, 0xfff0, pg->pg_loctl.tx_bias); in bwn_phy_g_init_sub()
903 if (phy->rev >= 6) { in bwn_phy_g_init_sub()
904 BWN_PHY_SETMASK(mac, BWN_PHY_CCK(0x36), 0x0fff, in bwn_phy_g_init_sub()
905 (pg->pg_loctl.tx_bias << 12)); in bwn_phy_g_init_sub()
907 if (sc->sc_board_info.board_flags & BHND_BFL_PACTRL) in bwn_phy_g_init_sub()
908 BWN_PHY_WRITE(mac, BWN_PHY_CCK(0x2e), 0x8075); in bwn_phy_g_init_sub()
910 BWN_PHY_WRITE(mac, BWN_PHY_CCK(0x2e), 0x807f); in bwn_phy_g_init_sub()
911 if (phy->rev < 2) in bwn_phy_g_init_sub()
912 BWN_PHY_WRITE(mac, BWN_PHY_CCK(0x2f), 0x101); in bwn_phy_g_init_sub()
914 BWN_PHY_WRITE(mac, BWN_PHY_CCK(0x2f), 0x202); in bwn_phy_g_init_sub()
915 if (phy->gmode || phy->rev >= 2) { in bwn_phy_g_init_sub()
916 bwn_lo_g_adjust(mac); in bwn_phy_g_init_sub()
917 BWN_PHY_WRITE(mac, BWN_PHY_LO_MASK, 0x8078); in bwn_phy_g_init_sub()
920 if (!(sc->sc_board_info.board_flags & BHND_BFL_ADCDIV)) { in bwn_phy_g_init_sub()
922 BWN_PHY_WRITE(mac, BWN_PHY_NRSSI_CTRL, i); in bwn_phy_g_init_sub()
923 BWN_PHY_WRITE(mac, BWN_PHY_NRSSI_DATA, in bwn_phy_g_init_sub()
924 (uint16_t)MIN(MAX(bwn_nrssi_read(mac, i) - 0xffff, in bwn_phy_g_init_sub()
925 -32), 31)); in bwn_phy_g_init_sub()
927 bwn_nrssi_threshold(mac); in bwn_phy_g_init_sub()
928 } else if (phy->gmode || phy->rev >= 2) { in bwn_phy_g_init_sub()
929 if (pg->pg_nrssi[0] == -1000) { in bwn_phy_g_init_sub()
930 KASSERT(pg->pg_nrssi[1] == -1000, in bwn_phy_g_init_sub()
932 bwn_nrssi_slope_11g(mac); in bwn_phy_g_init_sub()
934 bwn_nrssi_threshold(mac); in bwn_phy_g_init_sub()
936 if (phy->rf_rev == 8) in bwn_phy_g_init_sub()
937 BWN_PHY_WRITE(mac, BWN_PHY_EXTG(0x05), 0x3230); in bwn_phy_g_init_sub()
938 bwn_phy_hwpctl_init(mac); in bwn_phy_g_init_sub()
939 if ((sc->sc_cid.chip_id == BHND_CHIPID_BCM4306 in bwn_phy_g_init_sub()
940 && sc->sc_cid.chip_pkg == 2) || 0) { in bwn_phy_g_init_sub()
941 BWN_PHY_MASK(mac, BWN_PHY_CRS0, 0xbfff); in bwn_phy_g_init_sub()
942 BWN_PHY_MASK(mac, BWN_PHY_OFDM(0xc3), 0x7fff); in bwn_phy_g_init_sub()
947 bwn_phy_init_b5(struct bwn_mac *mac) in bwn_phy_init_b5() argument
949 struct bwn_phy *phy = &mac->mac_phy; in bwn_phy_init_b5()
950 struct bwn_phy_g *pg = &phy->phy_g; in bwn_phy_init_b5()
951 struct bwn_softc *sc = mac->mac_sc; in bwn_phy_init_b5()
955 if (phy->analog == 1) in bwn_phy_init_b5()
956 BWN_RF_SET(mac, 0x007a, 0x0050); in bwn_phy_init_b5()
957 if ((sc->sc_board_info.board_vendor != PCI_VENDOR_BROADCOM) && in bwn_phy_init_b5()
958 (sc->sc_board_info.board_type != BHND_BOARD_BU4306)) { in bwn_phy_init_b5()
961 BWN_PHY_WRITE(mac, offset, value); in bwn_phy_init_b5()
965 BWN_PHY_SETMASK(mac, 0x0035, 0xf0ff, 0x0700); in bwn_phy_init_b5()
966 if (phy->rf_ver == 0x2050) in bwn_phy_init_b5()
967 BWN_PHY_WRITE(mac, 0x0038, 0x0667); in bwn_phy_init_b5()
969 if (phy->gmode || phy->rev >= 2) { in bwn_phy_init_b5()
970 if (phy->rf_ver == 0x2050) { in bwn_phy_init_b5()
971 BWN_RF_SET(mac, 0x007a, 0x0020); in bwn_phy_init_b5()
972 BWN_RF_SET(mac, 0x0051, 0x0004); in bwn_phy_init_b5()
974 BWN_WRITE_2(mac, BWN_PHY_RADIO, 0x0000); in bwn_phy_init_b5()
976 BWN_PHY_SET(mac, 0x0802, 0x0100); in bwn_phy_init_b5()
977 BWN_PHY_SET(mac, 0x042b, 0x2000); in bwn_phy_init_b5()
979 BWN_PHY_WRITE(mac, 0x001c, 0x186a); in bwn_phy_init_b5()
981 BWN_PHY_SETMASK(mac, 0x0013, 0x00ff, 0x1900); in bwn_phy_init_b5()
982 BWN_PHY_SETMASK(mac, 0x0035, 0xffc0, 0x0064); in bwn_phy_init_b5()
983 BWN_PHY_SETMASK(mac, 0x005d, 0xff80, 0x000a); in bwn_phy_init_b5()
986 if (mac->mac_flags & BWN_MAC_FLAG_BADFRAME_PREEMP) in bwn_phy_init_b5()
987 BWN_PHY_SET(mac, BWN_PHY_RADIO_BITFIELD, (1 << 11)); in bwn_phy_init_b5()
989 if (phy->analog == 1) { in bwn_phy_init_b5()
990 BWN_PHY_WRITE(mac, 0x0026, 0xce00); in bwn_phy_init_b5()
991 BWN_PHY_WRITE(mac, 0x0021, 0x3763); in bwn_phy_init_b5()
992 BWN_PHY_WRITE(mac, 0x0022, 0x1bc3); in bwn_phy_init_b5()
993 BWN_PHY_WRITE(mac, 0x0023, 0x06f9); in bwn_phy_init_b5()
994 BWN_PHY_WRITE(mac, 0x0024, 0x037e); in bwn_phy_init_b5()
996 BWN_PHY_WRITE(mac, 0x0026, 0xcc00); in bwn_phy_init_b5()
997 BWN_PHY_WRITE(mac, 0x0030, 0x00c6); in bwn_phy_init_b5()
998 BWN_WRITE_2(mac, 0x03ec, 0x3f22); in bwn_phy_init_b5()
1000 if (phy->analog == 1) in bwn_phy_init_b5()
1001 BWN_PHY_WRITE(mac, 0x0020, 0x3e1c); in bwn_phy_init_b5()
1003 BWN_PHY_WRITE(mac, 0x0020, 0x301c); in bwn_phy_init_b5()
1005 if (phy->analog == 0) in bwn_phy_init_b5()
1006 BWN_WRITE_2(mac, 0x03e4, 0x3000); in bwn_phy_init_b5()
1008 old_channel = phy->chan; in bwn_phy_init_b5()
1009 bwn_phy_g_switch_chan(mac, 7, 0); in bwn_phy_init_b5()
1011 if (phy->rf_ver != 0x2050) { in bwn_phy_init_b5()
1012 BWN_RF_WRITE(mac, 0x0075, 0x0080); in bwn_phy_init_b5()
1013 BWN_RF_WRITE(mac, 0x0079, 0x0081); in bwn_phy_init_b5()
1016 BWN_RF_WRITE(mac, 0x0050, 0x0020); in bwn_phy_init_b5()
1017 BWN_RF_WRITE(mac, 0x0050, 0x0023); in bwn_phy_init_b5()
1019 if (phy->rf_ver == 0x2050) { in bwn_phy_init_b5()
1020 BWN_RF_WRITE(mac, 0x0050, 0x0020); in bwn_phy_init_b5()
1021 BWN_RF_WRITE(mac, 0x005a, 0x0070); in bwn_phy_init_b5()
1024 BWN_RF_WRITE(mac, 0x005b, 0x007b); in bwn_phy_init_b5()
1025 BWN_RF_WRITE(mac, 0x005c, 0x00b0); in bwn_phy_init_b5()
1026 BWN_RF_SET(mac, 0x007a, 0x0007); in bwn_phy_init_b5()
1028 bwn_phy_g_switch_chan(mac, old_channel, 0); in bwn_phy_init_b5()
1029 BWN_PHY_WRITE(mac, 0x0014, 0x0080); in bwn_phy_init_b5()
1030 BWN_PHY_WRITE(mac, 0x0032, 0x00ca); in bwn_phy_init_b5()
1031 BWN_PHY_WRITE(mac, 0x002a, 0x88a3); in bwn_phy_init_b5()
1033 bwn_phy_g_set_txpwr_sub(mac, &pg->pg_bbatt, &pg->pg_rfatt, in bwn_phy_init_b5()
1034 pg->pg_txctl); in bwn_phy_init_b5()
1036 if (phy->rf_ver == 0x2050) in bwn_phy_init_b5()
1037 BWN_RF_WRITE(mac, 0x005d, 0x000d); in bwn_phy_init_b5()
1039 BWN_WRITE_2(mac, 0x03e4, (BWN_READ_2(mac, 0x03e4) & 0xffc0) | 0x0004); in bwn_phy_init_b5()
1043 bwn_loopback_calcgain(struct bwn_mac *mac) in bwn_loopback_calcgain() argument
1045 struct bwn_phy *phy = &mac->mac_phy; in bwn_loopback_calcgain()
1046 struct bwn_phy_g *pg = &phy->phy_g; in bwn_loopback_calcgain()
1047 struct bwn_softc *sc = mac->mac_sc; in bwn_loopback_calcgain()
1055 backup_phy[0] = BWN_PHY_READ(mac, BWN_PHY_CRS0); in bwn_loopback_calcgain()
1056 backup_phy[1] = BWN_PHY_READ(mac, BWN_PHY_CCKBBANDCFG); in bwn_loopback_calcgain()
1057 backup_phy[2] = BWN_PHY_READ(mac, BWN_PHY_RFOVER); in bwn_loopback_calcgain()
1058 backup_phy[3] = BWN_PHY_READ(mac, BWN_PHY_RFOVERVAL); in bwn_loopback_calcgain()
1059 if (phy->rev != 1) { in bwn_loopback_calcgain()
1060 backup_phy[4] = BWN_PHY_READ(mac, BWN_PHY_ANALOGOVER); in bwn_loopback_calcgain()
1061 backup_phy[5] = BWN_PHY_READ(mac, BWN_PHY_ANALOGOVERVAL); in bwn_loopback_calcgain()
1063 backup_phy[6] = BWN_PHY_READ(mac, BWN_PHY_CCK(0x5a)); in bwn_loopback_calcgain()
1064 backup_phy[7] = BWN_PHY_READ(mac, BWN_PHY_CCK(0x59)); in bwn_loopback_calcgain()
1065 backup_phy[8] = BWN_PHY_READ(mac, BWN_PHY_CCK(0x58)); in bwn_loopback_calcgain()
1066 backup_phy[9] = BWN_PHY_READ(mac, BWN_PHY_CCK(0x0a)); in bwn_loopback_calcgain()
1067 backup_phy[10] = BWN_PHY_READ(mac, BWN_PHY_CCK(0x03)); in bwn_loopback_calcgain()
1068 backup_phy[11] = BWN_PHY_READ(mac, BWN_PHY_LO_MASK); in bwn_loopback_calcgain()
1069 backup_phy[12] = BWN_PHY_READ(mac, BWN_PHY_LO_CTL); in bwn_loopback_calcgain()
1070 backup_phy[13] = BWN_PHY_READ(mac, BWN_PHY_CCK(0x2b)); in bwn_loopback_calcgain()
1071 backup_phy[14] = BWN_PHY_READ(mac, BWN_PHY_PGACTL); in bwn_loopback_calcgain()
1072 backup_phy[15] = BWN_PHY_READ(mac, BWN_PHY_LO_LEAKAGE); in bwn_loopback_calcgain()
1073 backup_bband = pg->pg_bbatt.att; in bwn_loopback_calcgain()
1074 backup_radio[0] = BWN_RF_READ(mac, 0x52); in bwn_loopback_calcgain()
1075 backup_radio[1] = BWN_RF_READ(mac, 0x43); in bwn_loopback_calcgain()
1076 backup_radio[2] = BWN_RF_READ(mac, 0x7a); in bwn_loopback_calcgain()
1078 BWN_PHY_MASK(mac, BWN_PHY_CRS0, 0x3fff); in bwn_loopback_calcgain()
1079 BWN_PHY_SET(mac, BWN_PHY_CCKBBANDCFG, 0x8000); in bwn_loopback_calcgain()
1080 BWN_PHY_SET(mac, BWN_PHY_RFOVER, 0x0002); in bwn_loopback_calcgain()
1081 BWN_PHY_MASK(mac, BWN_PHY_RFOVERVAL, 0xfffd); in bwn_loopback_calcgain()
1082 BWN_PHY_SET(mac, BWN_PHY_RFOVER, 0x0001); in bwn_loopback_calcgain()
1083 BWN_PHY_MASK(mac, BWN_PHY_RFOVERVAL, 0xfffe); in bwn_loopback_calcgain()
1084 if (phy->rev != 1) { in bwn_loopback_calcgain()
1085 BWN_PHY_SET(mac, BWN_PHY_ANALOGOVER, 0x0001); in bwn_loopback_calcgain()
1086 BWN_PHY_MASK(mac, BWN_PHY_ANALOGOVERVAL, 0xfffe); in bwn_loopback_calcgain()
1087 BWN_PHY_SET(mac, BWN_PHY_ANALOGOVER, 0x0002); in bwn_loopback_calcgain()
1088 BWN_PHY_MASK(mac, BWN_PHY_ANALOGOVERVAL, 0xfffd); in bwn_loopback_calcgain()
1090 BWN_PHY_SET(mac, BWN_PHY_RFOVER, 0x000c); in bwn_loopback_calcgain()
1091 BWN_PHY_SET(mac, BWN_PHY_RFOVERVAL, 0x000c); in bwn_loopback_calcgain()
1092 BWN_PHY_SET(mac, BWN_PHY_RFOVER, 0x0030); in bwn_loopback_calcgain()
1093 BWN_PHY_SETMASK(mac, BWN_PHY_RFOVERVAL, 0xffcf, 0x10); in bwn_loopback_calcgain()
1095 BWN_PHY_WRITE(mac, BWN_PHY_CCK(0x5a), 0x0780); in bwn_loopback_calcgain()
1096 BWN_PHY_WRITE(mac, BWN_PHY_CCK(0x59), 0xc810); in bwn_loopback_calcgain()
1097 BWN_PHY_WRITE(mac, BWN_PHY_CCK(0x58), 0x000d); in bwn_loopback_calcgain()
1099 BWN_PHY_SET(mac, BWN_PHY_CCK(0x0a), 0x2000); in bwn_loopback_calcgain()
1100 if (phy->rev != 1) { in bwn_loopback_calcgain()
1101 BWN_PHY_SET(mac, BWN_PHY_ANALOGOVER, 0x0004); in bwn_loopback_calcgain()
1102 BWN_PHY_MASK(mac, BWN_PHY_ANALOGOVERVAL, 0xfffb); in bwn_loopback_calcgain()
1104 BWN_PHY_SETMASK(mac, BWN_PHY_CCK(0x03), 0xff9f, 0x40); in bwn_loopback_calcgain()
1106 if (phy->rf_rev == 8) in bwn_loopback_calcgain()
1107 BWN_RF_WRITE(mac, 0x43, 0x000f); in bwn_loopback_calcgain()
1109 BWN_RF_WRITE(mac, 0x52, 0); in bwn_loopback_calcgain()
1110 BWN_RF_SETMASK(mac, 0x43, 0xfff0, 0x9); in bwn_loopback_calcgain()
1112 bwn_phy_g_set_bbatt(mac, 11); in bwn_loopback_calcgain()
1114 if (phy->rev >= 3) in bwn_loopback_calcgain()
1115 BWN_PHY_WRITE(mac, BWN_PHY_LO_MASK, 0xc020); in bwn_loopback_calcgain()
1117 BWN_PHY_WRITE(mac, BWN_PHY_LO_MASK, 0x8020); in bwn_loopback_calcgain()
1118 BWN_PHY_WRITE(mac, BWN_PHY_LO_CTL, 0); in bwn_loopback_calcgain()
1120 BWN_PHY_SETMASK(mac, BWN_PHY_CCK(0x2b), 0xffc0, 0x01); in bwn_loopback_calcgain()
1121 BWN_PHY_SETMASK(mac, BWN_PHY_CCK(0x2b), 0xc0ff, 0x800); in bwn_loopback_calcgain()
1123 BWN_PHY_SET(mac, BWN_PHY_RFOVER, 0x0100); in bwn_loopback_calcgain()
1124 BWN_PHY_MASK(mac, BWN_PHY_RFOVERVAL, 0xcfff); in bwn_loopback_calcgain()
1126 if (sc->sc_board_info.board_flags & BHND_BFL_EXTLNA) { in bwn_loopback_calcgain()
1127 if (phy->rev >= 7) { in bwn_loopback_calcgain()
1128 BWN_PHY_SET(mac, BWN_PHY_RFOVER, 0x0800); in bwn_loopback_calcgain()
1129 BWN_PHY_SET(mac, BWN_PHY_RFOVERVAL, 0x8000); in bwn_loopback_calcgain()
1132 BWN_RF_MASK(mac, 0x7a, 0x00f7); in bwn_loopback_calcgain()
1135 loop_i_max = (phy->rf_rev == 8) ? 15 : 9; in bwn_loopback_calcgain()
1138 BWN_RF_WRITE(mac, 0x43, i); in bwn_loopback_calcgain()
1139 BWN_PHY_SETMASK(mac, BWN_PHY_RFOVERVAL, 0xf0ff, in bwn_loopback_calcgain()
1141 BWN_PHY_SETMASK(mac, BWN_PHY_PGACTL, 0x0fff, 0xa000); in bwn_loopback_calcgain()
1142 BWN_PHY_SET(mac, BWN_PHY_PGACTL, 0xf000); in bwn_loopback_calcgain()
1144 if (BWN_PHY_READ(mac, BWN_PHY_LO_LEAKAGE) >= 0xdfc) in bwn_loopback_calcgain()
1152 BWN_PHY_SET(mac, BWN_PHY_RFOVERVAL, 0x30); in bwn_loopback_calcgain()
1154 for (j = j - 8; j < 16; j++) { in bwn_loopback_calcgain()
1155 BWN_PHY_SETMASK(mac, BWN_PHY_RFOVERVAL, 0xf0ff, j << 8); in bwn_loopback_calcgain()
1156 BWN_PHY_SETMASK(mac, BWN_PHY_PGACTL, 0x0fff, 0xa000); in bwn_loopback_calcgain()
1157 BWN_PHY_SET(mac, BWN_PHY_PGACTL, 0xf000); in bwn_loopback_calcgain()
1159 trsw_rx -= 3; in bwn_loopback_calcgain()
1160 if (BWN_PHY_READ(mac, BWN_PHY_LO_LEAKAGE) >= 0xdfc) in bwn_loopback_calcgain()
1167 if (phy->rev != 1) { in bwn_loopback_calcgain()
1168 BWN_PHY_WRITE(mac, BWN_PHY_ANALOGOVER, backup_phy[4]); in bwn_loopback_calcgain()
1169 BWN_PHY_WRITE(mac, BWN_PHY_ANALOGOVERVAL, backup_phy[5]); in bwn_loopback_calcgain()
1171 BWN_PHY_WRITE(mac, BWN_PHY_CCK(0x5a), backup_phy[6]); in bwn_loopback_calcgain()
1172 BWN_PHY_WRITE(mac, BWN_PHY_CCK(0x59), backup_phy[7]); in bwn_loopback_calcgain()
1173 BWN_PHY_WRITE(mac, BWN_PHY_CCK(0x58), backup_phy[8]); in bwn_loopback_calcgain()
1174 BWN_PHY_WRITE(mac, BWN_PHY_CCK(0x0a), backup_phy[9]); in bwn_loopback_calcgain()
1175 BWN_PHY_WRITE(mac, BWN_PHY_CCK(0x03), backup_phy[10]); in bwn_loopback_calcgain()
1176 BWN_PHY_WRITE(mac, BWN_PHY_LO_MASK, backup_phy[11]); in bwn_loopback_calcgain()
1177 BWN_PHY_WRITE(mac, BWN_PHY_LO_CTL, backup_phy[12]); in bwn_loopback_calcgain()
1178 BWN_PHY_WRITE(mac, BWN_PHY_CCK(0x2b), backup_phy[13]); in bwn_loopback_calcgain()
1179 BWN_PHY_WRITE(mac, BWN_PHY_PGACTL, backup_phy[14]); in bwn_loopback_calcgain()
1181 bwn_phy_g_set_bbatt(mac, backup_bband); in bwn_loopback_calcgain()
1183 BWN_RF_WRITE(mac, 0x52, backup_radio[0]); in bwn_loopback_calcgain()
1184 BWN_RF_WRITE(mac, 0x43, backup_radio[1]); in bwn_loopback_calcgain()
1185 BWN_RF_WRITE(mac, 0x7a, backup_radio[2]); in bwn_loopback_calcgain()
1187 BWN_PHY_WRITE(mac, BWN_PHY_RFOVER, backup_phy[2] | 0x0003); in bwn_loopback_calcgain()
1189 BWN_PHY_WRITE(mac, BWN_PHY_RFOVER, backup_phy[2]); in bwn_loopback_calcgain()
1190 BWN_PHY_WRITE(mac, BWN_PHY_RFOVERVAL, backup_phy[3]); in bwn_loopback_calcgain()
1191 BWN_PHY_WRITE(mac, BWN_PHY_CRS0, backup_phy[0]); in bwn_loopback_calcgain()
1192 BWN_PHY_WRITE(mac, BWN_PHY_CCKBBANDCFG, backup_phy[1]); in bwn_loopback_calcgain()
1194 pg->pg_max_lb_gain = in bwn_loopback_calcgain()
1195 ((loop1_inner_done * 6) - (loop1_outer_done * 4)) - 11; in bwn_loopback_calcgain()
1196 pg->pg_trsw_rx_gain = trsw_rx * 2; in bwn_loopback_calcgain()
1200 bwn_rf_init_bcm2050(struct bwn_mac *mac) in bwn_rf_init_bcm2050() argument
1202 struct bwn_phy *phy = &mac->mac_phy; in bwn_rf_init_bcm2050()
1216 radio0 = BWN_RF_READ(mac, 0x43); in bwn_rf_init_bcm2050()
1217 radio1 = BWN_RF_READ(mac, 0x51); in bwn_rf_init_bcm2050()
1218 radio2 = BWN_RF_READ(mac, 0x52); in bwn_rf_init_bcm2050()
1219 pgactl = BWN_PHY_READ(mac, BWN_PHY_PGACTL); in bwn_rf_init_bcm2050()
1220 cck0 = BWN_PHY_READ(mac, BWN_PHY_CCK(0x5a)); in bwn_rf_init_bcm2050()
1221 cck1 = BWN_PHY_READ(mac, BWN_PHY_CCK(0x59)); in bwn_rf_init_bcm2050()
1222 cck2 = BWN_PHY_READ(mac, BWN_PHY_CCK(0x58)); in bwn_rf_init_bcm2050()
1224 if (phy->type == BWN_PHYTYPE_B) { in bwn_rf_init_bcm2050()
1225 cck3 = BWN_PHY_READ(mac, BWN_PHY_CCK(0x30)); in bwn_rf_init_bcm2050()
1226 reg0 = BWN_READ_2(mac, 0x3ec); in bwn_rf_init_bcm2050()
1228 BWN_PHY_WRITE(mac, BWN_PHY_CCK(0x30), 0xff); in bwn_rf_init_bcm2050()
1229 BWN_WRITE_2(mac, 0x3ec, 0x3f3f); in bwn_rf_init_bcm2050()
1230 } else if (phy->gmode || phy->rev >= 2) { in bwn_rf_init_bcm2050()
1231 rfover = BWN_PHY_READ(mac, BWN_PHY_RFOVER); in bwn_rf_init_bcm2050()
1232 rfoverval = BWN_PHY_READ(mac, BWN_PHY_RFOVERVAL); in bwn_rf_init_bcm2050()
1233 analogover = BWN_PHY_READ(mac, BWN_PHY_ANALOGOVER); in bwn_rf_init_bcm2050()
1234 analogoverval = BWN_PHY_READ(mac, BWN_PHY_ANALOGOVERVAL); in bwn_rf_init_bcm2050()
1235 crs0 = BWN_PHY_READ(mac, BWN_PHY_CRS0); in bwn_rf_init_bcm2050()
1236 classctl = BWN_PHY_READ(mac, BWN_PHY_CLASSCTL); in bwn_rf_init_bcm2050()
1238 BWN_PHY_SET(mac, BWN_PHY_ANALOGOVER, 0x0003); in bwn_rf_init_bcm2050()
1239 BWN_PHY_MASK(mac, BWN_PHY_ANALOGOVERVAL, 0xfffc); in bwn_rf_init_bcm2050()
1240 BWN_PHY_MASK(mac, BWN_PHY_CRS0, 0x7fff); in bwn_rf_init_bcm2050()
1241 BWN_PHY_MASK(mac, BWN_PHY_CLASSCTL, 0xfffc); in bwn_rf_init_bcm2050()
1243 lomask = BWN_PHY_READ(mac, BWN_PHY_LO_MASK); in bwn_rf_init_bcm2050()
1244 loctl = BWN_PHY_READ(mac, BWN_PHY_LO_CTL); in bwn_rf_init_bcm2050()
1245 if (phy->rev >= 3) in bwn_rf_init_bcm2050()
1246 BWN_PHY_WRITE(mac, BWN_PHY_LO_MASK, 0xc020); in bwn_rf_init_bcm2050()
1248 BWN_PHY_WRITE(mac, BWN_PHY_LO_MASK, 0x8020); in bwn_rf_init_bcm2050()
1249 BWN_PHY_WRITE(mac, BWN_PHY_LO_CTL, 0); in bwn_rf_init_bcm2050()
1252 BWN_PHY_WRITE(mac, BWN_PHY_RFOVERVAL, in bwn_rf_init_bcm2050()
1253 bwn_rf_2050_rfoverval(mac, BWN_PHY_RFOVERVAL, in bwn_rf_init_bcm2050()
1255 BWN_PHY_WRITE(mac, BWN_PHY_RFOVER, in bwn_rf_init_bcm2050()
1256 bwn_rf_2050_rfoverval(mac, BWN_PHY_RFOVER, 0)); in bwn_rf_init_bcm2050()
1258 BWN_WRITE_2(mac, 0x3e2, BWN_READ_2(mac, 0x3e2) | 0x8000); in bwn_rf_init_bcm2050()
1260 syncctl = BWN_PHY_READ(mac, BWN_PHY_SYNCCTL); in bwn_rf_init_bcm2050()
1261 BWN_PHY_MASK(mac, BWN_PHY_SYNCCTL, 0xff7f); in bwn_rf_init_bcm2050()
1262 reg1 = BWN_READ_2(mac, 0x3e6); in bwn_rf_init_bcm2050()
1263 reg2 = BWN_READ_2(mac, 0x3f4); in bwn_rf_init_bcm2050()
1265 if (phy->analog == 0) in bwn_rf_init_bcm2050()
1266 BWN_WRITE_2(mac, 0x03e6, 0x0122); in bwn_rf_init_bcm2050()
1268 if (phy->analog >= 2) in bwn_rf_init_bcm2050()
1269 BWN_PHY_SETMASK(mac, BWN_PHY_CCK(0x03), 0xffbf, 0x40); in bwn_rf_init_bcm2050()
1270 BWN_WRITE_2(mac, BWN_CHANNEL_EXT, in bwn_rf_init_bcm2050()
1271 (BWN_READ_2(mac, BWN_CHANNEL_EXT) | 0x2000)); in bwn_rf_init_bcm2050()
1274 reg = BWN_RF_READ(mac, 0x60); in bwn_rf_init_bcm2050()
1278 if (phy->type == BWN_PHYTYPE_B) in bwn_rf_init_bcm2050()
1279 BWN_RF_WRITE(mac, 0x78, 0x26); in bwn_rf_init_bcm2050()
1280 if (phy->gmode || phy->rev >= 2) { in bwn_rf_init_bcm2050()
1281 BWN_PHY_WRITE(mac, BWN_PHY_RFOVERVAL, in bwn_rf_init_bcm2050()
1282 bwn_rf_2050_rfoverval(mac, BWN_PHY_RFOVERVAL, in bwn_rf_init_bcm2050()
1285 BWN_PHY_WRITE(mac, BWN_PHY_PGACTL, 0xbfaf); in bwn_rf_init_bcm2050()
1286 BWN_PHY_WRITE(mac, BWN_PHY_CCK(0x2b), 0x1403); in bwn_rf_init_bcm2050()
1287 if (phy->gmode || phy->rev >= 2) { in bwn_rf_init_bcm2050()
1288 BWN_PHY_WRITE(mac, BWN_PHY_RFOVERVAL, in bwn_rf_init_bcm2050()
1289 bwn_rf_2050_rfoverval(mac, BWN_PHY_RFOVERVAL, in bwn_rf_init_bcm2050()
1292 BWN_PHY_WRITE(mac, BWN_PHY_PGACTL, 0xbfa0); in bwn_rf_init_bcm2050()
1293 BWN_RF_SET(mac, 0x51, 0x0004); in bwn_rf_init_bcm2050()
1294 if (phy->rf_rev == 8) in bwn_rf_init_bcm2050()
1295 BWN_RF_WRITE(mac, 0x43, 0x1f); in bwn_rf_init_bcm2050()
1297 BWN_RF_WRITE(mac, 0x52, 0); in bwn_rf_init_bcm2050()
1298 BWN_RF_SETMASK(mac, 0x43, 0xfff0, 0x0009); in bwn_rf_init_bcm2050()
1300 BWN_PHY_WRITE(mac, BWN_PHY_CCK(0x58), 0); in bwn_rf_init_bcm2050()
1303 BWN_PHY_WRITE(mac, BWN_PHY_CCK(0x5a), 0x0480); in bwn_rf_init_bcm2050()
1304 BWN_PHY_WRITE(mac, BWN_PHY_CCK(0x59), 0xc810); in bwn_rf_init_bcm2050()
1305 BWN_PHY_WRITE(mac, BWN_PHY_CCK(0x58), 0x000d); in bwn_rf_init_bcm2050()
1306 if (phy->gmode || phy->rev >= 2) { in bwn_rf_init_bcm2050()
1307 BWN_PHY_WRITE(mac, BWN_PHY_RFOVERVAL, in bwn_rf_init_bcm2050()
1308 bwn_rf_2050_rfoverval(mac, in bwn_rf_init_bcm2050()
1311 BWN_PHY_WRITE(mac, BWN_PHY_PGACTL, 0xafb0); in bwn_rf_init_bcm2050()
1313 if (phy->gmode || phy->rev >= 2) { in bwn_rf_init_bcm2050()
1314 BWN_PHY_WRITE(mac, BWN_PHY_RFOVERVAL, in bwn_rf_init_bcm2050()
1315 bwn_rf_2050_rfoverval(mac, in bwn_rf_init_bcm2050()
1318 BWN_PHY_WRITE(mac, BWN_PHY_PGACTL, 0xefb0); in bwn_rf_init_bcm2050()
1320 if (phy->gmode || phy->rev >= 2) { in bwn_rf_init_bcm2050()
1321 BWN_PHY_WRITE(mac, BWN_PHY_RFOVERVAL, in bwn_rf_init_bcm2050()
1322 bwn_rf_2050_rfoverval(mac, in bwn_rf_init_bcm2050()
1325 BWN_PHY_WRITE(mac, BWN_PHY_PGACTL, 0xfff0); in bwn_rf_init_bcm2050()
1327 tmp1 += BWN_PHY_READ(mac, BWN_PHY_LO_LEAKAGE); in bwn_rf_init_bcm2050()
1328 BWN_PHY_WRITE(mac, BWN_PHY_CCK(0x58), 0); in bwn_rf_init_bcm2050()
1329 if (phy->gmode || phy->rev >= 2) { in bwn_rf_init_bcm2050()
1330 BWN_PHY_WRITE(mac, BWN_PHY_RFOVERVAL, in bwn_rf_init_bcm2050()
1331 bwn_rf_2050_rfoverval(mac, in bwn_rf_init_bcm2050()
1334 BWN_PHY_WRITE(mac, BWN_PHY_PGACTL, 0xafb0); in bwn_rf_init_bcm2050()
1338 BWN_PHY_WRITE(mac, BWN_PHY_CCK(0x58), 0); in bwn_rf_init_bcm2050()
1344 BWN_RF_WRITE(mac, 0x78, radio78); in bwn_rf_init_bcm2050()
1347 BWN_PHY_WRITE(mac, BWN_PHY_CCK(0x5a), 0x0d80); in bwn_rf_init_bcm2050()
1348 BWN_PHY_WRITE(mac, BWN_PHY_CCK(0x59), 0xc810); in bwn_rf_init_bcm2050()
1349 BWN_PHY_WRITE(mac, BWN_PHY_CCK(0x58), 0x000d); in bwn_rf_init_bcm2050()
1350 if (phy->gmode || phy->rev >= 2) { in bwn_rf_init_bcm2050()
1351 BWN_PHY_WRITE(mac, BWN_PHY_RFOVERVAL, in bwn_rf_init_bcm2050()
1352 bwn_rf_2050_rfoverval(mac, in bwn_rf_init_bcm2050()
1355 BWN_PHY_WRITE(mac, BWN_PHY_PGACTL, 0xafb0); in bwn_rf_init_bcm2050()
1357 if (phy->gmode || phy->rev >= 2) { in bwn_rf_init_bcm2050()
1358 BWN_PHY_WRITE(mac, BWN_PHY_RFOVERVAL, in bwn_rf_init_bcm2050()
1359 bwn_rf_2050_rfoverval(mac, in bwn_rf_init_bcm2050()
1362 BWN_PHY_WRITE(mac, BWN_PHY_PGACTL, 0xefb0); in bwn_rf_init_bcm2050()
1364 if (phy->gmode || phy->rev >= 2) { in bwn_rf_init_bcm2050()
1365 BWN_PHY_WRITE(mac, BWN_PHY_RFOVERVAL, in bwn_rf_init_bcm2050()
1366 bwn_rf_2050_rfoverval(mac, in bwn_rf_init_bcm2050()
1369 BWN_PHY_WRITE(mac, BWN_PHY_PGACTL, 0xfff0); in bwn_rf_init_bcm2050()
1371 tmp2 += BWN_PHY_READ(mac, BWN_PHY_LO_LEAKAGE); in bwn_rf_init_bcm2050()
1372 BWN_PHY_WRITE(mac, BWN_PHY_CCK(0x58), 0); in bwn_rf_init_bcm2050()
1373 if (phy->gmode || phy->rev >= 2) { in bwn_rf_init_bcm2050()
1374 BWN_PHY_WRITE(mac, BWN_PHY_RFOVERVAL, in bwn_rf_init_bcm2050()
1375 bwn_rf_2050_rfoverval(mac, in bwn_rf_init_bcm2050()
1378 BWN_PHY_WRITE(mac, BWN_PHY_PGACTL, 0xafb0); in bwn_rf_init_bcm2050()
1386 BWN_PHY_WRITE(mac, BWN_PHY_PGACTL, pgactl); in bwn_rf_init_bcm2050()
1387 BWN_RF_WRITE(mac, 0x51, radio1); in bwn_rf_init_bcm2050()
1388 BWN_RF_WRITE(mac, 0x52, radio2); in bwn_rf_init_bcm2050()
1389 BWN_RF_WRITE(mac, 0x43, radio0); in bwn_rf_init_bcm2050()
1390 BWN_PHY_WRITE(mac, BWN_PHY_CCK(0x5a), cck0); in bwn_rf_init_bcm2050()
1391 BWN_PHY_WRITE(mac, BWN_PHY_CCK(0x59), cck1); in bwn_rf_init_bcm2050()
1392 BWN_PHY_WRITE(mac, BWN_PHY_CCK(0x58), cck2); in bwn_rf_init_bcm2050()
1393 BWN_WRITE_2(mac, 0x3e6, reg1); in bwn_rf_init_bcm2050()
1394 if (phy->analog != 0) in bwn_rf_init_bcm2050()
1395 BWN_WRITE_2(mac, 0x3f4, reg2); in bwn_rf_init_bcm2050()
1396 BWN_PHY_WRITE(mac, BWN_PHY_SYNCCTL, syncctl); in bwn_rf_init_bcm2050()
1397 bwn_spu_workaround(mac, phy->chan); in bwn_rf_init_bcm2050()
1398 if (phy->type == BWN_PHYTYPE_B) { in bwn_rf_init_bcm2050()
1399 BWN_PHY_WRITE(mac, BWN_PHY_CCK(0x30), cck3); in bwn_rf_init_bcm2050()
1400 BWN_WRITE_2(mac, 0x3ec, reg0); in bwn_rf_init_bcm2050()
1401 } else if (phy->gmode) { in bwn_rf_init_bcm2050()
1402 BWN_WRITE_2(mac, BWN_PHY_RADIO, in bwn_rf_init_bcm2050()
1403 BWN_READ_2(mac, BWN_PHY_RADIO) in bwn_rf_init_bcm2050()
1405 BWN_PHY_WRITE(mac, BWN_PHY_RFOVER, rfover); in bwn_rf_init_bcm2050()
1406 BWN_PHY_WRITE(mac, BWN_PHY_RFOVERVAL, rfoverval); in bwn_rf_init_bcm2050()
1407 BWN_PHY_WRITE(mac, BWN_PHY_ANALOGOVER, analogover); in bwn_rf_init_bcm2050()
1408 BWN_PHY_WRITE(mac, BWN_PHY_ANALOGOVERVAL, in bwn_rf_init_bcm2050()
1410 BWN_PHY_WRITE(mac, BWN_PHY_CRS0, crs0); in bwn_rf_init_bcm2050()
1411 BWN_PHY_WRITE(mac, BWN_PHY_CLASSCTL, classctl); in bwn_rf_init_bcm2050()
1413 BWN_PHY_WRITE(mac, BWN_PHY_LO_MASK, lomask); in bwn_rf_init_bcm2050()
1414 BWN_PHY_WRITE(mac, BWN_PHY_LO_CTL, loctl); in bwn_rf_init_bcm2050()
1422 bwn_phy_init_b6(struct bwn_mac *mac) in bwn_phy_init_b6() argument
1424 struct bwn_phy *phy = &mac->mac_phy; in bwn_phy_init_b6()
1425 struct bwn_phy_g *pg = &phy->phy_g; in bwn_phy_init_b6()
1426 struct bwn_softc *sc = mac->mac_sc; in bwn_phy_init_b6()
1430 KASSERT(!(phy->rf_rev == 6 || phy->rf_rev == 7), in bwn_phy_init_b6()
1433 BWN_PHY_WRITE(mac, 0x003e, 0x817a); in bwn_phy_init_b6()
1434 BWN_RF_WRITE(mac, 0x007a, BWN_RF_READ(mac, 0x007a) | 0x0058); in bwn_phy_init_b6()
1435 if (phy->rf_rev == 4 || phy->rf_rev == 5) { in bwn_phy_init_b6()
1436 BWN_RF_WRITE(mac, 0x51, 0x37); in bwn_phy_init_b6()
1437 BWN_RF_WRITE(mac, 0x52, 0x70); in bwn_phy_init_b6()
1438 BWN_RF_WRITE(mac, 0x53, 0xb3); in bwn_phy_init_b6()
1439 BWN_RF_WRITE(mac, 0x54, 0x9b); in bwn_phy_init_b6()
1440 BWN_RF_WRITE(mac, 0x5a, 0x88); in bwn_phy_init_b6()
1441 BWN_RF_WRITE(mac, 0x5b, 0x88); in bwn_phy_init_b6()
1442 BWN_RF_WRITE(mac, 0x5d, 0x88); in bwn_phy_init_b6()
1443 BWN_RF_WRITE(mac, 0x5e, 0x88); in bwn_phy_init_b6()
1444 BWN_RF_WRITE(mac, 0x7d, 0x88); in bwn_phy_init_b6()
1445 bwn_hf_write(mac, in bwn_phy_init_b6()
1446 bwn_hf_read(mac) | BWN_HF_TSSI_RESET_PSM_WORKAROUN); in bwn_phy_init_b6()
1448 if (phy->rf_rev == 8) { in bwn_phy_init_b6()
1449 BWN_RF_WRITE(mac, 0x51, 0); in bwn_phy_init_b6()
1450 BWN_RF_WRITE(mac, 0x52, 0x40); in bwn_phy_init_b6()
1451 BWN_RF_WRITE(mac, 0x53, 0xb7); in bwn_phy_init_b6()
1452 BWN_RF_WRITE(mac, 0x54, 0x98); in bwn_phy_init_b6()
1453 BWN_RF_WRITE(mac, 0x5a, 0x88); in bwn_phy_init_b6()
1454 BWN_RF_WRITE(mac, 0x5b, 0x6b); in bwn_phy_init_b6()
1455 BWN_RF_WRITE(mac, 0x5c, 0x0f); in bwn_phy_init_b6()
1456 if (sc->sc_board_info.board_flags & BHND_BFL_ALTIQ) { in bwn_phy_init_b6()
1457 BWN_RF_WRITE(mac, 0x5d, 0xfa); in bwn_phy_init_b6()
1458 BWN_RF_WRITE(mac, 0x5e, 0xd8); in bwn_phy_init_b6()
1460 BWN_RF_WRITE(mac, 0x5d, 0xf5); in bwn_phy_init_b6()
1461 BWN_RF_WRITE(mac, 0x5e, 0xb8); in bwn_phy_init_b6()
1463 BWN_RF_WRITE(mac, 0x0073, 0x0003); in bwn_phy_init_b6()
1464 BWN_RF_WRITE(mac, 0x007d, 0x00a8); in bwn_phy_init_b6()
1465 BWN_RF_WRITE(mac, 0x007c, 0x0001); in bwn_phy_init_b6()
1466 BWN_RF_WRITE(mac, 0x007e, 0x0008); in bwn_phy_init_b6()
1469 BWN_PHY_WRITE(mac, offset, val); in bwn_phy_init_b6()
1470 val -= 0x0202; in bwn_phy_init_b6()
1473 BWN_PHY_WRITE(mac, offset, val); in bwn_phy_init_b6()
1474 val -= 0x0202; in bwn_phy_init_b6()
1477 BWN_PHY_WRITE(mac, offset, (val & 0x3f3f)); in bwn_phy_init_b6()
1480 if (phy->type == BWN_PHYTYPE_G) { in bwn_phy_init_b6()
1481 BWN_RF_SET(mac, 0x007a, 0x0020); in bwn_phy_init_b6()
1482 BWN_RF_SET(mac, 0x0051, 0x0004); in bwn_phy_init_b6()
1483 BWN_PHY_SET(mac, 0x0802, 0x0100); in bwn_phy_init_b6()
1484 BWN_PHY_SET(mac, 0x042b, 0x2000); in bwn_phy_init_b6()
1485 BWN_PHY_WRITE(mac, 0x5b, 0); in bwn_phy_init_b6()
1486 BWN_PHY_WRITE(mac, 0x5c, 0); in bwn_phy_init_b6()
1489 old_channel = phy->chan; in bwn_phy_init_b6()
1490 bwn_phy_g_switch_chan(mac, (old_channel >= 8) ? 1 : 13, 0); in bwn_phy_init_b6()
1492 BWN_RF_WRITE(mac, 0x0050, 0x0020); in bwn_phy_init_b6()
1493 BWN_RF_WRITE(mac, 0x0050, 0x0023); in bwn_phy_init_b6()
1495 if (phy->rf_rev < 6 || phy->rf_rev == 8) { in bwn_phy_init_b6()
1496 BWN_RF_WRITE(mac, 0x7c, BWN_RF_READ(mac, 0x7c) | 0x0002); in bwn_phy_init_b6()
1497 BWN_RF_WRITE(mac, 0x50, 0x20); in bwn_phy_init_b6()
1499 if (phy->rf_rev <= 2) { in bwn_phy_init_b6()
1500 BWN_RF_WRITE(mac, 0x7c, 0x20); in bwn_phy_init_b6()
1501 BWN_RF_WRITE(mac, 0x5a, 0x70); in bwn_phy_init_b6()
1502 BWN_RF_WRITE(mac, 0x5b, 0x7b); in bwn_phy_init_b6()
1503 BWN_RF_WRITE(mac, 0x5c, 0xb0); in bwn_phy_init_b6()
1505 BWN_RF_SETMASK(mac, 0x007a, 0x00f8, 0x0007); in bwn_phy_init_b6()
1507 bwn_phy_g_switch_chan(mac, old_channel, 0); in bwn_phy_init_b6()
1509 BWN_PHY_WRITE(mac, 0x0014, 0x0200); in bwn_phy_init_b6()
1510 if (phy->rf_rev >= 6) in bwn_phy_init_b6()
1511 BWN_PHY_WRITE(mac, 0x2a, 0x88c2); in bwn_phy_init_b6()
1513 BWN_PHY_WRITE(mac, 0x2a, 0x8ac0); in bwn_phy_init_b6()
1514 BWN_PHY_WRITE(mac, 0x0038, 0x0668); in bwn_phy_init_b6()
1515 bwn_phy_g_set_txpwr_sub(mac, &pg->pg_bbatt, &pg->pg_rfatt, in bwn_phy_init_b6()
1516 pg->pg_txctl); in bwn_phy_init_b6()
1517 if (phy->rf_rev <= 5) in bwn_phy_init_b6()
1518 BWN_PHY_SETMASK(mac, 0x5d, 0xff80, 0x0003); in bwn_phy_init_b6()
1519 if (phy->rf_rev <= 2) in bwn_phy_init_b6()
1520 BWN_RF_WRITE(mac, 0x005d, 0x000d); in bwn_phy_init_b6()
1522 if (phy->analog == 4) { in bwn_phy_init_b6()
1523 BWN_WRITE_2(mac, 0x3e4, 9); in bwn_phy_init_b6()
1524 BWN_PHY_MASK(mac, 0x61, 0x0fff); in bwn_phy_init_b6()
1526 BWN_PHY_SETMASK(mac, 0x0002, 0xffc0, 0x0004); in bwn_phy_init_b6()
1527 if (phy->type == BWN_PHYTYPE_B) in bwn_phy_init_b6()
1529 else if (phy->type == BWN_PHYTYPE_G) in bwn_phy_init_b6()
1530 BWN_WRITE_2(mac, 0x03e6, 0x0); in bwn_phy_init_b6()
1534 bwn_phy_init_a(struct bwn_mac *mac) in bwn_phy_init_a() argument
1536 struct bwn_phy *phy = &mac->mac_phy; in bwn_phy_init_a()
1537 struct bwn_softc *sc = mac->mac_sc; in bwn_phy_init_a()
1539 KASSERT(phy->type == BWN_PHYTYPE_A || phy->type == BWN_PHYTYPE_G, in bwn_phy_init_a()
1542 if (phy->rev >= 6) { in bwn_phy_init_a()
1543 if (phy->type == BWN_PHYTYPE_A) in bwn_phy_init_a()
1544 BWN_PHY_MASK(mac, BWN_PHY_OFDM(0x1b), ~0x1000); in bwn_phy_init_a()
1545 if (BWN_PHY_READ(mac, BWN_PHY_ENCORE) & BWN_PHY_ENCORE_EN) in bwn_phy_init_a()
1546 BWN_PHY_SET(mac, BWN_PHY_ENCORE, 0x0010); in bwn_phy_init_a()
1548 BWN_PHY_MASK(mac, BWN_PHY_ENCORE, ~0x1010); in bwn_phy_init_a()
1551 bwn_wa_init(mac); in bwn_phy_init_a()
1553 if (phy->type == BWN_PHYTYPE_G && in bwn_phy_init_a()
1554 (sc->sc_board_info.board_flags & BHND_BFL_PACTRL)) in bwn_phy_init_a()
1555 BWN_PHY_SETMASK(mac, BWN_PHY_OFDM(0x6e), 0xe000, 0x3cf); in bwn_phy_init_a()
1559 bwn_wa_write_noisescale(struct bwn_mac *mac, const uint16_t *nst) in bwn_wa_write_noisescale() argument
1564 bwn_ofdmtab_write_2(mac, BWN_OFDMTAB_NOISESCALE, i, nst[i]); in bwn_wa_write_noisescale()
1568 bwn_wa_agc(struct bwn_mac *mac) in bwn_wa_agc() argument
1570 struct bwn_phy *phy = &mac->mac_phy; in bwn_wa_agc()
1572 if (phy->rev == 1) { in bwn_wa_agc()
1573 bwn_ofdmtab_write_2(mac, BWN_OFDMTAB_AGC1_R1, 0, 254); in bwn_wa_agc()
1574 bwn_ofdmtab_write_2(mac, BWN_OFDMTAB_AGC1_R1, 1, 13); in bwn_wa_agc()
1575 bwn_ofdmtab_write_2(mac, BWN_OFDMTAB_AGC1_R1, 2, 19); in bwn_wa_agc()
1576 bwn_ofdmtab_write_2(mac, BWN_OFDMTAB_AGC1_R1, 3, 25); in bwn_wa_agc()
1577 bwn_ofdmtab_write_2(mac, BWN_OFDMTAB_AGC2, 0, 0x2710); in bwn_wa_agc()
1578 bwn_ofdmtab_write_2(mac, BWN_OFDMTAB_AGC2, 1, 0x9b83); in bwn_wa_agc()
1579 bwn_ofdmtab_write_2(mac, BWN_OFDMTAB_AGC2, 2, 0x9b83); in bwn_wa_agc()
1580 bwn_ofdmtab_write_2(mac, BWN_OFDMTAB_AGC2, 3, 0x0f8d); in bwn_wa_agc()
1581 BWN_PHY_WRITE(mac, BWN_PHY_LMS, 4); in bwn_wa_agc()
1583 bwn_ofdmtab_write_2(mac, BWN_OFDMTAB_AGC1, 0, 254); in bwn_wa_agc()
1584 bwn_ofdmtab_write_2(mac, BWN_OFDMTAB_AGC1, 1, 13); in bwn_wa_agc()
1585 bwn_ofdmtab_write_2(mac, BWN_OFDMTAB_AGC1, 2, 19); in bwn_wa_agc()
1586 bwn_ofdmtab_write_2(mac, BWN_OFDMTAB_AGC1, 3, 25); in bwn_wa_agc()
1589 BWN_PHY_SETMASK(mac, BWN_PHY_CCKSHIFTBITS_WA, (uint16_t)~0xff00, in bwn_wa_agc()
1591 BWN_PHY_SETMASK(mac, BWN_PHY_OFDM(0x1a), ~0x007f, 0x000f); in bwn_wa_agc()
1592 BWN_PHY_SETMASK(mac, BWN_PHY_OFDM(0x1a), ~0x3f80, 0x2b80); in bwn_wa_agc()
1593 BWN_PHY_SETMASK(mac, BWN_PHY_ANTWRSETT, 0xf0ff, 0x0300); in bwn_wa_agc()
1594 BWN_RF_SET(mac, 0x7a, 0x0008); in bwn_wa_agc()
1595 BWN_PHY_SETMASK(mac, BWN_PHY_N1P1GAIN, ~0x000f, 0x0008); in bwn_wa_agc()
1596 BWN_PHY_SETMASK(mac, BWN_PHY_P1P2GAIN, ~0x0f00, 0x0600); in bwn_wa_agc()
1597 BWN_PHY_SETMASK(mac, BWN_PHY_N1N2GAIN, ~0x0f00, 0x0700); in bwn_wa_agc()
1598 BWN_PHY_SETMASK(mac, BWN_PHY_N1P1GAIN, ~0x0f00, 0x0100); in bwn_wa_agc()
1599 if (phy->rev == 1) in bwn_wa_agc()
1600 BWN_PHY_SETMASK(mac, BWN_PHY_N1N2GAIN, ~0x000f, 0x0007); in bwn_wa_agc()
1601 BWN_PHY_SETMASK(mac, BWN_PHY_OFDM(0x88), ~0x00ff, 0x001c); in bwn_wa_agc()
1602 BWN_PHY_SETMASK(mac, BWN_PHY_OFDM(0x88), ~0x3f00, 0x0200); in bwn_wa_agc()
1603 BWN_PHY_SETMASK(mac, BWN_PHY_OFDM(0x96), ~0x00ff, 0x001c); in bwn_wa_agc()
1604 BWN_PHY_SETMASK(mac, BWN_PHY_OFDM(0x89), ~0x00ff, 0x0020); in bwn_wa_agc()
1605 BWN_PHY_SETMASK(mac, BWN_PHY_OFDM(0x89), ~0x3f00, 0x0200); in bwn_wa_agc()
1606 BWN_PHY_SETMASK(mac, BWN_PHY_OFDM(0x82), ~0x00ff, 0x002e); in bwn_wa_agc()
1607 BWN_PHY_SETMASK(mac, BWN_PHY_OFDM(0x96), (uint16_t)~0xff00, 0x1a00); in bwn_wa_agc()
1608 BWN_PHY_SETMASK(mac, BWN_PHY_OFDM(0x81), ~0x00ff, 0x0028); in bwn_wa_agc()
1609 BWN_PHY_SETMASK(mac, BWN_PHY_OFDM(0x81), (uint16_t)~0xff00, 0x2c00); in bwn_wa_agc()
1610 if (phy->rev == 1) { in bwn_wa_agc()
1611 BWN_PHY_WRITE(mac, BWN_PHY_PEAK_COUNT, 0x092b); in bwn_wa_agc()
1612 BWN_PHY_SETMASK(mac, BWN_PHY_OFDM(0x1b), ~0x001e, 0x0002); in bwn_wa_agc()
1614 BWN_PHY_MASK(mac, BWN_PHY_OFDM(0x1b), ~0x001e); in bwn_wa_agc()
1615 BWN_PHY_WRITE(mac, BWN_PHY_OFDM(0x1f), 0x287a); in bwn_wa_agc()
1616 BWN_PHY_SETMASK(mac, BWN_PHY_LPFGAINCTL, ~0x000f, 0x0004); in bwn_wa_agc()
1617 if (phy->rev >= 6) { in bwn_wa_agc()
1618 BWN_PHY_WRITE(mac, BWN_PHY_OFDM(0x22), 0x287a); in bwn_wa_agc()
1619 BWN_PHY_SETMASK(mac, BWN_PHY_LPFGAINCTL, in bwn_wa_agc()
1623 BWN_PHY_SETMASK(mac, BWN_PHY_DIVSRCHIDX, 0x8080, 0x7874); in bwn_wa_agc()
1624 BWN_PHY_WRITE(mac, BWN_PHY_OFDM(0x8e), 0x1c00); in bwn_wa_agc()
1625 if (phy->rev == 1) { in bwn_wa_agc()
1626 BWN_PHY_SETMASK(mac, BWN_PHY_DIVP1P2GAIN, ~0x0f00, 0x0600); in bwn_wa_agc()
1627 BWN_PHY_WRITE(mac, BWN_PHY_OFDM(0x8b), 0x005e); in bwn_wa_agc()
1628 BWN_PHY_SETMASK(mac, BWN_PHY_ANTWRSETT, ~0x00ff, 0x001e); in bwn_wa_agc()
1629 BWN_PHY_WRITE(mac, BWN_PHY_OFDM(0x8d), 0x0002); in bwn_wa_agc()
1630 bwn_ofdmtab_write_2(mac, BWN_OFDMTAB_AGC3_R1, 0, 0); in bwn_wa_agc()
1631 bwn_ofdmtab_write_2(mac, BWN_OFDMTAB_AGC3_R1, 1, 7); in bwn_wa_agc()
1632 bwn_ofdmtab_write_2(mac, BWN_OFDMTAB_AGC3_R1, 2, 16); in bwn_wa_agc()
1633 bwn_ofdmtab_write_2(mac, BWN_OFDMTAB_AGC3_R1, 3, 28); in bwn_wa_agc()
1635 bwn_ofdmtab_write_2(mac, BWN_OFDMTAB_AGC3, 0, 0); in bwn_wa_agc()
1636 bwn_ofdmtab_write_2(mac, BWN_OFDMTAB_AGC3, 1, 7); in bwn_wa_agc()
1637 bwn_ofdmtab_write_2(mac, BWN_OFDMTAB_AGC3, 2, 16); in bwn_wa_agc()
1638 bwn_ofdmtab_write_2(mac, BWN_OFDMTAB_AGC3, 3, 28); in bwn_wa_agc()
1640 if (phy->rev >= 6) { in bwn_wa_agc()
1641 BWN_PHY_MASK(mac, BWN_PHY_OFDM(0x26), ~0x0003); in bwn_wa_agc()
1642 BWN_PHY_MASK(mac, BWN_PHY_OFDM(0x26), ~0x1000); in bwn_wa_agc()
1644 BWN_PHY_READ(mac, BWN_PHY_VERSION_OFDM); in bwn_wa_agc()
1648 bwn_wa_grev1(struct bwn_mac *mac) in bwn_wa_grev1() argument
1650 struct bwn_phy *phy = &mac->mac_phy; in bwn_wa_grev1()
1656 KASSERT(phy->type == BWN_PHYTYPE_G, ("%s fail", __func__)); in bwn_wa_grev1()
1659 if (phy->rev == 1) { in bwn_wa_grev1()
1660 BWN_PHY_WRITE(mac, BWN_PHY_CRSTHRES1_R1, 0x4f19); in bwn_wa_grev1()
1661 } else if (phy->rev == 2) { in bwn_wa_grev1()
1662 BWN_PHY_WRITE(mac, BWN_PHY_CRSTHRES1, 0x1861); in bwn_wa_grev1()
1663 BWN_PHY_WRITE(mac, BWN_PHY_CRSTHRES2, 0x0271); in bwn_wa_grev1()
1664 BWN_PHY_SET(mac, BWN_PHY_ANTDWELL, 0x0800); in bwn_wa_grev1()
1666 BWN_PHY_WRITE(mac, BWN_PHY_CRSTHRES1, 0x0098); in bwn_wa_grev1()
1667 BWN_PHY_WRITE(mac, BWN_PHY_CRSTHRES2, 0x0070); in bwn_wa_grev1()
1668 BWN_PHY_WRITE(mac, BWN_PHY_OFDM(0xc9), 0x0080); in bwn_wa_grev1()
1669 BWN_PHY_SET(mac, BWN_PHY_ANTDWELL, 0x0800); in bwn_wa_grev1()
1671 BWN_PHY_SETMASK(mac, BWN_PHY_CRS0, ~0x03c0, 0xd000); in bwn_wa_grev1()
1672 BWN_PHY_WRITE(mac, BWN_PHY_OFDM(0x2c), 0x005a); in bwn_wa_grev1()
1673 BWN_PHY_WRITE(mac, BWN_PHY_CCKSHIFTBITS, 0x0026); in bwn_wa_grev1()
1675 /* XXX support PHY-A??? */ in bwn_wa_grev1()
1677 bwn_ofdmtab_write_2(mac, BWN_OFDMTAB_DACRFPABB, i, in bwn_wa_grev1()
1680 /* XXX support PHY-A??? */ in bwn_wa_grev1()
1681 if (phy->rev == 1) in bwn_wa_grev1()
1683 bwn_ofdmtab_write_2(mac, BWN_OFDMTAB_AGC2, i, in bwn_wa_grev1()
1687 bwn_ofdmtab_write_2(mac, BWN_OFDMTAB_AGC2, i, in bwn_wa_grev1()
1691 bwn_ofdmtab_write_4(mac, BWN_OFDMTAB_ROTOR, i, in bwn_wa_grev1()
1694 /* XXX support PHY-A??? */ in bwn_wa_grev1()
1695 if (phy->rev >= 6) { in bwn_wa_grev1()
1696 if (BWN_PHY_READ(mac, BWN_PHY_ENCORE) & in bwn_wa_grev1()
1698 bwn_wa_write_noisescale(mac, bwn_tab_noisescale_g3); in bwn_wa_grev1()
1700 bwn_wa_write_noisescale(mac, bwn_tab_noisescale_g2); in bwn_wa_grev1()
1702 bwn_wa_write_noisescale(mac, bwn_tab_noisescale_g1); in bwn_wa_grev1()
1705 bwn_ofdmtab_write_4(mac, BWN_OFDMTAB_ADVRETARD, i, in bwn_wa_grev1()
1708 if (phy->rev == 1) { in bwn_wa_grev1()
1710 bwn_ofdmtab_write_2(mac, BWN_OFDMTAB_WRSSI_R1, in bwn_wa_grev1()
1714 bwn_ofdmtab_write_2(mac, BWN_OFDMTAB_WRSSI, i, 0x0820); in bwn_wa_grev1()
1717 bwn_wa_agc(mac); in bwn_wa_grev1()
1721 bwn_wa_grev26789(struct bwn_mac *mac) in bwn_wa_grev26789() argument
1723 struct bwn_phy *phy = &mac->mac_phy; in bwn_wa_grev26789()
1728 KASSERT(phy->type == BWN_PHYTYPE_G, ("%s fail", __func__)); in bwn_wa_grev26789()
1730 bwn_gtab_write(mac, BWN_GTAB_ORIGTR, 0, 0xc480); in bwn_wa_grev26789()
1733 if (phy->rev == 1) in bwn_wa_grev26789()
1734 BWN_PHY_WRITE(mac, BWN_PHY_CRSTHRES1_R1, 0x4f19); in bwn_wa_grev26789()
1735 else if (phy->rev == 2) { in bwn_wa_grev26789()
1736 BWN_PHY_WRITE(mac, BWN_PHY_CRSTHRES1, 0x1861); in bwn_wa_grev26789()
1737 BWN_PHY_WRITE(mac, BWN_PHY_CRSTHRES2, 0x0271); in bwn_wa_grev26789()
1738 BWN_PHY_SET(mac, BWN_PHY_ANTDWELL, 0x0800); in bwn_wa_grev26789()
1740 BWN_PHY_WRITE(mac, BWN_PHY_CRSTHRES1, 0x0098); in bwn_wa_grev26789()
1741 BWN_PHY_WRITE(mac, BWN_PHY_CRSTHRES2, 0x0070); in bwn_wa_grev26789()
1742 BWN_PHY_WRITE(mac, BWN_PHY_OFDM(0xc9), 0x0080); in bwn_wa_grev26789()
1743 BWN_PHY_SET(mac, BWN_PHY_ANTDWELL, 0x0800); in bwn_wa_grev26789()
1747 bwn_ofdmtab_write_2(mac, BWN_OFDMTAB_RSSI, i, i); in bwn_wa_grev26789()
1749 /* XXX support PHY-A??? */ in bwn_wa_grev26789()
1750 if (phy->rev == 1) in bwn_wa_grev26789()
1752 bwn_ofdmtab_write_2(mac, BWN_OFDMTAB_AGC2, i, in bwn_wa_grev26789()
1756 bwn_ofdmtab_write_2(mac, BWN_OFDMTAB_AGC2, i, in bwn_wa_grev26789()
1759 /* XXX support PHY-A??? */ in bwn_wa_grev26789()
1760 if (phy->rev >= 6) { in bwn_wa_grev26789()
1761 if (BWN_PHY_READ(mac, BWN_PHY_ENCORE) & in bwn_wa_grev26789()
1763 bwn_wa_write_noisescale(mac, bwn_tab_noisescale_g3); in bwn_wa_grev26789()
1765 bwn_wa_write_noisescale(mac, bwn_tab_noisescale_g2); in bwn_wa_grev26789()
1767 bwn_wa_write_noisescale(mac, bwn_tab_noisescale_g1); in bwn_wa_grev26789()
1770 bwn_ofdmtab_write_2(mac, BWN_OFDMTAB_MINSIGSQ, i, in bwn_wa_grev26789()
1773 if (phy->rev == 1) { in bwn_wa_grev26789()
1775 bwn_ofdmtab_write_2(mac, BWN_OFDMTAB_WRSSI_R1, i, in bwn_wa_grev26789()
1779 bwn_ofdmtab_write_2(mac, BWN_OFDMTAB_WRSSI, i, 0x0820); in bwn_wa_grev26789()
1782 bwn_wa_agc(mac); in bwn_wa_grev26789()
1784 ofdmrev = BWN_PHY_READ(mac, BWN_PHY_VERSION_OFDM) & BWN_PHYVER_VERSION; in bwn_wa_grev26789()
1786 if (phy->type == BWN_PHYTYPE_A) in bwn_wa_grev26789()
1787 BWN_PHY_WRITE(mac, BWN_PHY_PWRDOWN, 0x1808); in bwn_wa_grev26789()
1789 BWN_PHY_WRITE(mac, BWN_PHY_PWRDOWN, 0x1000); in bwn_wa_grev26789()
1791 bwn_ofdmtab_write_2(mac, BWN_OFDMTAB_DAC, 3, 0x1044); in bwn_wa_grev26789()
1792 bwn_ofdmtab_write_2(mac, BWN_OFDMTAB_DAC, 4, 0x7201); in bwn_wa_grev26789()
1793 bwn_ofdmtab_write_2(mac, BWN_OFDMTAB_DAC, 6, 0x0040); in bwn_wa_grev26789()
1796 bwn_ofdmtab_write_2(mac, BWN_OFDMTAB_UNKNOWN_0F, 2, 15); in bwn_wa_grev26789()
1797 bwn_ofdmtab_write_2(mac, BWN_OFDMTAB_UNKNOWN_0F, 3, 20); in bwn_wa_grev26789()
1801 bwn_wa_init(struct bwn_mac *mac) in bwn_wa_init() argument
1803 struct bwn_phy *phy = &mac->mac_phy; in bwn_wa_init()
1804 struct bwn_softc *sc = mac->mac_sc; in bwn_wa_init()
1806 KASSERT(phy->type == BWN_PHYTYPE_G, ("%s fail", __func__)); in bwn_wa_init()
1808 switch (phy->rev) { in bwn_wa_init()
1810 bwn_wa_grev1(mac); in bwn_wa_init()
1817 bwn_wa_grev26789(mac); in bwn_wa_init()
1823 if (sc->sc_board_info.board_vendor != PCI_VENDOR_BROADCOM || in bwn_wa_init()
1824 sc->sc_board_info.board_type != BHND_BOARD_BU4306 || in bwn_wa_init()
1825 sc->sc_board_info.board_rev != 0x17) { in bwn_wa_init()
1826 if (phy->rev < 2) { in bwn_wa_init()
1827 bwn_ofdmtab_write_2(mac, BWN_OFDMTAB_GAINX_R1, 1, in bwn_wa_init()
1829 bwn_ofdmtab_write_2(mac, BWN_OFDMTAB_GAINX_R1, 2, in bwn_wa_init()
1832 bwn_ofdmtab_write_2(mac, BWN_OFDMTAB_GAINX, 1, 0x0002); in bwn_wa_init()
1833 bwn_ofdmtab_write_2(mac, BWN_OFDMTAB_GAINX, 2, 0x0001); in bwn_wa_init()
1834 if ((sc->sc_board_info.board_flags & in bwn_wa_init()
1836 (phy->rev >= 7)) { in bwn_wa_init()
1837 BWN_PHY_MASK(mac, BWN_PHY_EXTG(0x11), 0xf7ff); in bwn_wa_init()
1838 bwn_ofdmtab_write_2(mac, BWN_OFDMTAB_GAINX, in bwn_wa_init()
1840 bwn_ofdmtab_write_2(mac, BWN_OFDMTAB_GAINX, in bwn_wa_init()
1842 bwn_ofdmtab_write_2(mac, BWN_OFDMTAB_GAINX, in bwn_wa_init()
1844 bwn_ofdmtab_write_2(mac, BWN_OFDMTAB_GAINX, in bwn_wa_init()
1846 bwn_ofdmtab_write_2(mac, BWN_OFDMTAB_GAINX, in bwn_wa_init()
1848 bwn_ofdmtab_write_2(mac, BWN_OFDMTAB_GAINX, in bwn_wa_init()
1853 if (sc->sc_board_info.board_flags & BHND_BFL_FEM) { in bwn_wa_init()
1854 BWN_PHY_WRITE(mac, BWN_PHY_GTABCTL, 0x3120); in bwn_wa_init()
1855 BWN_PHY_WRITE(mac, BWN_PHY_GTABDATA, 0xc480); in bwn_wa_init()
1858 bwn_ofdmtab_write_2(mac, BWN_OFDMTAB_UNKNOWN_11, 0, 0); in bwn_wa_init()
1859 bwn_ofdmtab_write_2(mac, BWN_OFDMTAB_UNKNOWN_11, 1, 0); in bwn_wa_init()
1863 bwn_ofdmtab_write_2(struct bwn_mac *mac, uint16_t table, uint16_t offset, in bwn_ofdmtab_write_2() argument
1866 struct bwn_phy_g *pg = &mac->mac_phy.phy_g; in bwn_ofdmtab_write_2()
1870 if ((pg->pg_ofdmtab_dir != BWN_OFDMTAB_DIR_WRITE) || in bwn_ofdmtab_write_2()
1871 (addr - 1 != pg->pg_ofdmtab_addr)) { in bwn_ofdmtab_write_2()
1872 BWN_PHY_WRITE(mac, BWN_PHY_OTABLECTL, addr); in bwn_ofdmtab_write_2()
1873 pg->pg_ofdmtab_dir = BWN_OFDMTAB_DIR_WRITE; in bwn_ofdmtab_write_2()
1875 pg->pg_ofdmtab_addr = addr; in bwn_ofdmtab_write_2()
1876 BWN_PHY_WRITE(mac, BWN_PHY_OTABLEI, value); in bwn_ofdmtab_write_2()
1880 bwn_ofdmtab_write_4(struct bwn_mac *mac, uint16_t table, uint16_t offset, in bwn_ofdmtab_write_4() argument
1883 struct bwn_phy_g *pg = &mac->mac_phy.phy_g; in bwn_ofdmtab_write_4()
1887 if ((pg->pg_ofdmtab_dir != BWN_OFDMTAB_DIR_WRITE) || in bwn_ofdmtab_write_4()
1888 (addr - 1 != pg->pg_ofdmtab_addr)) { in bwn_ofdmtab_write_4()
1889 BWN_PHY_WRITE(mac, BWN_PHY_OTABLECTL, addr); in bwn_ofdmtab_write_4()
1890 pg->pg_ofdmtab_dir = BWN_OFDMTAB_DIR_WRITE; in bwn_ofdmtab_write_4()
1892 pg->pg_ofdmtab_addr = addr; in bwn_ofdmtab_write_4()
1894 BWN_PHY_WRITE(mac, BWN_PHY_OTABLEI, value); in bwn_ofdmtab_write_4()
1895 BWN_PHY_WRITE(mac, BWN_PHY_OTABLEQ, (value >> 16)); in bwn_ofdmtab_write_4()
1899 bwn_gtab_write(struct bwn_mac *mac, uint16_t table, uint16_t offset, in bwn_gtab_write() argument
1903 BWN_PHY_WRITE(mac, BWN_PHY_GTABCTL, table + offset); in bwn_gtab_write()
1904 BWN_PHY_WRITE(mac, BWN_PHY_GTABDATA, value); in bwn_gtab_write()
1908 bwn_lo_write(struct bwn_mac *mac, struct bwn_loctl *ctl) in bwn_lo_write() argument
1912 KASSERT(mac->mac_phy.type == BWN_PHYTYPE_G, in bwn_lo_write()
1915 value = (uint8_t) (ctl->q); in bwn_lo_write()
1916 value |= ((uint8_t) (ctl->i)) << 8; in bwn_lo_write()
1917 BWN_PHY_WRITE(mac, BWN_PHY_LO_CTL, value); in bwn_lo_write()
1921 bwn_lo_calcfeed(struct bwn_mac *mac, in bwn_lo_calcfeed() argument
1924 struct bwn_phy *phy = &mac->mac_phy; in bwn_lo_calcfeed()
1925 struct bwn_softc *sc = mac->mac_sc; in bwn_lo_calcfeed()
1929 if (phy->gmode) { in bwn_lo_calcfeed()
1941 if ((sc->sc_board_info.board_flags & BHND_BFL_EXTLNA) && in bwn_lo_calcfeed()
1942 phy->rev > 6) in bwn_lo_calcfeed()
1945 BWN_PHY_WRITE(mac, BWN_PHY_PGACTL, 0xe300); in bwn_lo_calcfeed()
1946 BWN_PHY_WRITE(mac, BWN_PHY_RFOVERVAL, rfover); in bwn_lo_calcfeed()
1949 BWN_PHY_WRITE(mac, BWN_PHY_RFOVERVAL, rfover); in bwn_lo_calcfeed()
1952 BWN_PHY_WRITE(mac, BWN_PHY_RFOVERVAL, rfover); in bwn_lo_calcfeed()
1954 BWN_PHY_WRITE(mac, BWN_PHY_PGACTL, 0xf300); in bwn_lo_calcfeed()
1957 BWN_PHY_WRITE(mac, BWN_PHY_PGACTL, pga); in bwn_lo_calcfeed()
1960 BWN_PHY_WRITE(mac, BWN_PHY_PGACTL, pga); in bwn_lo_calcfeed()
1963 BWN_PHY_WRITE(mac, BWN_PHY_PGACTL, pga); in bwn_lo_calcfeed()
1966 feedthrough = BWN_PHY_READ(mac, BWN_PHY_LO_LEAKAGE); in bwn_lo_calcfeed()
1972 bwn_lo_txctl_regtable(struct bwn_mac *mac, in bwn_lo_txctl_regtable() argument
1975 struct bwn_phy *phy = &mac->mac_phy; in bwn_lo_txctl_regtable()
1978 if (phy->type == BWN_PHYTYPE_B) { in bwn_lo_txctl_regtable()
1980 if (phy->rf_rev <= 5) { in bwn_lo_txctl_regtable()
1988 if (phy->rev >= 2 && phy->rf_rev == 8) { in bwn_lo_txctl_regtable()
2007 bwn_lo_measure_txctl_values(struct bwn_mac *mac) in bwn_lo_measure_txctl_values() argument
2009 struct bwn_phy *phy = &mac->mac_phy; in bwn_lo_measure_txctl_values()
2010 struct bwn_phy_g *pg = &phy->phy_g; in bwn_lo_measure_txctl_values()
2011 struct bwn_txpwr_loctl *lo = &pg->pg_loctl; in bwn_lo_measure_txctl_values()
2032 lb_gain = pg->pg_max_lb_gain / 2; in bwn_lo_measure_txctl_values()
2035 pga = abs(10 - lb_gain) / 6; in bwn_lo_measure_txctl_values()
2043 if ((phy->rev >= 2) && in bwn_lo_measure_txctl_values()
2044 (phy->rf_ver == 0x2050) && (phy->rf_rev == 8)) in bwn_lo_measure_txctl_values()
2047 if ((10 - lb_gain) < cmp_val) in bwn_lo_measure_txctl_values()
2048 tmp = (10 - lb_gain); in bwn_lo_measure_txctl_values()
2061 BWN_RF_SETMASK(mac, 0x43, 0xfff0, rf_pctl_reg); in bwn_lo_measure_txctl_values()
2062 bwn_phy_g_set_bbatt(mac, 2); in bwn_lo_measure_txctl_values()
2064 reg = bwn_lo_txctl_regtable(mac, &mask, NULL); in bwn_lo_measure_txctl_values()
2066 BWN_RF_MASK(mac, reg, mask); in bwn_lo_measure_txctl_values()
2076 BWN_RF_SETMASK(mac, 0x52, 0xff0f, tx_magn); in bwn_lo_measure_txctl_values()
2079 BWN_RF_SETMASK(mac, 0x52, 0xfff0, tx_bias); in bwn_lo_measure_txctl_values()
2080 feedthrough = bwn_lo_calcfeed(mac, 0, pga, in bwn_lo_measure_txctl_values()
2083 lo->tx_bias = tx_bias; in bwn_lo_measure_txctl_values()
2084 lo->tx_magn = tx_magn; in bwn_lo_measure_txctl_values()
2087 if (lo->tx_bias == 0) in bwn_lo_measure_txctl_values()
2090 BWN_RF_WRITE(mac, 0x52, in bwn_lo_measure_txctl_values()
2091 (BWN_RF_READ(mac, 0x52) in bwn_lo_measure_txctl_values()
2092 & 0xff00) | lo->tx_bias | lo-> in bwn_lo_measure_txctl_values()
2096 lo->tx_magn = 0; in bwn_lo_measure_txctl_values()
2097 lo->tx_bias = 0; in bwn_lo_measure_txctl_values()
2098 BWN_RF_MASK(mac, 0x52, 0xfff0); in bwn_lo_measure_txctl_values()
2101 BWN_GETTIME(lo->txctl_measured_time); in bwn_lo_measure_txctl_values()
2105 bwn_lo_get_powervector(struct bwn_mac *mac) in bwn_lo_get_powervector() argument
2107 struct bwn_phy *phy = &mac->mac_phy; in bwn_lo_get_powervector()
2108 struct bwn_phy_g *pg = &phy->phy_g; in bwn_lo_get_powervector()
2109 struct bwn_txpwr_loctl *lo = &pg->pg_loctl; in bwn_lo_get_powervector()
2115 tmp = bwn_shm_read_2(mac, BWN_SHARED, 0x310 + i); in bwn_lo_get_powervector()
2117 bwn_shm_write_2(mac, BWN_SHARED, 0x310 + i, 0); in bwn_lo_get_powervector()
2120 lo->power_vector = power_vector; in bwn_lo_get_powervector()
2122 BWN_GETTIME(lo->pwr_vec_read_time); in bwn_lo_get_powervector()
2126 bwn_lo_measure_gain_values(struct bwn_mac *mac, int16_t max_rx_gain, in bwn_lo_measure_gain_values() argument
2129 struct bwn_phy *phy = &mac->mac_phy; in bwn_lo_measure_gain_values()
2130 struct bwn_phy_g *pg = &phy->phy_g; in bwn_lo_measure_gain_values()
2140 trsw_rx_gain = pg->pg_trsw_rx_gain / 2; in bwn_lo_measure_gain_values()
2142 trsw_rx_gain = max_rx_gain - trsw_rx_gain; in bwn_lo_measure_gain_values()
2147 pg->pg_lna_lod_gain = 0; in bwn_lo_measure_gain_values()
2149 pg->pg_lna_lod_gain = 1; in bwn_lo_measure_gain_values()
2150 trsw_rx_gain -= 8; in bwn_lo_measure_gain_values()
2153 pg->pg_pga_gain = trsw_rx_gain / 3; in bwn_lo_measure_gain_values()
2154 if (pg->pg_pga_gain >= 5) { in bwn_lo_measure_gain_values()
2155 pg->pg_pga_gain -= 5; in bwn_lo_measure_gain_values()
2156 pg->pg_lna_gain = 2; in bwn_lo_measure_gain_values()
2158 pg->pg_lna_gain = 0; in bwn_lo_measure_gain_values()
2160 pg->pg_lna_gain = 0; in bwn_lo_measure_gain_values()
2161 pg->pg_trsw_rx_gain = 0x20; in bwn_lo_measure_gain_values()
2163 pg->pg_lna_lod_gain = 1; in bwn_lo_measure_gain_values()
2164 pg->pg_pga_gain = 2; in bwn_lo_measure_gain_values()
2166 pg->pg_lna_lod_gain = 1; in bwn_lo_measure_gain_values()
2167 pg->pg_pga_gain = 1; in bwn_lo_measure_gain_values()
2169 pg->pg_lna_lod_gain = 1; in bwn_lo_measure_gain_values()
2170 pg->pg_pga_gain = 0; in bwn_lo_measure_gain_values()
2172 pg->pg_lna_lod_gain = 0; in bwn_lo_measure_gain_values()
2173 pg->pg_pga_gain = 0; in bwn_lo_measure_gain_values()
2177 tmp = BWN_RF_READ(mac, 0x7a); in bwn_lo_measure_gain_values()
2178 if (pg->pg_lna_lod_gain == 0) in bwn_lo_measure_gain_values()
2182 BWN_RF_WRITE(mac, 0x7a, tmp); in bwn_lo_measure_gain_values()
2186 bwn_lo_save(struct bwn_mac *mac, struct bwn_lo_g_value *sav) in bwn_lo_save() argument
2188 struct bwn_phy *phy = &mac->mac_phy; in bwn_lo_save()
2189 struct bwn_phy_g *pg = &phy->phy_g; in bwn_lo_save()
2190 struct bwn_softc *sc = mac->mac_sc; in bwn_lo_save()
2191 struct bwn_txpwr_loctl *lo = &pg->pg_loctl; in bwn_lo_save()
2195 if (bwn_has_hwpctl(mac)) { in bwn_lo_save()
2196 sav->phy_lomask = BWN_PHY_READ(mac, BWN_PHY_LO_MASK); in bwn_lo_save()
2197 sav->phy_extg = BWN_PHY_READ(mac, BWN_PHY_EXTG(0x01)); in bwn_lo_save()
2198 sav->phy_dacctl_hwpctl = BWN_PHY_READ(mac, BWN_PHY_DACCTL); in bwn_lo_save()
2199 sav->phy_cck4 = BWN_PHY_READ(mac, BWN_PHY_CCK(0x14)); in bwn_lo_save()
2200 sav->phy_hpwr_tssictl = BWN_PHY_READ(mac, BWN_PHY_HPWR_TSSICTL); in bwn_lo_save()
2202 BWN_PHY_SET(mac, BWN_PHY_HPWR_TSSICTL, 0x100); in bwn_lo_save()
2203 BWN_PHY_SET(mac, BWN_PHY_EXTG(0x01), 0x40); in bwn_lo_save()
2204 BWN_PHY_SET(mac, BWN_PHY_DACCTL, 0x40); in bwn_lo_save()
2205 BWN_PHY_SET(mac, BWN_PHY_CCK(0x14), 0x200); in bwn_lo_save()
2207 if (phy->type == BWN_PHYTYPE_B && in bwn_lo_save()
2208 phy->rf_ver == 0x2050 && phy->rf_rev < 6) { in bwn_lo_save()
2209 BWN_PHY_WRITE(mac, BWN_PHY_CCK(0x16), 0x410); in bwn_lo_save()
2210 BWN_PHY_WRITE(mac, BWN_PHY_CCK(0x17), 0x820); in bwn_lo_save()
2212 if (phy->rev >= 2) { in bwn_lo_save()
2213 sav->phy_analogover = BWN_PHY_READ(mac, BWN_PHY_ANALOGOVER); in bwn_lo_save()
2214 sav->phy_analogoverval = in bwn_lo_save()
2215 BWN_PHY_READ(mac, BWN_PHY_ANALOGOVERVAL); in bwn_lo_save()
2216 sav->phy_rfover = BWN_PHY_READ(mac, BWN_PHY_RFOVER); in bwn_lo_save()
2217 sav->phy_rfoverval = BWN_PHY_READ(mac, BWN_PHY_RFOVERVAL); in bwn_lo_save()
2218 sav->phy_classctl = BWN_PHY_READ(mac, BWN_PHY_CLASSCTL); in bwn_lo_save()
2219 sav->phy_cck3 = BWN_PHY_READ(mac, BWN_PHY_CCK(0x3e)); in bwn_lo_save()
2220 sav->phy_crs0 = BWN_PHY_READ(mac, BWN_PHY_CRS0); in bwn_lo_save()
2222 BWN_PHY_MASK(mac, BWN_PHY_CLASSCTL, 0xfffc); in bwn_lo_save()
2223 BWN_PHY_MASK(mac, BWN_PHY_CRS0, 0x7fff); in bwn_lo_save()
2224 BWN_PHY_SET(mac, BWN_PHY_ANALOGOVER, 0x0003); in bwn_lo_save()
2225 BWN_PHY_MASK(mac, BWN_PHY_ANALOGOVERVAL, 0xfffc); in bwn_lo_save()
2226 if (phy->type == BWN_PHYTYPE_G) { in bwn_lo_save()
2227 if ((phy->rev >= 7) && in bwn_lo_save()
2228 (sc->sc_board_info.board_flags & in bwn_lo_save()
2230 BWN_PHY_WRITE(mac, BWN_PHY_RFOVER, 0x933); in bwn_lo_save()
2232 BWN_PHY_WRITE(mac, BWN_PHY_RFOVER, 0x133); in bwn_lo_save()
2235 BWN_PHY_WRITE(mac, BWN_PHY_RFOVER, 0); in bwn_lo_save()
2237 BWN_PHY_WRITE(mac, BWN_PHY_CCK(0x3e), 0); in bwn_lo_save()
2239 sav->reg0 = BWN_READ_2(mac, 0x3f4); in bwn_lo_save()
2240 sav->reg1 = BWN_READ_2(mac, 0x3e2); in bwn_lo_save()
2241 sav->rf0 = BWN_RF_READ(mac, 0x43); in bwn_lo_save()
2242 sav->rf1 = BWN_RF_READ(mac, 0x7a); in bwn_lo_save()
2243 sav->phy_pgactl = BWN_PHY_READ(mac, BWN_PHY_PGACTL); in bwn_lo_save()
2244 sav->phy_cck2 = BWN_PHY_READ(mac, BWN_PHY_CCK(0x2a)); in bwn_lo_save()
2245 sav->phy_syncctl = BWN_PHY_READ(mac, BWN_PHY_SYNCCTL); in bwn_lo_save()
2246 sav->phy_dacctl = BWN_PHY_READ(mac, BWN_PHY_DACCTL); in bwn_lo_save()
2249 sav->rf2 = BWN_RF_READ(mac, 0x52); in bwn_lo_save()
2250 sav->rf2 &= 0x00f0; in bwn_lo_save()
2252 if (phy->type == BWN_PHYTYPE_B) { in bwn_lo_save()
2253 sav->phy_cck0 = BWN_PHY_READ(mac, BWN_PHY_CCK(0x30)); in bwn_lo_save()
2254 sav->phy_cck1 = BWN_PHY_READ(mac, BWN_PHY_CCK(0x06)); in bwn_lo_save()
2255 BWN_PHY_WRITE(mac, BWN_PHY_CCK(0x30), 0x00ff); in bwn_lo_save()
2256 BWN_PHY_WRITE(mac, BWN_PHY_CCK(0x06), 0x3f3f); in bwn_lo_save()
2258 BWN_WRITE_2(mac, 0x3e2, BWN_READ_2(mac, 0x3e2) in bwn_lo_save()
2261 BWN_WRITE_2(mac, 0x3f4, BWN_READ_2(mac, 0x3f4) in bwn_lo_save()
2265 (phy->type == BWN_PHYTYPE_G) ? BWN_PHY_LO_MASK : BWN_PHY_CCK(0x2e); in bwn_lo_save()
2266 BWN_PHY_WRITE(mac, tmp, 0x007f); in bwn_lo_save()
2268 tmp = sav->phy_syncctl; in bwn_lo_save()
2269 BWN_PHY_WRITE(mac, BWN_PHY_SYNCCTL, tmp & 0xff7f); in bwn_lo_save()
2270 tmp = sav->rf1; in bwn_lo_save()
2271 BWN_RF_WRITE(mac, 0x007a, tmp & 0xfff0); in bwn_lo_save()
2273 BWN_PHY_WRITE(mac, BWN_PHY_CCK(0x2a), 0x8a3); in bwn_lo_save()
2274 if (phy->type == BWN_PHYTYPE_G || in bwn_lo_save()
2275 (phy->type == BWN_PHYTYPE_B && in bwn_lo_save()
2276 phy->rf_ver == 0x2050 && phy->rf_rev >= 6)) { in bwn_lo_save()
2277 BWN_PHY_WRITE(mac, BWN_PHY_CCK(0x2b), 0x1003); in bwn_lo_save()
2279 BWN_PHY_WRITE(mac, BWN_PHY_CCK(0x2b), 0x0802); in bwn_lo_save()
2280 if (phy->rev >= 2) in bwn_lo_save()
2281 bwn_dummy_transmission(mac, 0, 1); in bwn_lo_save()
2282 bwn_phy_g_switch_chan(mac, 6, 0); in bwn_lo_save()
2283 BWN_RF_READ(mac, 0x51); in bwn_lo_save()
2284 if (phy->type == BWN_PHYTYPE_G) in bwn_lo_save()
2285 BWN_PHY_WRITE(mac, BWN_PHY_CCK(0x2f), 0); in bwn_lo_save()
2288 if (ieee80211_time_before(lo->txctl_measured_time, in bwn_lo_save()
2289 (ts.tv_nsec / 1000000 + ts.tv_sec * 1000) - BWN_LO_TXCTL_EXPIRE)) in bwn_lo_save()
2290 bwn_lo_measure_txctl_values(mac); in bwn_lo_save()
2292 if (phy->type == BWN_PHYTYPE_G && phy->rev >= 3) in bwn_lo_save()
2293 BWN_PHY_WRITE(mac, BWN_PHY_LO_MASK, 0xc078); in bwn_lo_save()
2295 if (phy->type == BWN_PHYTYPE_B) in bwn_lo_save()
2296 BWN_PHY_WRITE(mac, BWN_PHY_CCK(0x2e), 0x8078); in bwn_lo_save()
2298 BWN_PHY_WRITE(mac, BWN_PHY_LO_MASK, 0x8078); in bwn_lo_save()
2303 bwn_lo_restore(struct bwn_mac *mac, struct bwn_lo_g_value *sav) in bwn_lo_restore() argument
2305 struct bwn_phy *phy = &mac->mac_phy; in bwn_lo_restore()
2306 struct bwn_phy_g *pg = &phy->phy_g; in bwn_lo_restore()
2309 if (phy->rev >= 2) { in bwn_lo_restore()
2310 BWN_PHY_WRITE(mac, BWN_PHY_PGACTL, 0xe300); in bwn_lo_restore()
2311 tmp = (pg->pg_pga_gain << 8); in bwn_lo_restore()
2312 BWN_PHY_WRITE(mac, BWN_PHY_RFOVERVAL, tmp | 0xa0); in bwn_lo_restore()
2314 BWN_PHY_WRITE(mac, BWN_PHY_RFOVERVAL, tmp | 0xa2); in bwn_lo_restore()
2316 BWN_PHY_WRITE(mac, BWN_PHY_RFOVERVAL, tmp | 0xa3); in bwn_lo_restore()
2318 tmp = (pg->pg_pga_gain | 0xefa0); in bwn_lo_restore()
2319 BWN_PHY_WRITE(mac, BWN_PHY_PGACTL, tmp); in bwn_lo_restore()
2321 if (phy->type == BWN_PHYTYPE_G) { in bwn_lo_restore()
2322 if (phy->rev >= 3) in bwn_lo_restore()
2323 BWN_PHY_WRITE(mac, BWN_PHY_CCK(0x2e), 0xc078); in bwn_lo_restore()
2325 BWN_PHY_WRITE(mac, BWN_PHY_CCK(0x2e), 0x8078); in bwn_lo_restore()
2326 if (phy->rev >= 2) in bwn_lo_restore()
2327 BWN_PHY_WRITE(mac, BWN_PHY_CCK(0x2f), 0x0202); in bwn_lo_restore()
2329 BWN_PHY_WRITE(mac, BWN_PHY_CCK(0x2f), 0x0101); in bwn_lo_restore()
2331 BWN_WRITE_2(mac, 0x3f4, sav->reg0); in bwn_lo_restore()
2332 BWN_PHY_WRITE(mac, BWN_PHY_PGACTL, sav->phy_pgactl); in bwn_lo_restore()
2333 BWN_PHY_WRITE(mac, BWN_PHY_CCK(0x2a), sav->phy_cck2); in bwn_lo_restore()
2334 BWN_PHY_WRITE(mac, BWN_PHY_SYNCCTL, sav->phy_syncctl); in bwn_lo_restore()
2335 BWN_PHY_WRITE(mac, BWN_PHY_DACCTL, sav->phy_dacctl); in bwn_lo_restore()
2336 BWN_RF_WRITE(mac, 0x43, sav->rf0); in bwn_lo_restore()
2337 BWN_RF_WRITE(mac, 0x7a, sav->rf1); in bwn_lo_restore()
2339 tmp = sav->rf2; in bwn_lo_restore()
2340 BWN_RF_SETMASK(mac, 0x52, 0xff0f, tmp); in bwn_lo_restore()
2342 BWN_WRITE_2(mac, 0x3e2, sav->reg1); in bwn_lo_restore()
2343 if (phy->type == BWN_PHYTYPE_B && in bwn_lo_restore()
2344 phy->rf_ver == 0x2050 && phy->rf_rev <= 5) { in bwn_lo_restore()
2345 BWN_PHY_WRITE(mac, BWN_PHY_CCK(0x30), sav->phy_cck0); in bwn_lo_restore()
2346 BWN_PHY_WRITE(mac, BWN_PHY_CCK(0x06), sav->phy_cck1); in bwn_lo_restore()
2348 if (phy->rev >= 2) { in bwn_lo_restore()
2349 BWN_PHY_WRITE(mac, BWN_PHY_ANALOGOVER, sav->phy_analogover); in bwn_lo_restore()
2350 BWN_PHY_WRITE(mac, BWN_PHY_ANALOGOVERVAL, in bwn_lo_restore()
2351 sav->phy_analogoverval); in bwn_lo_restore()
2352 BWN_PHY_WRITE(mac, BWN_PHY_CLASSCTL, sav->phy_classctl); in bwn_lo_restore()
2353 BWN_PHY_WRITE(mac, BWN_PHY_RFOVER, sav->phy_rfover); in bwn_lo_restore()
2354 BWN_PHY_WRITE(mac, BWN_PHY_RFOVERVAL, sav->phy_rfoverval); in bwn_lo_restore()
2355 BWN_PHY_WRITE(mac, BWN_PHY_CCK(0x3e), sav->phy_cck3); in bwn_lo_restore()
2356 BWN_PHY_WRITE(mac, BWN_PHY_CRS0, sav->phy_crs0); in bwn_lo_restore()
2358 if (bwn_has_hwpctl(mac)) { in bwn_lo_restore()
2359 tmp = (sav->phy_lomask & 0xbfff); in bwn_lo_restore()
2360 BWN_PHY_WRITE(mac, BWN_PHY_LO_MASK, tmp); in bwn_lo_restore()
2361 BWN_PHY_WRITE(mac, BWN_PHY_EXTG(0x01), sav->phy_extg); in bwn_lo_restore()
2362 BWN_PHY_WRITE(mac, BWN_PHY_DACCTL, sav->phy_dacctl_hwpctl); in bwn_lo_restore()
2363 BWN_PHY_WRITE(mac, BWN_PHY_CCK(0x14), sav->phy_cck4); in bwn_lo_restore()
2364 BWN_PHY_WRITE(mac, BWN_PHY_HPWR_TSSICTL, sav->phy_hpwr_tssictl); in bwn_lo_restore()
2366 bwn_phy_g_switch_chan(mac, sav->old_channel, 1); in bwn_lo_restore()
2370 bwn_lo_probe_loctl(struct bwn_mac *mac, in bwn_lo_probe_loctl() argument
2373 struct bwn_phy *phy = &mac->mac_phy; in bwn_lo_probe_loctl()
2374 struct bwn_phy_g *pg = &phy->phy_g; in bwn_lo_probe_loctl()
2376 struct bwn_loctl prev = { -100, -100 }; in bwn_lo_probe_loctl()
2378 { 1, 1,}, { 1, 0,}, { 1, -1,}, { 0, -1,}, in bwn_lo_probe_loctl()
2379 { -1, -1,}, { -1, 0,}, { -1, 1,}, { 0, 1,} in bwn_lo_probe_loctl()
2384 if (d->curstate == 0) { in bwn_lo_probe_loctl()
2387 } else if (d->curstate % 2 == 0) { in bwn_lo_probe_loctl()
2388 begin = d->curstate - 1; in bwn_lo_probe_loctl()
2389 end = d->curstate + 1; in bwn_lo_probe_loctl()
2391 begin = d->curstate - 2; in bwn_lo_probe_loctl()
2392 end = d->curstate + 2; in bwn_lo_probe_loctl()
2397 end -= 8; in bwn_lo_probe_loctl()
2401 d->curstate = i; in bwn_lo_probe_loctl()
2405 test.i += modifiers[i - 1].i * d->multipler; in bwn_lo_probe_loctl()
2406 test.q += modifiers[i - 1].q * d->multipler; in bwn_lo_probe_loctl()
2409 bwn_lo_write(mac, &test); in bwn_lo_probe_loctl()
2410 feedth = bwn_lo_calcfeed(mac, pg->pg_lna_gain, in bwn_lo_probe_loctl()
2411 pg->pg_pga_gain, pg->pg_trsw_rx_gain); in bwn_lo_probe_loctl()
2412 if (feedth < d->feedth) { in bwn_lo_probe_loctl()
2416 d->feedth = feedth; in bwn_lo_probe_loctl()
2417 if (d->nmeasure < 2 && !BWN_HAS_LOOPBACK(phy)) in bwn_lo_probe_loctl()
2428 d->curstate = i; in bwn_lo_probe_loctl()
2435 bwn_lo_probe_sm(struct bwn_mac *mac, struct bwn_loctl *loctl, int *rxgain) in bwn_lo_probe_sm() argument
2437 struct bwn_phy *phy = &mac->mac_phy; in bwn_lo_probe_sm()
2438 struct bwn_phy_g *pg = &phy->phy_g; in bwn_lo_probe_sm()
2453 bwn_lo_write(mac, &d.loctl); in bwn_lo_probe_sm()
2454 feedth = bwn_lo_calcfeed(mac, pg->pg_lna_gain, in bwn_lo_probe_sm()
2455 pg->pg_pga_gain, pg->pg_trsw_rx_gain); in bwn_lo_probe_sm()
2461 feedth = bwn_lo_calcfeed(mac, pg->pg_lna_gain, in bwn_lo_probe_sm()
2462 pg->pg_pga_gain, pg->pg_trsw_rx_gain); in bwn_lo_probe_sm()
2471 lower = bwn_lo_probe_loctl(mac, &probe, &d); in bwn_lo_probe_sm()
2483 *rxgain -= 6; in bwn_lo_probe_sm()
2495 bwn_lo_measure_gain_values(mac, *rxgain, BWN_HAS_LOOPBACK(phy)); in bwn_lo_probe_sm()
2500 bwn_lo_calibset(struct bwn_mac *mac, in bwn_lo_calibset() argument
2503 struct bwn_phy *phy = &mac->mac_phy; in bwn_lo_calibset()
2504 struct bwn_phy_g *pg = &phy->phy_g; in bwn_lo_calibset()
2511 sval.old_channel = phy->chan; in bwn_lo_calibset()
2512 bwn_mac_suspend(mac); in bwn_lo_calibset()
2513 bwn_lo_save(mac, &sval); in bwn_lo_calibset()
2515 reg = bwn_lo_txctl_regtable(mac, &value, &pad); in bwn_lo_calibset()
2516 BWN_RF_SETMASK(mac, 0x43, 0xfff0, rfatt->att); in bwn_lo_calibset()
2517 BWN_RF_SETMASK(mac, reg, ~value, (rfatt->padmix ? value :0)); in bwn_lo_calibset()
2519 rxgain = (rfatt->att * 2) + (bbatt->att / 2); in bwn_lo_calibset()
2520 if (rfatt->padmix) in bwn_lo_calibset()
2521 rxgain -= pad; in bwn_lo_calibset()
2523 rxgain += pg->pg_max_lb_gain; in bwn_lo_calibset()
2524 bwn_lo_measure_gain_values(mac, rxgain, BWN_HAS_LOOPBACK(phy)); in bwn_lo_calibset()
2525 bwn_phy_g_set_bbatt(mac, bbatt->att); in bwn_lo_calibset()
2526 bwn_lo_probe_sm(mac, &loctl, &rxgain); in bwn_lo_calibset()
2528 bwn_lo_restore(mac, &sval); in bwn_lo_calibset()
2529 bwn_mac_enable(mac); in bwn_lo_calibset()
2533 device_printf(mac->mac_sc->sc_dev, "out of memory\n"); in bwn_lo_calibset()
2536 memcpy(&cal->bbatt, bbatt, sizeof(*bbatt)); in bwn_lo_calibset()
2537 memcpy(&cal->rfatt, rfatt, sizeof(*rfatt)); in bwn_lo_calibset()
2538 memcpy(&cal->ctl, &loctl, sizeof(loctl)); in bwn_lo_calibset()
2540 BWN_GETTIME(cal->calib_time); in bwn_lo_calibset()
2546 bwn_lo_get_calib(struct bwn_mac *mac, const struct bwn_bbatt *bbatt, in bwn_lo_get_calib() argument
2549 struct bwn_txpwr_loctl *lo = &mac->mac_phy.phy_g.pg_loctl; in bwn_lo_get_calib()
2552 TAILQ_FOREACH(c, &lo->calib_list, list) { in bwn_lo_get_calib()
2553 if (!BWN_BBATTCMP(&c->bbatt, bbatt)) in bwn_lo_get_calib()
2555 if (!BWN_RFATTCMP(&c->rfatt, rfatt)) in bwn_lo_get_calib()
2560 c = bwn_lo_calibset(mac, bbatt, rfatt); in bwn_lo_get_calib()
2563 TAILQ_INSERT_TAIL(&lo->calib_list, c, list); in bwn_lo_get_calib()
2569 bwn_phy_g_dc_lookup_init(struct bwn_mac *mac, uint8_t update) in bwn_phy_g_dc_lookup_init() argument
2571 struct bwn_phy *phy = &mac->mac_phy; in bwn_phy_g_dc_lookup_init()
2572 struct bwn_phy_g *pg = &phy->phy_g; in bwn_phy_g_dc_lookup_init()
2573 struct bwn_softc *sc = mac->mac_sc; in bwn_phy_g_dc_lookup_init()
2574 struct bwn_txpwr_loctl *lo = &pg->pg_loctl; in bwn_phy_g_dc_lookup_init()
2583 KASSERT(lo->rfatt.len * lo->bbatt.len <= 64, in bwn_phy_g_dc_lookup_init()
2586 pvector = lo->power_vector; in bwn_phy_g_dc_lookup_init()
2590 bwn_mac_suspend(mac); in bwn_phy_g_dc_lookup_init()
2599 bb_offset = i / lo->rfatt.len; in bwn_phy_g_dc_lookup_init()
2600 rf_offset = i % lo->rfatt.len; in bwn_phy_g_dc_lookup_init()
2601 bbatt = &(lo->bbatt.array[bb_offset]); in bwn_phy_g_dc_lookup_init()
2602 rfatt = &(lo->rfatt.array[rf_offset]); in bwn_phy_g_dc_lookup_init()
2604 cal = bwn_lo_calibset(mac, bbatt, rfatt); in bwn_phy_g_dc_lookup_init()
2606 device_printf(sc->sc_dev, "LO: Could not " in bwn_phy_g_dc_lookup_init()
2610 val = (uint8_t)(cal->ctl.q); in bwn_phy_g_dc_lookup_init()
2611 val |= ((uint8_t)(cal->ctl.i)) << 4; in bwn_phy_g_dc_lookup_init()
2616 lo->dc_lt[idx] = (lo->dc_lt[idx] & 0x00ff) in bwn_phy_g_dc_lookup_init()
2619 lo->dc_lt[idx] = (lo->dc_lt[idx] & 0xff00) in bwn_phy_g_dc_lookup_init()
2625 BWN_PHY_WRITE(mac, 0x3a0 + i, lo->dc_lt[i]); in bwn_phy_g_dc_lookup_init()
2627 bwn_mac_enable(mac); in bwn_phy_g_dc_lookup_init()
2634 if (!rf->padmix) in bwn_lo_fixup_rfatt()
2636 if ((rf->att != 1) && (rf->att != 2) && (rf->att != 3)) in bwn_lo_fixup_rfatt()
2637 rf->att = 4; in bwn_lo_fixup_rfatt()
2641 bwn_lo_g_adjust(struct bwn_mac *mac) in bwn_lo_g_adjust() argument
2643 struct bwn_phy_g *pg = &mac->mac_phy.phy_g; in bwn_lo_g_adjust()
2647 memcpy(&rf, &pg->pg_rfatt, sizeof(rf)); in bwn_lo_g_adjust()
2650 cal = bwn_lo_get_calib(mac, &pg->pg_bbatt, &rf); in bwn_lo_g_adjust()
2653 bwn_lo_write(mac, &cal->ctl); in bwn_lo_g_adjust()
2657 bwn_lo_g_init(struct bwn_mac *mac) in bwn_lo_g_init() argument
2660 if (!bwn_has_hwpctl(mac)) in bwn_lo_g_init()
2663 bwn_lo_get_powervector(mac); in bwn_lo_g_init()
2664 bwn_phy_g_dc_lookup_init(mac, 1); in bwn_lo_g_init()
2668 bwn_nrssi_read(struct bwn_mac *mac, uint16_t offset) in bwn_nrssi_read() argument
2671 BWN_PHY_WRITE(mac, BWN_PHY_NRSSI_CTRL, offset); in bwn_nrssi_read()
2672 return ((int16_t)BWN_PHY_READ(mac, BWN_PHY_NRSSI_DATA)); in bwn_nrssi_read()
2676 bwn_nrssi_threshold(struct bwn_mac *mac) in bwn_nrssi_threshold() argument
2678 struct bwn_phy *phy = &mac->mac_phy; in bwn_nrssi_threshold()
2679 struct bwn_phy_g *pg = &phy->phy_g; in bwn_nrssi_threshold()
2680 struct bwn_softc *sc = mac->mac_sc; in bwn_nrssi_threshold()
2685 KASSERT(phy->type == BWN_PHYTYPE_G, ("%s: fail", __func__)); in bwn_nrssi_threshold()
2687 if (phy->gmode && (sc->sc_board_info.board_flags & BHND_BFL_ADCDIV)) { in bwn_nrssi_threshold()
2688 if (!pg->pg_aci_wlan_automatic && pg->pg_aci_enable) { in bwn_nrssi_threshold()
2696 a = a * (pg->pg_nrssi[1] - pg->pg_nrssi[0]); in bwn_nrssi_threshold()
2697 a += (pg->pg_nrssi[0] << 6); in bwn_nrssi_threshold()
2700 a = MIN(MAX(a, -31), 31); in bwn_nrssi_threshold()
2702 b = b * (pg->pg_nrssi[1] - pg->pg_nrssi[0]); in bwn_nrssi_threshold()
2703 b += (pg->pg_nrssi[0] << 6); in bwn_nrssi_threshold()
2709 b = MIN(MAX(b, -31), 31); in bwn_nrssi_threshold()
2711 tmpu16 = BWN_PHY_READ(mac, 0x048a) & 0xf000; in bwn_nrssi_threshold()
2714 BWN_PHY_WRITE(mac, 0x048a, tmpu16); in bwn_nrssi_threshold()
2718 tmp16 = bwn_nrssi_read(mac, 0x20); in bwn_nrssi_threshold()
2720 tmp16 -= 0x40; in bwn_nrssi_threshold()
2721 BWN_PHY_SETMASK(mac, 0x048a, 0xf000, (tmp16 < 3) ? 0x09eb : 0x0aed); in bwn_nrssi_threshold()
2725 bwn_nrssi_slope_11g(struct bwn_mac *mac) in bwn_nrssi_slope_11g() argument
2738 struct bwn_phy *phy = &mac->mac_phy; in bwn_nrssi_slope_11g()
2739 struct bwn_phy_g *pg = &phy->phy_g; in bwn_nrssi_slope_11g()
2748 KASSERT(phy->type == BWN_PHYTYPE_G, in bwn_nrssi_slope_11g()
2751 if (phy->rf_rev >= 9) in bwn_nrssi_slope_11g()
2753 if (phy->rf_rev == 8) in bwn_nrssi_slope_11g()
2754 bwn_nrssi_offset(mac); in bwn_nrssi_slope_11g()
2756 BWN_PHY_MASK(mac, BWN_PHY_G_CRS, 0x7fff); in bwn_nrssi_slope_11g()
2757 BWN_PHY_MASK(mac, 0x0802, 0xfffc); in bwn_nrssi_slope_11g()
2762 ant_div = BWN_READ_2(mac, 0x03e2); in bwn_nrssi_slope_11g()
2763 BWN_WRITE_2(mac, 0x03e2, BWN_READ_2(mac, 0x03e2) | 0x8000); in bwn_nrssi_slope_11g()
2765 save_rf[i] = BWN_RF_READ(mac, save_rf_regs[i]); in bwn_nrssi_slope_11g()
2767 save_phy_comm[i] = BWN_PHY_READ(mac, save_phy_comm_regs[i]); in bwn_nrssi_slope_11g()
2769 phy0 = BWN_READ_2(mac, BWN_PHY0); in bwn_nrssi_slope_11g()
2770 chan_ex = BWN_READ_2(mac, BWN_CHANNEL_EXT); in bwn_nrssi_slope_11g()
2771 if (phy->rev >= 3) { in bwn_nrssi_slope_11g()
2773 save_phy3[i] = BWN_PHY_READ(mac, save_phy3_regs[i]); in bwn_nrssi_slope_11g()
2774 BWN_PHY_WRITE(mac, 0x002e, 0); in bwn_nrssi_slope_11g()
2775 BWN_PHY_WRITE(mac, BWN_PHY_G_LOCTL, 0); in bwn_nrssi_slope_11g()
2776 switch (phy->rev) { in bwn_nrssi_slope_11g()
2780 BWN_PHY_SET(mac, 0x0478, 0x0100); in bwn_nrssi_slope_11g()
2781 BWN_PHY_SET(mac, 0x0801, 0x0040); in bwn_nrssi_slope_11g()
2785 BWN_PHY_MASK(mac, 0x0801, 0xffbf); in bwn_nrssi_slope_11g()
2788 BWN_PHY_SET(mac, 0x0060, 0x0040); in bwn_nrssi_slope_11g()
2789 BWN_PHY_SET(mac, 0x0014, 0x0200); in bwn_nrssi_slope_11g()
2794 BWN_RF_SET(mac, 0x007a, 0x0070); in bwn_nrssi_slope_11g()
2795 bwn_set_all_gains(mac, 0, 8, 0); in bwn_nrssi_slope_11g()
2796 BWN_RF_MASK(mac, 0x007a, 0x00f7); in bwn_nrssi_slope_11g()
2797 if (phy->rev >= 2) { in bwn_nrssi_slope_11g()
2798 BWN_PHY_SETMASK(mac, 0x0811, 0xffcf, 0x0030); in bwn_nrssi_slope_11g()
2799 BWN_PHY_SETMASK(mac, 0x0812, 0xffcf, 0x0010); in bwn_nrssi_slope_11g()
2801 BWN_RF_SET(mac, 0x007a, 0x0080); in bwn_nrssi_slope_11g()
2804 nrssi0 = (int16_t) ((BWN_PHY_READ(mac, 0x047f) >> 8) & 0x003f); in bwn_nrssi_slope_11g()
2806 nrssi0 -= 0x0040; in bwn_nrssi_slope_11g()
2811 BWN_RF_MASK(mac, 0x007a, 0x007f); in bwn_nrssi_slope_11g()
2812 if (phy->rev >= 2) in bwn_nrssi_slope_11g()
2813 BWN_PHY_SETMASK(mac, 0x0003, 0xff9f, 0x0040); in bwn_nrssi_slope_11g()
2815 BWN_WRITE_2(mac, BWN_CHANNEL_EXT, in bwn_nrssi_slope_11g()
2816 BWN_READ_2(mac, BWN_CHANNEL_EXT) | 0x2000); in bwn_nrssi_slope_11g()
2817 BWN_RF_SET(mac, 0x007a, 0x000f); in bwn_nrssi_slope_11g()
2818 BWN_PHY_WRITE(mac, 0x0015, 0xf330); in bwn_nrssi_slope_11g()
2819 if (phy->rev >= 2) { in bwn_nrssi_slope_11g()
2820 BWN_PHY_SETMASK(mac, 0x0812, 0xffcf, 0x0020); in bwn_nrssi_slope_11g()
2821 BWN_PHY_SETMASK(mac, 0x0811, 0xffcf, 0x0020); in bwn_nrssi_slope_11g()
2824 bwn_set_all_gains(mac, 3, 0, 1); in bwn_nrssi_slope_11g()
2825 if (phy->rf_rev == 8) { in bwn_nrssi_slope_11g()
2826 BWN_RF_WRITE(mac, 0x0043, 0x001f); in bwn_nrssi_slope_11g()
2828 tmp = BWN_RF_READ(mac, 0x0052) & 0xff0f; in bwn_nrssi_slope_11g()
2829 BWN_RF_WRITE(mac, 0x0052, tmp | 0x0060); in bwn_nrssi_slope_11g()
2830 tmp = BWN_RF_READ(mac, 0x0043) & 0xfff0; in bwn_nrssi_slope_11g()
2831 BWN_RF_WRITE(mac, 0x0043, tmp | 0x0009); in bwn_nrssi_slope_11g()
2833 BWN_PHY_WRITE(mac, 0x005a, 0x0480); in bwn_nrssi_slope_11g()
2834 BWN_PHY_WRITE(mac, 0x0059, 0x0810); in bwn_nrssi_slope_11g()
2835 BWN_PHY_WRITE(mac, 0x0058, 0x000d); in bwn_nrssi_slope_11g()
2837 nrssi1 = (int16_t) ((BWN_PHY_READ(mac, 0x047f) >> 8) & 0x003f); in bwn_nrssi_slope_11g()
2843 nrssi1 -= 0x0040; in bwn_nrssi_slope_11g()
2845 pg->pg_nrssi_slope = 0x00010000; in bwn_nrssi_slope_11g()
2847 pg->pg_nrssi_slope = 0x00400000 / (nrssi0 - nrssi1); in bwn_nrssi_slope_11g()
2848 if (nrssi0 >= -4) { in bwn_nrssi_slope_11g()
2849 pg->pg_nrssi[0] = nrssi1; in bwn_nrssi_slope_11g()
2850 pg->pg_nrssi[1] = nrssi0; in bwn_nrssi_slope_11g()
2856 if (phy->rev >= 3) { in bwn_nrssi_slope_11g()
2858 BWN_PHY_WRITE(mac, save_phy3_regs[phy3_idx], in bwn_nrssi_slope_11g()
2862 if (phy->rev >= 2) { in bwn_nrssi_slope_11g()
2863 BWN_PHY_MASK(mac, 0x0812, 0xffcf); in bwn_nrssi_slope_11g()
2864 BWN_PHY_MASK(mac, 0x0811, 0xffcf); in bwn_nrssi_slope_11g()
2868 BWN_RF_WRITE(mac, save_rf_regs[i], save_rf[i]); in bwn_nrssi_slope_11g()
2870 BWN_WRITE_2(mac, 0x03e2, ant_div); in bwn_nrssi_slope_11g()
2871 BWN_WRITE_2(mac, 0x03e6, phy0); in bwn_nrssi_slope_11g()
2872 BWN_WRITE_2(mac, BWN_CHANNEL_EXT, chan_ex); in bwn_nrssi_slope_11g()
2875 BWN_PHY_WRITE(mac, save_phy_comm_regs[i], save_phy_comm[i]); in bwn_nrssi_slope_11g()
2877 bwn_spu_workaround(mac, phy->chan); in bwn_nrssi_slope_11g()
2878 BWN_PHY_SET(mac, 0x0802, (0x0001 | 0x0002)); in bwn_nrssi_slope_11g()
2879 bwn_set_original_gains(mac); in bwn_nrssi_slope_11g()
2880 BWN_PHY_SET(mac, BWN_PHY_G_CRS, 0x8000); in bwn_nrssi_slope_11g()
2881 if (phy->rev >= 3) { in bwn_nrssi_slope_11g()
2883 BWN_PHY_WRITE(mac, save_phy3_regs[phy3_idx], in bwn_nrssi_slope_11g()
2888 delta = 0x1f - pg->pg_nrssi[0]; in bwn_nrssi_slope_11g()
2890 tmp32 = (((i - delta) * pg->pg_nrssi_slope) / 0x10000) + 0x3a; in bwn_nrssi_slope_11g()
2892 pg->pg_nrssi_lt[i] = tmp32; in bwn_nrssi_slope_11g()
2895 bwn_nrssi_threshold(mac); in bwn_nrssi_slope_11g()
2902 bwn_nrssi_offset(struct bwn_mac *mac) in bwn_nrssi_offset() argument
2918 struct bwn_phy *phy = &mac->mac_phy; in bwn_nrssi_offset()
2927 save_phy_comm[i] = BWN_PHY_READ(mac, save_phy_comm_regs[i]); in bwn_nrssi_offset()
2929 save_rf[i] = BWN_RF_READ(mac, save_rf_regs[i]); in bwn_nrssi_offset()
2931 BWN_PHY_MASK(mac, 0x0429, 0x7fff); in bwn_nrssi_offset()
2932 BWN_PHY_SETMASK(mac, 0x0001, 0x3fff, 0x4000); in bwn_nrssi_offset()
2933 BWN_PHY_SET(mac, 0x0811, 0x000c); in bwn_nrssi_offset()
2934 BWN_PHY_SETMASK(mac, 0x0812, 0xfff3, 0x0004); in bwn_nrssi_offset()
2935 BWN_PHY_MASK(mac, 0x0802, ~(0x1 | 0x2)); in bwn_nrssi_offset()
2936 if (phy->rev >= 6) { in bwn_nrssi_offset()
2938 save_phy6[i] = BWN_PHY_READ(mac, save_phy6_regs[i]); in bwn_nrssi_offset()
2940 BWN_PHY_WRITE(mac, 0x002e, 0); in bwn_nrssi_offset()
2941 BWN_PHY_WRITE(mac, 0x002f, 0); in bwn_nrssi_offset()
2942 BWN_PHY_WRITE(mac, 0x080f, 0); in bwn_nrssi_offset()
2943 BWN_PHY_WRITE(mac, 0x0810, 0); in bwn_nrssi_offset()
2944 BWN_PHY_SET(mac, 0x0478, 0x0100); in bwn_nrssi_offset()
2945 BWN_PHY_SET(mac, 0x0801, 0x0040); in bwn_nrssi_offset()
2946 BWN_PHY_SET(mac, 0x0060, 0x0040); in bwn_nrssi_offset()
2947 BWN_PHY_SET(mac, 0x0014, 0x0200); in bwn_nrssi_offset()
2949 BWN_RF_SET(mac, 0x007a, 0x0070); in bwn_nrssi_offset()
2950 BWN_RF_SET(mac, 0x007a, 0x0080); in bwn_nrssi_offset()
2953 nrssi = (int16_t) ((BWN_PHY_READ(mac, 0x047f) >> 8) & 0x003f); in bwn_nrssi_offset()
2955 nrssi -= 0x40; in bwn_nrssi_offset()
2957 for (i = 7; i >= 4; i--) { in bwn_nrssi_offset()
2958 BWN_RF_WRITE(mac, 0x007b, i); in bwn_nrssi_offset()
2960 nrssi = (int16_t) ((BWN_PHY_READ(mac, 0x047f) >> 8) & in bwn_nrssi_offset()
2963 nrssi -= 0x40; in bwn_nrssi_offset()
2970 BWN_RF_MASK(mac, 0x007a, 0x007f); in bwn_nrssi_offset()
2971 if (phy->rev != 1) { in bwn_nrssi_offset()
2972 BWN_PHY_SET(mac, 0x0814, 0x0001); in bwn_nrssi_offset()
2973 BWN_PHY_MASK(mac, 0x0815, 0xfffe); in bwn_nrssi_offset()
2975 BWN_PHY_SET(mac, 0x0811, 0x000c); in bwn_nrssi_offset()
2976 BWN_PHY_SET(mac, 0x0812, 0x000c); in bwn_nrssi_offset()
2977 BWN_PHY_SET(mac, 0x0811, 0x0030); in bwn_nrssi_offset()
2978 BWN_PHY_SET(mac, 0x0812, 0x0030); in bwn_nrssi_offset()
2979 BWN_PHY_WRITE(mac, 0x005a, 0x0480); in bwn_nrssi_offset()
2980 BWN_PHY_WRITE(mac, 0x0059, 0x0810); in bwn_nrssi_offset()
2981 BWN_PHY_WRITE(mac, 0x0058, 0x000d); in bwn_nrssi_offset()
2982 if (phy->rev == 0) in bwn_nrssi_offset()
2983 BWN_PHY_WRITE(mac, 0x0003, 0x0122); in bwn_nrssi_offset()
2985 BWN_PHY_SET(mac, 0x000a, 0x2000); in bwn_nrssi_offset()
2986 if (phy->rev != 1) { in bwn_nrssi_offset()
2987 BWN_PHY_SET(mac, 0x0814, 0x0004); in bwn_nrssi_offset()
2988 BWN_PHY_MASK(mac, 0x0815, 0xfffb); in bwn_nrssi_offset()
2990 BWN_PHY_SETMASK(mac, 0x0003, 0xff9f, 0x0040); in bwn_nrssi_offset()
2991 BWN_RF_SET(mac, 0x007a, 0x000f); in bwn_nrssi_offset()
2992 bwn_set_all_gains(mac, 3, 0, 1); in bwn_nrssi_offset()
2993 BWN_RF_SETMASK(mac, 0x0043, 0x00f0, 0x000f); in bwn_nrssi_offset()
2995 nrssi = (int16_t) ((BWN_PHY_READ(mac, 0x047f) >> 8) & 0x003f); in bwn_nrssi_offset()
2997 nrssi -= 0x40; in bwn_nrssi_offset()
2998 if (nrssi == -32) { in bwn_nrssi_offset()
3000 BWN_RF_WRITE(mac, 0x007b, i); in bwn_nrssi_offset()
3002 nrssi = (int16_t)((BWN_PHY_READ(mac, in bwn_nrssi_offset()
3005 nrssi -= 0x40; in bwn_nrssi_offset()
3006 if (nrssi > -31 && saved == 0xffff) in bwn_nrssi_offset()
3014 BWN_RF_WRITE(mac, 0x007b, saved); in bwn_nrssi_offset()
3019 if (phy->rev >= 6) { in bwn_nrssi_offset()
3021 BWN_PHY_WRITE(mac, save_phy6_regs[phy6_idx], in bwn_nrssi_offset()
3025 if (phy->rev != 1) { in bwn_nrssi_offset()
3027 BWN_PHY_WRITE(mac, save_phy_comm_regs[i], in bwn_nrssi_offset()
3031 BWN_PHY_WRITE(mac, save_phy_comm_regs[i], save_phy_comm[i]); in bwn_nrssi_offset()
3033 for (i = SAVE_RF_MAX - 1; i >= 0; --i) in bwn_nrssi_offset()
3034 BWN_RF_WRITE(mac, save_rf_regs[i], save_rf[i]); in bwn_nrssi_offset()
3036 BWN_PHY_WRITE(mac, 0x0802, BWN_PHY_READ(mac, 0x0802) | 0x1 | 0x2); in bwn_nrssi_offset()
3037 BWN_PHY_SET(mac, 0x0429, 0x8000); in bwn_nrssi_offset()
3038 bwn_set_original_gains(mac); in bwn_nrssi_offset()
3039 if (phy->rev >= 6) { in bwn_nrssi_offset()
3041 BWN_PHY_WRITE(mac, save_phy6_regs[phy6_idx], in bwn_nrssi_offset()
3046 BWN_PHY_WRITE(mac, save_phy_comm_regs[0], save_phy_comm[0]); in bwn_nrssi_offset()
3047 BWN_PHY_WRITE(mac, save_phy_comm_regs[2], save_phy_comm[2]); in bwn_nrssi_offset()
3048 BWN_PHY_WRITE(mac, save_phy_comm_regs[1], save_phy_comm[1]); in bwn_nrssi_offset()
3052 bwn_set_all_gains(struct bwn_mac *mac, int16_t first, int16_t second, in bwn_set_all_gains() argument
3055 struct bwn_phy *phy = &mac->mac_phy; in bwn_set_all_gains()
3061 if (phy->rev <= 1) { in bwn_set_all_gains()
3067 if (phy->rev <= 1) in bwn_set_all_gains()
3070 bwn_ofdmtab_write_2(mac, table, i, first); in bwn_set_all_gains()
3073 bwn_ofdmtab_write_2(mac, table, i, second); in bwn_set_all_gains()
3075 if (third != -1) { in bwn_set_all_gains()
3077 BWN_PHY_SETMASK(mac, 0x04a0, 0xbfbf, tmp); in bwn_set_all_gains()
3078 BWN_PHY_SETMASK(mac, 0x04a1, 0xbfbf, tmp); in bwn_set_all_gains()
3079 BWN_PHY_SETMASK(mac, 0x04a2, 0xbfbf, tmp); in bwn_set_all_gains()
3081 bwn_dummy_transmission(mac, 0, 1); in bwn_set_all_gains()
3085 bwn_set_original_gains(struct bwn_mac *mac) in bwn_set_original_gains() argument
3087 struct bwn_phy *phy = &mac->mac_phy; in bwn_set_original_gains()
3092 if (phy->rev <= 1) { in bwn_set_original_gains()
3098 if (phy->rev <= 1) in bwn_set_original_gains()
3105 bwn_ofdmtab_write_2(mac, table, i, tmp); in bwn_set_original_gains()
3109 bwn_ofdmtab_write_2(mac, table, i, i - start); in bwn_set_original_gains()
3111 BWN_PHY_SETMASK(mac, 0x04a0, 0xbfbf, 0x4040); in bwn_set_original_gains()
3112 BWN_PHY_SETMASK(mac, 0x04a1, 0xbfbf, 0x4040); in bwn_set_original_gains()
3113 BWN_PHY_SETMASK(mac, 0x04a2, 0xbfbf, 0x4000); in bwn_set_original_gains()
3114 bwn_dummy_transmission(mac, 0, 1); in bwn_set_original_gains()
3118 bwn_phy_hwpctl_init(struct bwn_mac *mac) in bwn_phy_hwpctl_init() argument
3120 struct bwn_phy *phy = &mac->mac_phy; in bwn_phy_hwpctl_init()
3121 struct bwn_phy_g *pg = &phy->phy_g; in bwn_phy_hwpctl_init()
3124 struct bwn_softc *sc = mac->mac_sc; in bwn_phy_hwpctl_init()
3127 KASSERT(phy->type == BWN_PHYTYPE_G, in bwn_phy_hwpctl_init()
3130 if ((sc->sc_board_info.board_vendor == PCI_VENDOR_BROADCOM) && in bwn_phy_hwpctl_init()
3131 (sc->sc_board_info.board_type == BHND_BOARD_BU4306)) in bwn_phy_hwpctl_init()
3134 BWN_PHY_WRITE(mac, 0x0028, 0x8018); in bwn_phy_hwpctl_init()
3136 BWN_WRITE_2(mac, BWN_PHY0, BWN_READ_2(mac, BWN_PHY0) & 0xffdf); in bwn_phy_hwpctl_init()
3138 if (!phy->gmode) in bwn_phy_hwpctl_init()
3140 bwn_hwpctl_early_init(mac); in bwn_phy_hwpctl_init()
3141 if (pg->pg_curtssi == 0) { in bwn_phy_hwpctl_init()
3142 if (phy->rf_ver == 0x2050 && phy->analog == 0) { in bwn_phy_hwpctl_init()
3143 BWN_RF_SETMASK(mac, 0x0076, 0x00f7, 0x0084); in bwn_phy_hwpctl_init()
3145 memcpy(&old_rfatt, &pg->pg_rfatt, sizeof(old_rfatt)); in bwn_phy_hwpctl_init()
3146 memcpy(&old_bbatt, &pg->pg_bbatt, sizeof(old_bbatt)); in bwn_phy_hwpctl_init()
3147 old_txctl = pg->pg_txctl; in bwn_phy_hwpctl_init()
3150 if (phy->rf_rev == 8) { in bwn_phy_hwpctl_init()
3157 bwn_phy_g_set_txpwr_sub(mac, &bbatt, &rfatt, 0); in bwn_phy_hwpctl_init()
3159 bwn_dummy_transmission(mac, 0, 1); in bwn_phy_hwpctl_init()
3160 pg->pg_curtssi = BWN_PHY_READ(mac, BWN_PHY_TSSI); in bwn_phy_hwpctl_init()
3161 if (phy->rf_ver == 0x2050 && phy->analog == 0) in bwn_phy_hwpctl_init()
3162 BWN_RF_MASK(mac, 0x0076, 0xff7b); in bwn_phy_hwpctl_init()
3164 bwn_phy_g_set_txpwr_sub(mac, &old_bbatt, in bwn_phy_hwpctl_init()
3167 bwn_hwpctl_init_gphy(mac); in bwn_phy_hwpctl_init()
3170 bwn_shm_write_2(mac, BWN_SHARED, 0x0058, 0x7f7f); in bwn_phy_hwpctl_init()
3171 bwn_shm_write_2(mac, BWN_SHARED, 0x005a, 0x7f7f); in bwn_phy_hwpctl_init()
3172 bwn_shm_write_2(mac, BWN_SHARED, 0x0070, 0x7f7f); in bwn_phy_hwpctl_init()
3173 bwn_shm_write_2(mac, BWN_SHARED, 0x0072, 0x7f7f); in bwn_phy_hwpctl_init()
3177 bwn_hwpctl_early_init(struct bwn_mac *mac) in bwn_hwpctl_early_init() argument
3179 struct bwn_phy *phy = &mac->mac_phy; in bwn_hwpctl_early_init()
3181 if (!bwn_has_hwpctl(mac)) { in bwn_hwpctl_early_init()
3182 BWN_PHY_WRITE(mac, 0x047a, 0xc111); in bwn_hwpctl_early_init()
3186 BWN_PHY_MASK(mac, 0x0036, 0xfeff); in bwn_hwpctl_early_init()
3187 BWN_PHY_WRITE(mac, 0x002f, 0x0202); in bwn_hwpctl_early_init()
3188 BWN_PHY_SET(mac, 0x047c, 0x0002); in bwn_hwpctl_early_init()
3189 BWN_PHY_SET(mac, 0x047a, 0xf000); in bwn_hwpctl_early_init()
3190 if (phy->rf_ver == 0x2050 && phy->rf_rev == 8) { in bwn_hwpctl_early_init()
3191 BWN_PHY_SETMASK(mac, 0x047a, 0xff0f, 0x0010); in bwn_hwpctl_early_init()
3192 BWN_PHY_SET(mac, 0x005d, 0x8000); in bwn_hwpctl_early_init()
3193 BWN_PHY_SETMASK(mac, 0x004e, 0xffc0, 0x0010); in bwn_hwpctl_early_init()
3194 BWN_PHY_WRITE(mac, 0x002e, 0xc07f); in bwn_hwpctl_early_init()
3195 BWN_PHY_SET(mac, 0x0036, 0x0400); in bwn_hwpctl_early_init()
3197 BWN_PHY_SET(mac, 0x0036, 0x0200); in bwn_hwpctl_early_init()
3198 BWN_PHY_SET(mac, 0x0036, 0x0400); in bwn_hwpctl_early_init()
3199 BWN_PHY_MASK(mac, 0x005d, 0x7fff); in bwn_hwpctl_early_init()
3200 BWN_PHY_MASK(mac, 0x004f, 0xfffe); in bwn_hwpctl_early_init()
3201 BWN_PHY_SETMASK(mac, 0x004e, 0xffc0, 0x0010); in bwn_hwpctl_early_init()
3202 BWN_PHY_WRITE(mac, 0x002e, 0xc07f); in bwn_hwpctl_early_init()
3203 BWN_PHY_SETMASK(mac, 0x047a, 0xff0f, 0x0010); in bwn_hwpctl_early_init()
3208 bwn_hwpctl_init_gphy(struct bwn_mac *mac) in bwn_hwpctl_init_gphy() argument
3210 struct bwn_phy *phy = &mac->mac_phy; in bwn_hwpctl_init_gphy()
3211 struct bwn_phy_g *pg = &phy->phy_g; in bwn_hwpctl_init_gphy()
3212 struct bwn_txpwr_loctl *lo = &pg->pg_loctl; in bwn_hwpctl_init_gphy()
3217 if (!bwn_has_hwpctl(mac)) { in bwn_hwpctl_init_gphy()
3218 bwn_hf_write(mac, bwn_hf_read(mac) & ~BWN_HF_HW_POWERCTL); in bwn_hwpctl_init_gphy()
3222 BWN_PHY_SETMASK(mac, 0x0036, 0xffc0, in bwn_hwpctl_init_gphy()
3223 (pg->pg_idletssi - pg->pg_curtssi)); in bwn_hwpctl_init_gphy()
3224 BWN_PHY_SETMASK(mac, 0x0478, 0xff00, in bwn_hwpctl_init_gphy()
3225 (pg->pg_idletssi - pg->pg_curtssi)); in bwn_hwpctl_init_gphy()
3228 bwn_ofdmtab_write_2(mac, 0x3c20, i, pg->pg_tssi2dbm[i]); in bwn_hwpctl_init_gphy()
3230 bwn_ofdmtab_write_2(mac, 0x3c00, i - 32, pg->pg_tssi2dbm[i]); in bwn_hwpctl_init_gphy()
3232 value = (uint16_t) pg->pg_tssi2dbm[i]; in bwn_hwpctl_init_gphy()
3233 value |= ((uint16_t) pg->pg_tssi2dbm[i + 1]) << 8; in bwn_hwpctl_init_gphy()
3234 BWN_PHY_WRITE(mac, 0x380 + (i / 2), value); in bwn_hwpctl_init_gphy()
3237 for (rf = 0; rf < lo->rfatt.len; rf++) { in bwn_hwpctl_init_gphy()
3238 for (bb = 0; bb < lo->bbatt.len; bb++) { in bwn_hwpctl_init_gphy()
3241 tmp = lo->bbatt.array[bb].att; in bwn_hwpctl_init_gphy()
3243 if (phy->rf_rev == 8) in bwn_hwpctl_init_gphy()
3247 tmp |= lo->rfatt.array[rf].att; in bwn_hwpctl_init_gphy()
3248 BWN_PHY_WRITE(mac, 0x3c0 + nr_written, tmp); in bwn_hwpctl_init_gphy()
3253 BWN_PHY_MASK(mac, 0x0060, 0xffbf); in bwn_hwpctl_init_gphy()
3254 BWN_PHY_WRITE(mac, 0x0014, 0x0000); in bwn_hwpctl_init_gphy()
3256 KASSERT(phy->rev >= 6, ("%s:%d: fail", __func__, __LINE__)); in bwn_hwpctl_init_gphy()
3257 BWN_PHY_SET(mac, 0x0478, 0x0800); in bwn_hwpctl_init_gphy()
3258 BWN_PHY_MASK(mac, 0x0478, 0xfeff); in bwn_hwpctl_init_gphy()
3259 BWN_PHY_MASK(mac, 0x0801, 0xffbf); in bwn_hwpctl_init_gphy()
3261 bwn_phy_g_dc_lookup_init(mac, 1); in bwn_hwpctl_init_gphy()
3262 bwn_hf_write(mac, bwn_hf_read(mac) | BWN_HF_HW_POWERCTL); in bwn_hwpctl_init_gphy()
3266 bwn_phy_g_switch_chan(struct bwn_mac *mac, int channel, uint8_t spu) in bwn_phy_g_switch_chan() argument
3268 struct bwn_softc *sc = mac->mac_sc; in bwn_phy_g_switch_chan()
3272 bwn_spu_workaround(mac, channel); in bwn_phy_g_switch_chan()
3274 BWN_WRITE_2(mac, BWN_CHANNEL, bwn_phy_g_chan2freq(channel)); in bwn_phy_g_switch_chan()
3279 error = bhnd_nvram_getvar_uint8(sc->sc_dev, BHND_NVAR_CC, &cc); in bwn_phy_g_switch_chan()
3281 device_printf(sc->sc_dev, "error reading country code " in bwn_phy_g_switch_chan()
3288 bwn_hf_write(mac, in bwn_phy_g_switch_chan()
3289 bwn_hf_read(mac) & ~BWN_HF_JAPAN_CHAN14_OFF); in bwn_phy_g_switch_chan()
3291 bwn_hf_write(mac, in bwn_phy_g_switch_chan()
3292 bwn_hf_read(mac) | BWN_HF_JAPAN_CHAN14_OFF); in bwn_phy_g_switch_chan()
3293 BWN_WRITE_2(mac, BWN_CHANNEL_EXT, in bwn_phy_g_switch_chan()
3294 BWN_READ_2(mac, BWN_CHANNEL_EXT) | (1 << 11)); in bwn_phy_g_switch_chan()
3298 BWN_WRITE_2(mac, BWN_CHANNEL_EXT, in bwn_phy_g_switch_chan()
3299 BWN_READ_2(mac, BWN_CHANNEL_EXT) & 0xf7bf); in bwn_phy_g_switch_chan()
3310 return (bwn_phy_g_rf_channels[channel - 1]); in bwn_phy_g_chan2freq()
3314 bwn_phy_g_set_txpwr_sub(struct bwn_mac *mac, const struct bwn_bbatt *bbatt, in bwn_phy_g_set_txpwr_sub() argument
3317 struct bwn_phy *phy = &mac->mac_phy; in bwn_phy_g_set_txpwr_sub()
3318 struct bwn_phy_g *pg = &phy->phy_g; in bwn_phy_g_set_txpwr_sub()
3319 struct bwn_txpwr_loctl *lo = &pg->pg_loctl; in bwn_phy_g_set_txpwr_sub()
3323 bb = bbatt->att; in bwn_phy_g_set_txpwr_sub()
3324 rf = rfatt->att; in bwn_phy_g_set_txpwr_sub()
3325 tx_bias = lo->tx_bias; in bwn_phy_g_set_txpwr_sub()
3326 tx_magn = lo->tx_magn; in bwn_phy_g_set_txpwr_sub()
3330 pg->pg_txctl = txctl; in bwn_phy_g_set_txpwr_sub()
3331 memmove(&pg->pg_rfatt, rfatt, sizeof(*rfatt)); in bwn_phy_g_set_txpwr_sub()
3332 pg->pg_rfatt.padmix = (txctl & BWN_TXCTL_TXMIX) ? 1 : 0; in bwn_phy_g_set_txpwr_sub()
3333 memmove(&pg->pg_bbatt, bbatt, sizeof(*bbatt)); in bwn_phy_g_set_txpwr_sub()
3334 bwn_phy_g_set_bbatt(mac, bb); in bwn_phy_g_set_txpwr_sub()
3335 bwn_shm_write_2(mac, BWN_SHARED, BWN_SHARED_RADIO_ATT, rf); in bwn_phy_g_set_txpwr_sub()
3336 if (phy->rf_ver == 0x2050 && phy->rf_rev == 8) in bwn_phy_g_set_txpwr_sub()
3337 BWN_RF_WRITE(mac, 0x43, (rf & 0x000f) | (txctl & 0x0070)); in bwn_phy_g_set_txpwr_sub()
3339 BWN_RF_SETMASK(mac, 0x43, 0xfff0, (rf & 0x000f)); in bwn_phy_g_set_txpwr_sub()
3340 BWN_RF_SETMASK(mac, 0x52, ~0x0070, (txctl & 0x0070)); in bwn_phy_g_set_txpwr_sub()
3343 BWN_RF_WRITE(mac, 0x52, tx_magn | tx_bias); in bwn_phy_g_set_txpwr_sub()
3345 BWN_RF_SETMASK(mac, 0x52, 0xfff0, (tx_bias & 0x000f)); in bwn_phy_g_set_txpwr_sub()
3346 bwn_lo_g_adjust(mac); in bwn_phy_g_set_txpwr_sub()
3350 bwn_phy_g_set_bbatt(struct bwn_mac *mac, in bwn_phy_g_set_bbatt() argument
3353 struct bwn_phy *phy = &mac->mac_phy; in bwn_phy_g_set_bbatt()
3355 if (phy->analog == 0) { in bwn_phy_g_set_bbatt()
3356 BWN_WRITE_2(mac, BWN_PHY0, in bwn_phy_g_set_bbatt()
3357 (BWN_READ_2(mac, BWN_PHY0) & 0xfff0) | bbatt); in bwn_phy_g_set_bbatt()
3360 if (phy->analog > 1) { in bwn_phy_g_set_bbatt()
3361 BWN_PHY_SETMASK(mac, BWN_PHY_DACCTL, 0xffc3, bbatt << 2); in bwn_phy_g_set_bbatt()
3364 BWN_PHY_SETMASK(mac, BWN_PHY_DACCTL, 0xff87, bbatt << 3); in bwn_phy_g_set_bbatt()
3368 bwn_rf_2050_rfoverval(struct bwn_mac *mac, uint16_t reg, uint32_t lpd) in bwn_rf_2050_rfoverval() argument
3370 struct bwn_phy *phy = &mac->mac_phy; in bwn_rf_2050_rfoverval()
3371 struct bwn_phy_g *pg = &phy->phy_g; in bwn_rf_2050_rfoverval()
3372 struct bwn_softc *sc = mac->mac_sc; in bwn_rf_2050_rfoverval()
3377 if (phy->gmode == 0) in bwn_rf_2050_rfoverval()
3381 max_lb_gain = pg->pg_max_lb_gain; in bwn_rf_2050_rfoverval()
3382 max_lb_gain += (phy->rf_rev == 8) ? 0x3e : 0x26; in bwn_rf_2050_rfoverval()
3385 max_lb_gain -= 0x46; in bwn_rf_2050_rfoverval()
3388 max_lb_gain -= 0x3a; in bwn_rf_2050_rfoverval()
3391 max_lb_gain -= 0x2e; in bwn_rf_2050_rfoverval()
3394 max_lb_gain -= 0x10; in bwn_rf_2050_rfoverval()
3398 max_lb_gain -= (i * 6); in bwn_rf_2050_rfoverval()
3403 if ((phy->rev < 7) || in bwn_rf_2050_rfoverval()
3404 !(sc->sc_board_info.board_flags & BHND_BFL_EXTLNA)) { in bwn_rf_2050_rfoverval()
3447 if ((phy->rev < 7) || in bwn_rf_2050_rfoverval()
3448 !(sc->sc_board_info.board_flags & BHND_BFL_EXTLNA)) { in bwn_rf_2050_rfoverval()
3489 bwn_spu_workaround(struct bwn_mac *mac, uint8_t channel) in bwn_spu_workaround() argument
3492 if (mac->mac_phy.rf_ver != 0x2050 || mac->mac_phy.rf_rev >= 6) in bwn_spu_workaround()
3494 BWN_WRITE_2(mac, BWN_CHANNEL, (channel <= 10) ? in bwn_spu_workaround()
3497 BWN_WRITE_2(mac, BWN_CHANNEL, bwn_phy_g_chan2freq(channel)); in bwn_spu_workaround()
3501 bwn_phy_shm_tssi_read(struct bwn_mac *mac, uint16_t shm_offset) in bwn_phy_shm_tssi_read() argument
3508 tmp = bwn_shm_read_4(mac, BWN_SHARED, shm_offset); in bwn_phy_shm_tssi_read()
3516 bwn_shm_write_4(mac, BWN_SHARED, shm_offset, in bwn_phy_shm_tssi_read()
3529 if (bwn_shm_read_2(mac, BWN_SHARED, BWN_SHARED_HFLO) in bwn_phy_shm_tssi_read()
3531 avg = (avg >= 13) ? (avg - 13) : 0; in bwn_phy_shm_tssi_read()
3537 bwn_phy_g_setatt(struct bwn_mac *mac, int *bbattp, int *rfattp) in bwn_phy_g_setatt() argument
3539 struct bwn_txpwr_loctl *lo = &mac->mac_phy.phy_g.pg_loctl; in bwn_phy_g_setatt()
3544 if (rfatt > lo->rfatt.max && bbatt > lo->bbatt.max - 4) in bwn_phy_g_setatt()
3546 if (rfatt < lo->rfatt.min && bbatt < lo->bbatt.min + 4) in bwn_phy_g_setatt()
3548 if (bbatt > lo->bbatt.max && rfatt > lo->rfatt.max - 1) in bwn_phy_g_setatt()
3550 if (bbatt < lo->bbatt.min && rfatt < lo->rfatt.min + 1) in bwn_phy_g_setatt()
3552 if (bbatt > lo->bbatt.max) { in bwn_phy_g_setatt()
3553 bbatt -= 4; in bwn_phy_g_setatt()
3557 if (bbatt < lo->bbatt.min) { in bwn_phy_g_setatt()
3559 rfatt -= 1; in bwn_phy_g_setatt()
3562 if (rfatt > lo->rfatt.max) { in bwn_phy_g_setatt()
3563 rfatt -= 1; in bwn_phy_g_setatt()
3567 if (rfatt < lo->rfatt.min) { in bwn_phy_g_setatt()
3569 bbatt -= 4; in bwn_phy_g_setatt()
3575 *rfattp = MIN(MAX(rfatt, lo->rfatt.min), lo->rfatt.max); in bwn_phy_g_setatt()
3576 *bbattp = MIN(MAX(bbatt, lo->bbatt.min), lo->bbatt.max); in bwn_phy_g_setatt()
3580 bwn_phy_lock(struct bwn_mac *mac) in bwn_phy_lock() argument
3582 struct bwn_softc *sc = mac->mac_sc; in bwn_phy_lock()
3583 struct ieee80211com *ic = &sc->sc_ic; in bwn_phy_lock()
3585 KASSERT(bhnd_get_hwrev(sc->sc_dev) >= 3, in bwn_phy_lock()
3586 ("%s: unsupported rev %d", __func__, bhnd_get_hwrev(sc->sc_dev))); in bwn_phy_lock()
3588 if (ic->ic_opmode != IEEE80211_M_HOSTAP) in bwn_phy_lock()
3589 bwn_psctl(mac, BWN_PS_AWAKE); in bwn_phy_lock()
3593 bwn_phy_unlock(struct bwn_mac *mac) in bwn_phy_unlock() argument
3595 struct bwn_softc *sc = mac->mac_sc; in bwn_phy_unlock()
3596 struct ieee80211com *ic = &sc->sc_ic; in bwn_phy_unlock()
3598 KASSERT(bhnd_get_hwrev(sc->sc_dev) >= 3, in bwn_phy_unlock()
3599 ("%s: unsupported rev %d", __func__, bhnd_get_hwrev(sc->sc_dev))); in bwn_phy_unlock()
3601 if (ic->ic_opmode != IEEE80211_M_HOSTAP) in bwn_phy_unlock()
3602 bwn_psctl(mac, 0); in bwn_phy_unlock()
3606 bwn_rf_lock(struct bwn_mac *mac) in bwn_rf_lock() argument
3609 BWN_WRITE_4(mac, BWN_MACCTL, in bwn_rf_lock()
3610 BWN_READ_4(mac, BWN_MACCTL) | BWN_MACCTL_RADIO_LOCK); in bwn_rf_lock()
3611 BWN_READ_4(mac, BWN_MACCTL); in bwn_rf_lock()
3616 bwn_rf_unlock(struct bwn_mac *mac) in bwn_rf_unlock() argument
3619 BWN_READ_2(mac, BWN_PHYVER); in bwn_rf_unlock()
3620 BWN_WRITE_4(mac, BWN_MACCTL, in bwn_rf_unlock()
3621 BWN_READ_4(mac, BWN_MACCTL) & ~BWN_MACCTL_RADIO_LOCK); in bwn_rf_unlock()