Lines Matching +full:0 +full:x49c
45 #define BWI_FLAGS 0xf18
46 #define BWI_FLAGS_INTR_MASK __BITS(5, 0)
48 #define BWI_IMSTATE 0xf90
52 #define BWI_INTRVEC 0xf94
54 #define BWI_STATE_LO 0xf98
55 #define BWI_STATE_LO_RESET __BIT(0)
60 #define BWI_STATE_LO_FLAG_PHYCLKEN __BIT(0)
65 #define BWI_STATE_HI 0xf9c
66 #define BWI_STATE_HI_SERROR __BIT(0)
68 #define BWI_STATE_HI_FLAG_MAGIC1 0x1
69 #define BWI_STATE_HI_FLAG_MAGIC2 0x2
70 #define BWI_STATE_HI_FLAG_64BIT 0x1000
73 #define BWI_CONF_LO 0xfa8
74 #define BWI_CONF_LO_SERVTO_MASK __BITS(2, 0) /* service timeout */
79 #define BWI_ID_LO 0xff8
82 #define BWI_BUSREV_0 0
85 #define BWI_ID_HI 0xffc
86 #define BWI_ID_HI_REGWIN_REV(v) (((v) & 0xf) | (((v) & 0x7000) >> 8))
87 #define BWI_ID_HI_REGWIN_TYPE(v) (((v) & 0x8ff0) >> 4)
93 #define BWI_INFO 0x0
94 #define BWI_INFO_BBPID_MASK __BITS(15, 0)
99 #define BWI_CAPABILITY 0x4
102 #define BWI_CONTROL 0x28
103 #define BWI_CONTROL_MAGIC0 0x3a4
104 #define BWI_CONTROL_MAGIC1 0xa4
105 #define BWI_PLL_ON_DELAY 0xb0
106 #define BWI_FREQ_SEL_DELAY 0xb4
108 #define BWI_CLOCK_CTRL 0xb8
109 #define BWI_CLOCK_CTRL_CLKSRC __BITS(2, 0)
116 #define BWI_CLKSRC_LP_OSC 0 /* Low power oscillator */
128 #define BWI_CLOCK_INFO 0xc0
134 #define BWI_BUS_ADDR 0x50
135 #define BWI_BUS_ADDR_MAGIC 0xfd8
137 #define BWI_BUS_DATA 0x54
139 #define BWI_BUS_CONFIG 0x108
147 #define BWI_TXRX_INTR_STATUS_BASE 0x20
148 #define BWI_TXRX_INTR_MASK_BASE 0x24
152 #define BWI_MAC_STATUS 0x120
153 #define BWI_MAC_STATUS_ENABLE __BIT(0)
171 #define BWI_MAC_INTR_STATUS 0x128
172 #define BWI_MAC_INTR_MASK 0x12c
174 #define BWI_MAC_TMPLT_CTRL 0x130
175 #define BWI_MAC_TMPLT_DATA 0x134
177 #define BWI_MAC_PS_STATUS 0x140
179 #define BWI_MOBJ_CTRL 0x160
181 #define BWI_MOBJ_DATA 0x164
182 #define BWI_MOBJ_DATA_UNALIGN 0x166
186 #define BWI_WR_MOBJ_AUTOINC 0x100 /* Auto-increment wr */
187 #define BWI_RD_MOBJ_AUTOINC 0x200 /* Auto-increment rd */
189 #define BWI_FW_UCODE_MOBJ 0x0
191 #define BWI_COMM_MOBJ 0x1
192 #define BWI_COMM_MOBJ_FWREV 0x0
193 #define BWI_COMM_MOBJ_FWPATCHLV 0x2
194 #define BWI_COMM_MOBJ_SLOTTIME 0x10
195 #define BWI_COMM_MOBJ_MACREV 0x16
196 #define BWI_COMM_MOBJ_TX_ACK 0x22
197 #define BWI_COMM_MOBJ_UCODE_STATE 0x40
198 #define BWI_COMM_MOBJ_SHRETRY_FB 0x44
199 #define BWI_COMM_MOBJ_LGRETEY_FB 0x46
200 #define BWI_COMM_MOBJ_TX_BEACON 0x54
201 #define BWI_COMM_MOBJ_KEYTABLE_OFS 0x56
202 #define BWI_COMM_MOBJ_TSSI_DS 0x58
203 #define BWI_COMM_MOBJ_HFLAGS_LO 0x5e
204 #define BWI_COMM_MOBJ_HFLAGS_MI 0x60
205 #define BWI_COMM_MOBJ_HFLAGS_HI 0x62
206 #define BWI_COMM_MOBJ_RF_ATTEN 0x64
207 #define BWI_COMM_MOBJ_RF_NOISE 0x6e
208 #define BWI_COMM_MOBJ_TSSI_OFDM 0x70
209 #define BWI_COMM_MOBJ_PROBE_RESP_TO 0x74
210 #define BWI_COMM_MOBJ_CHAN 0xa0
211 #define BWI_COMM_MOBJ_KEY_ALGO 0x100
212 #define BWI_COMM_MOBJ_TX_PROBE_RESP 0x188
213 #define BWI_HFLAG_AUTO_ANTDIV 0x1ULL
214 #define BWI_HFLAG_SYM_WA 0x2ULL /* ??? SYM work around */
215 #define BWI_HFLAG_PWR_BOOST_DS 0x8ULL
216 #define BWI_HFLAG_GDC_WA 0x20ULL /* ??? GDC work around */
217 #define BWI_HFLAG_OFDM_PA 0x40ULL
218 #define BWI_HFLAG_NOT_JAPAN 0x80ULL
219 #define BWI_HFLAG_MAGIC1 0x200ULL
221 #define BWI_LO_TSSI_MASK __BITS(7, 0)
223 #define BWI_INVALID_TSSI 0x7f
225 #define BWI_80211_MOBJ 0x2
226 #define BWI_80211_MOBJ_CWMIN 0xc
227 #define BWI_80211_MOBJ_CWMAX 0x10
228 #define BWI_80211_MOBJ_SHRETRY 0x18
229 #define BWI_80211_MOBJ_LGRETRY 0x1c
231 #define BWI_FW_PCM_MOBJ 0x3
233 #define BWI_PKEY_ADDR_MOBJ 0x4
235 #define BWI_TXSTATUS0 0x170
236 #define BWI_TXSTATUS0_VALID __BIT(0)
245 #define BWI_TXSTATUS1 0x174
247 #define BWI_TXRX_CTRL_BASE 0x200
248 #define BWI_TX32_CTRL 0x0
249 #define BWI_TX32_RINGINFO 0x4
250 #define BWI_TX32_INDEX 0x8
251 #define BWI_TX32_STATUS 0xc
253 #define BWI_TX32_STATUS_STATE_DISABLED 0
256 #define BWI_RX32_CTRL 0x10
258 #define BWI_RX32_RINGINFO 0x14
259 #define BWI_RX32_INDEX 0x18
260 #define BWI_RX32_STATUS 0x1c
261 #define BWI_RX32_STATUS_INDEX_MASK __BITS(11, 0)
263 #define BWI_RX32_STATUS_STATE_DISABLED 0
265 #define BWI_TXRX32_CTRL_ENABLE __BIT(0)
268 #define BWI_TXRX32_RINGINFO_FUNC_TXRX 0x1
270 #define BWI_TXRX32_RINGINFO_ADDR_MASK __BITS(29, 0)
272 #define BWI_PHYINFO 0x3e0
273 #define BWI_PHYINFO_REV_MASK __BITS(3, 0)
275 #define BWI_PHYINFO_TYPE_11A 0
282 #define BWI_RF_ANTDIV 0x3e2 /* Antenna Diversity?? */
284 #define BWI_PHY_MAGIC_REG1 0x3e4
285 #define BWI_PHY_MAGIC_REG1_VAL1 0x3000
286 #define BWI_PHY_MAGIC_REG1_VAL2 0x9
288 #define BWI_BBP_ATTEN 0x3e6
289 #define BWI_BBP_ATTEN_MAGIC 0xf4
290 #define BWI_BBP_ATTEN_MAGIC2 0x8140
292 #define BWI_BPHY_CTRL 0x3ec
293 #define BWI_BPHY_CTRL_INIT 0x3f22
295 #define BWI_RF_CHAN 0x3f0
296 #define BWI_RF_CHAN_EX 0x3f4
298 #define BWI_RF_CTRL 0x3f6
300 #define BWI_RF_CTRL_RFINFO 0x1
302 #define BWI_RF_CTRL_RD_11A 0x40
303 #define BWI_RF_CTRL_RD_11BG 0x80
304 #define BWI_RF_DATA_HI 0x3f8
305 #define BWI_RF_DATA_LO 0x3fa
307 #define BWI_RFINFO_MANUFACT_MASK __BITS(11, 0)
308 #define BWI_RF_MANUFACT_BCM 0x17f /* XXX */
310 #define BWI_RF_T_BCM2050 0x2050
311 #define BWI_RF_T_BCM2053 0x2053
312 #define BWI_RF_T_BCM2060 0x2060
315 #define BWI_PHY_CTRL 0x3fc
316 #define BWI_PHY_DATA 0x3fe
318 #define BWI_ADDR_FILTER_CTRL 0x420
319 #define BWI_ADDR_FILTER_CTRL_SET 0x20
320 #define BWI_ADDR_FILTER_MYADDR 0
322 #define BWI_ADDR_FILTER_DATA 0x422
324 #define BWI_MAC_GPIO_CTRL 0x49c
325 #define BWI_MAC_GPIO_MASK 0x49e
326 #define BWI_MAC_PRE_TBTT 0x612
327 #define BWI_MAC_SLOTTIME 0x684
329 #define BWI_MAC_POWERUP_DELAY 0x6a8
339 #define BWI_GPIO_CTRL 0x6c
341 #define PCI_VENDOR_BROADCOM 0x14e4 /* Broadcom */
342 #define PCI_PRODUCT_BROADCOM_BCM4309 0x4324
347 #define BWI_PCIR_BAR PCIR_BAR(0)
348 #define BWI_PCIR_SEL_REGWIN 0x80
350 #define BWI_PCIM_REGWIN(id) (((id) * 0x1000) + 0x18000000)
351 #define BWI_PCIR_GPIO_IN 0xb0
352 #define BWI_PCIR_GPIO_OUT 0xb4
354 #define BWI_PCIR_GPIO_ENABLE 0xb8
358 #define BWI_PCIR_INTCTL 0x94
363 #define BWI_PCI_SUBDEVICE_BU4306 0x416
364 #define BWI_PCI_SUBDEVICE_BCM4309G 0x421
376 #define BWI_SPROM_START 0x1000
377 #define BWI_SPROM_11BG_EADDR 0x48
378 #define BWI_SPROM_11A_EADDR 0x54
379 #define BWI_SPROM_CARD_INFO 0x5c
382 #define BWI_SPROM_PA_PARAM_11BG 0x5e
383 #define BWI_SPROM_GPIO01 0x64
384 #define BWI_SPROM_GPIO_0 __BITS(7, 0)
386 #define BWI_SPROM_GPIO23 0x66
387 #define BWI_SPROM_GPIO_2 __BITS(7, 0)
389 #define BWI_SPROM_MAX_TXPWR 0x68
390 #define BWI_SPROM_MAX_TXPWR_MASK_11BG __BITS(7, 0) /* XXX */
392 #define BWI_SPROM_PA_PARAM_11A 0x6a
393 #define BWI_SPROM_IDLE_TSSI 0x70
394 #define BWI_SPROM_IDLE_TSSI_MASK_11BG __BITS(7, 0) /* XXX */
396 #define BWI_SPROM_CARD_FLAGS 0x72
397 #define BWI_SPROM_ANT_GAIN 0x74
398 #define BWI_SPROM_ANT_GAIN_MASK_11A __BITS(7, 0)
404 #define BWI_CARD_F_BT_COEXIST __BIT(0) /* Bluetooth coexist */
415 #define BWI_LED_ACT_MASK __BITS(6, 0)
416 #define BWI_LED_ACT_OFF 0
450 #define BWI_BBPID_BCM4301 0x4301
451 #define BWI_BBPID_BCM4306 0x4306
452 #define BWI_BBPID_BCM4317 0x4317
453 #define BWI_BBPID_BCM4320 0x4320
454 #define BWI_BBPID_BCM4321 0x4321
459 #define BWI_REGWIN_T_COM 0x800
460 #define BWI_REGWIN_T_BUSPCI 0x804
461 #define BWI_REGWIN_T_MAC 0x812
462 #define BWI_REGWIN_T_BUSPCIE 0x820
467 #define BWI_INTR_READY __BIT(0)
486 #define BWI_ALL_INTRS 0xffffffff
495 #define BWI_TXRX_IS_RX(i) ((i) % 3 == 0)