Lines Matching +full:mac +full:-
1 /*-
2 * SPDX-License-Identifier: BSD-3-Clause
87 static void bwi_tbl_write_2(struct bwi_mac *mac, uint16_t, uint16_t);
88 static void bwi_tbl_write_4(struct bwi_mac *mac, uint16_t, uint32_t);
135 bwi_phy_write(struct bwi_mac *mac, uint16_t ctrl, uint16_t data) in bwi_phy_write() argument
137 struct bwi_softc *sc = mac->mac_sc; in bwi_phy_write()
144 bwi_phy_read(struct bwi_mac *mac, uint16_t ctrl) in bwi_phy_read() argument
146 struct bwi_softc *sc = mac->mac_sc; in bwi_phy_read()
153 bwi_phy_attach(struct bwi_mac *mac) in bwi_phy_attach() argument
155 struct bwi_softc *sc = mac->mac_sc; in bwi_phy_attach()
156 struct bwi_phy *phy = &mac->mac_phy; in bwi_phy_attach()
166 device_printf(sc->sc_dev, "PHY: type %d, rev %d, ver %d\n", in bwi_phy_attach()
176 device_printf(sc->sc_dev, "unsupported 11A PHY, " in bwi_phy_attach()
180 phy->phy_init = bwi_phy_init_11a; in bwi_phy_attach()
181 phy->phy_mode = IEEE80211_MODE_11A; in bwi_phy_attach()
182 phy->phy_tbl_ctrl = BWI_PHYR_TBL_CTRL_11A; in bwi_phy_attach()
183 phy->phy_tbl_data_lo = BWI_PHYR_TBL_DATA_LO_11A; in bwi_phy_attach()
184 phy->phy_tbl_data_hi = BWI_PHYR_TBL_DATA_HI_11A; in bwi_phy_attach()
189 phy->phy_init = bwi_sup_bphy[i].init; in bwi_phy_attach()
194 device_printf(sc->sc_dev, "unsupported 11B PHY, " in bwi_phy_attach()
198 phy->phy_mode = IEEE80211_MODE_11B; in bwi_phy_attach()
202 device_printf(sc->sc_dev, "unsupported 11G PHY, " in bwi_phy_attach()
206 phy->phy_init = bwi_phy_init_11g; in bwi_phy_attach()
207 phy->phy_mode = IEEE80211_MODE_11G; in bwi_phy_attach()
208 phy->phy_tbl_ctrl = BWI_PHYR_TBL_CTRL_11G; in bwi_phy_attach()
209 phy->phy_tbl_data_lo = BWI_PHYR_TBL_DATA_LO_11G; in bwi_phy_attach()
210 phy->phy_tbl_data_hi = BWI_PHYR_TBL_DATA_HI_11G; in bwi_phy_attach()
213 device_printf(sc->sc_dev, "unsupported PHY type %d\n", in bwi_phy_attach()
217 phy->phy_rev = phyrev; in bwi_phy_attach()
218 phy->phy_version = phyver; in bwi_phy_attach()
223 bwi_phy_set_bbp_atten(struct bwi_mac *mac, uint16_t bbp_atten) in bwi_phy_set_bbp_atten() argument
225 struct bwi_phy *phy = &mac->mac_phy; in bwi_phy_set_bbp_atten()
228 if (phy->phy_version == 0) { in bwi_phy_set_bbp_atten()
229 CSR_FILT_SETBITS_2(mac->mac_sc, BWI_BBP_ATTEN, ~mask, in bwi_phy_set_bbp_atten()
232 if (phy->phy_version > 1) in bwi_phy_set_bbp_atten()
236 PHY_FILT_SETBITS(mac, BWI_PHYR_BBP_ATTEN, ~mask, in bwi_phy_set_bbp_atten()
242 bwi_phy_calibrate(struct bwi_mac *mac) in bwi_phy_calibrate() argument
244 struct bwi_phy *phy = &mac->mac_phy; in bwi_phy_calibrate()
247 CSR_READ_4(mac->mac_sc, BWI_MAC_STATUS); in bwi_phy_calibrate()
249 /* Don't re-init */ in bwi_phy_calibrate()
250 if (phy->phy_flags & BWI_PHY_F_CALIBRATED) in bwi_phy_calibrate()
253 if (phy->phy_mode == IEEE80211_MODE_11G && phy->phy_rev == 1) { in bwi_phy_calibrate()
254 bwi_mac_reset(mac, 0); in bwi_phy_calibrate()
255 bwi_phy_init_11g(mac); in bwi_phy_calibrate()
256 bwi_mac_reset(mac, 1); in bwi_phy_calibrate()
259 phy->phy_flags |= BWI_PHY_F_CALIBRATED; in bwi_phy_calibrate()
264 bwi_tbl_write_2(struct bwi_mac *mac, uint16_t ofs, uint16_t data) in bwi_tbl_write_2() argument
266 struct bwi_phy *phy = &mac->mac_phy; in bwi_tbl_write_2()
268 KASSERT(phy->phy_tbl_ctrl != 0 && phy->phy_tbl_data_lo != 0, in bwi_tbl_write_2()
270 phy->phy_tbl_ctrl, phy->phy_tbl_data_lo)); in bwi_tbl_write_2()
271 PHY_WRITE(mac, phy->phy_tbl_ctrl, ofs); in bwi_tbl_write_2()
272 PHY_WRITE(mac, phy->phy_tbl_data_lo, data); in bwi_tbl_write_2()
276 bwi_tbl_write_4(struct bwi_mac *mac, uint16_t ofs, uint32_t data) in bwi_tbl_write_4() argument
278 struct bwi_phy *phy = &mac->mac_phy; in bwi_tbl_write_4()
280 KASSERT(phy->phy_tbl_data_lo != 0 && phy->phy_tbl_data_hi != 0 && in bwi_tbl_write_4()
281 phy->phy_tbl_ctrl != 0, in bwi_tbl_write_4()
283 phy->phy_tbl_data_lo, phy->phy_tbl_data_hi, phy->phy_tbl_ctrl)); in bwi_tbl_write_4()
285 PHY_WRITE(mac, phy->phy_tbl_ctrl, ofs); in bwi_tbl_write_4()
286 PHY_WRITE(mac, phy->phy_tbl_data_hi, data >> 16); in bwi_tbl_write_4()
287 PHY_WRITE(mac, phy->phy_tbl_data_lo, data & 0xffff); in bwi_tbl_write_4()
291 bwi_nrssi_write(struct bwi_mac *mac, uint16_t ofs, int16_t data) in bwi_nrssi_write() argument
293 PHY_WRITE(mac, BWI_PHYR_NRSSI_CTRL, ofs); in bwi_nrssi_write()
294 PHY_WRITE(mac, BWI_PHYR_NRSSI_DATA, (uint16_t)data); in bwi_nrssi_write()
298 bwi_nrssi_read(struct bwi_mac *mac, uint16_t ofs) in bwi_nrssi_read() argument
300 PHY_WRITE(mac, BWI_PHYR_NRSSI_CTRL, ofs); in bwi_nrssi_read()
301 return (int16_t)PHY_READ(mac, BWI_PHYR_NRSSI_DATA); in bwi_nrssi_read()
305 bwi_phy_init_11a(struct bwi_mac *mac) in bwi_phy_init_11a() argument
311 bwi_phy_init_11g(struct bwi_mac *mac) in bwi_phy_init_11g() argument
313 struct bwi_softc *sc = mac->mac_sc; in bwi_phy_init_11g()
314 struct bwi_phy *phy = &mac->mac_phy; in bwi_phy_init_11g()
315 struct bwi_rf *rf = &mac->mac_rf; in bwi_phy_init_11g()
316 const struct bwi_tpctl *tpctl = &mac->mac_tpctl; in bwi_phy_init_11g()
318 if (phy->phy_rev == 1) in bwi_phy_init_11g()
319 bwi_phy_init_11b_rev5(mac); in bwi_phy_init_11g()
321 bwi_phy_init_11b_rev6(mac); in bwi_phy_init_11g()
323 if (phy->phy_rev >= 2 || (phy->phy_flags & BWI_PHY_F_LINKED)) in bwi_phy_init_11g()
324 bwi_phy_config_11g(mac); in bwi_phy_init_11g()
326 if (phy->phy_rev >= 2) { in bwi_phy_init_11g()
327 PHY_WRITE(mac, 0x814, 0); in bwi_phy_init_11g()
328 PHY_WRITE(mac, 0x815, 0); in bwi_phy_init_11g()
330 if (phy->phy_rev == 2) { in bwi_phy_init_11g()
331 PHY_WRITE(mac, 0x811, 0); in bwi_phy_init_11g()
332 PHY_WRITE(mac, 0x15, 0xc0); in bwi_phy_init_11g()
333 } else if (phy->phy_rev > 5) { in bwi_phy_init_11g()
334 PHY_WRITE(mac, 0x811, 0x400); in bwi_phy_init_11g()
335 PHY_WRITE(mac, 0x15, 0xc0); in bwi_phy_init_11g()
339 if (phy->phy_rev >= 2 || (phy->phy_flags & BWI_PHY_F_LINKED)) { in bwi_phy_init_11g()
342 val = PHY_READ(mac, 0x400) & 0xff; in bwi_phy_init_11g()
344 PHY_WRITE(mac, 0x4c2, 0x1816); in bwi_phy_init_11g()
345 PHY_WRITE(mac, 0x4c3, 0x8006); in bwi_phy_init_11g()
347 PHY_FILT_SETBITS(mac, 0x4cc, in bwi_phy_init_11g()
353 if ((phy->phy_rev <= 2 && (phy->phy_flags & BWI_PHY_F_LINKED)) || in bwi_phy_init_11g()
354 phy->phy_rev >= 2) in bwi_phy_init_11g()
355 PHY_WRITE(mac, 0x47e, 0x78); in bwi_phy_init_11g()
357 if (rf->rf_rev == 8) { in bwi_phy_init_11g()
358 PHY_SETBITS(mac, 0x801, 0x80); in bwi_phy_init_11g()
359 PHY_SETBITS(mac, 0x43e, 0x4); in bwi_phy_init_11g()
362 if (phy->phy_rev >= 2 && (phy->phy_flags & BWI_PHY_F_LINKED)) in bwi_phy_init_11g()
363 bwi_rf_get_gains(mac); in bwi_phy_init_11g()
365 if (rf->rf_rev != 8) in bwi_phy_init_11g()
366 bwi_rf_init(mac); in bwi_phy_init_11g()
368 if (tpctl->tp_ctrl2 == 0xffff) { in bwi_phy_init_11g()
369 bwi_rf_lo_update(mac); in bwi_phy_init_11g()
371 if (rf->rf_type == BWI_RF_T_BCM2050 && rf->rf_rev == 8) { in bwi_phy_init_11g()
372 RF_WRITE(mac, 0x52, in bwi_phy_init_11g()
373 (tpctl->tp_ctrl1 << 4) | tpctl->tp_ctrl2); in bwi_phy_init_11g()
375 RF_FILT_SETBITS(mac, 0x52, 0xfff0, tpctl->tp_ctrl2); in bwi_phy_init_11g()
378 if (phy->phy_rev >= 6) { in bwi_phy_init_11g()
379 PHY_FILT_SETBITS(mac, 0x36, 0xfff, in bwi_phy_init_11g()
380 tpctl->tp_ctrl2 << 12); in bwi_phy_init_11g()
383 if (sc->sc_card_flags & BWI_CARD_F_PA_GPIO9) in bwi_phy_init_11g()
384 PHY_WRITE(mac, 0x2e, 0x8075); in bwi_phy_init_11g()
386 PHY_WRITE(mac, 0x2e, 0x807f); in bwi_phy_init_11g()
388 if (phy->phy_rev < 2) in bwi_phy_init_11g()
389 PHY_WRITE(mac, 0x2f, 0x101); in bwi_phy_init_11g()
391 PHY_WRITE(mac, 0x2f, 0x202); in bwi_phy_init_11g()
394 if ((phy->phy_flags & BWI_PHY_F_LINKED) || phy->phy_rev >= 2) { in bwi_phy_init_11g()
395 bwi_rf_lo_adjust(mac, tpctl); in bwi_phy_init_11g()
396 PHY_WRITE(mac, 0x80f, 0x8078); in bwi_phy_init_11g()
399 if ((sc->sc_card_flags & BWI_CARD_F_SW_NRSSI) == 0) { in bwi_phy_init_11g()
400 bwi_rf_init_hw_nrssi_table(mac, 0xffff /* XXX */); in bwi_phy_init_11g()
401 bwi_rf_set_nrssi_thr(mac); in bwi_phy_init_11g()
402 } else if ((phy->phy_flags & BWI_PHY_F_LINKED) || phy->phy_rev >= 2) { in bwi_phy_init_11g()
403 if (rf->rf_nrssi[0] == BWI_INVALID_NRSSI) { in bwi_phy_init_11g()
404 KASSERT(rf->rf_nrssi[1] == BWI_INVALID_NRSSI, in bwi_phy_init_11g()
405 ("rf_nrssi[1] %d", rf->rf_nrssi[1])); in bwi_phy_init_11g()
406 bwi_rf_calc_nrssi_slope(mac); in bwi_phy_init_11g()
408 KASSERT(rf->rf_nrssi[1] != BWI_INVALID_NRSSI, in bwi_phy_init_11g()
409 ("rf_nrssi[1] %d", rf->rf_nrssi[1])); in bwi_phy_init_11g()
410 bwi_rf_set_nrssi_thr(mac); in bwi_phy_init_11g()
414 if (rf->rf_rev == 8) in bwi_phy_init_11g()
415 PHY_WRITE(mac, 0x805, 0x3230); in bwi_phy_init_11g()
417 bwi_mac_init_tpctl_11bg(mac); in bwi_phy_init_11g()
419 if (sc->sc_bbp_id == BWI_BBPID_BCM4306 && sc->sc_bbp_pkg == 2) { in bwi_phy_init_11g()
420 PHY_CLRBITS(mac, 0x429, 0x4000); in bwi_phy_init_11g()
421 PHY_CLRBITS(mac, 0x4c3, 0x8000); in bwi_phy_init_11g()
426 bwi_phy_init_11b_rev2(struct bwi_mac *mac) in bwi_phy_init_11b_rev2() argument
429 device_printf(mac->mac_sc->sc_dev, in bwi_phy_init_11b_rev2()
434 bwi_phy_init_11b_rev4(struct bwi_mac *mac) in bwi_phy_init_11b_rev4() argument
436 struct bwi_softc *sc = mac->mac_sc; in bwi_phy_init_11b_rev4()
437 struct bwi_rf *rf = &mac->mac_rf; in bwi_phy_init_11b_rev4()
443 PHY_WRITE(mac, 0x20, 0x301c); in bwi_phy_init_11b_rev4()
444 PHY_WRITE(mac, 0x26, 0); in bwi_phy_init_11b_rev4()
445 PHY_WRITE(mac, 0x30, 0xc6); in bwi_phy_init_11b_rev4()
446 PHY_WRITE(mac, 0x88, 0x3e00); in bwi_phy_init_11b_rev4()
448 for (ofs = 0, val = 0x3c3d; ofs < 30; ++ofs, val -= 0x202) in bwi_phy_init_11b_rev4()
449 PHY_WRITE(mac, 0x89 + ofs, val); in bwi_phy_init_11b_rev4()
453 chan = rf->rf_curchan; in bwi_phy_init_11b_rev4()
456 bwi_rf_set_chan(mac, chan, 0); in bwi_phy_init_11b_rev4()
458 if (rf->rf_type != BWI_RF_T_BCM2050) { in bwi_phy_init_11b_rev4()
459 RF_WRITE(mac, 0x75, 0x80); in bwi_phy_init_11b_rev4()
460 RF_WRITE(mac, 0x79, 0x81); in bwi_phy_init_11b_rev4()
463 RF_WRITE(mac, 0x50, 0x20); in bwi_phy_init_11b_rev4()
464 RF_WRITE(mac, 0x50, 0x23); in bwi_phy_init_11b_rev4()
466 if (rf->rf_type == BWI_RF_T_BCM2050) { in bwi_phy_init_11b_rev4()
467 RF_WRITE(mac, 0x50, 0x20); in bwi_phy_init_11b_rev4()
468 RF_WRITE(mac, 0x5a, 0x70); in bwi_phy_init_11b_rev4()
469 RF_WRITE(mac, 0x5b, 0x7b); in bwi_phy_init_11b_rev4()
470 RF_WRITE(mac, 0x5c, 0xb0); in bwi_phy_init_11b_rev4()
471 RF_WRITE(mac, 0x7a, 0xf); in bwi_phy_init_11b_rev4()
472 PHY_WRITE(mac, 0x38, 0x677); in bwi_phy_init_11b_rev4()
473 bwi_rf_init_bcm2050(mac); in bwi_phy_init_11b_rev4()
476 PHY_WRITE(mac, 0x14, 0x80); in bwi_phy_init_11b_rev4()
477 PHY_WRITE(mac, 0x32, 0xca); in bwi_phy_init_11b_rev4()
478 if (rf->rf_type == BWI_RF_T_BCM2050) in bwi_phy_init_11b_rev4()
479 PHY_WRITE(mac, 0x32, 0xe0); in bwi_phy_init_11b_rev4()
480 PHY_WRITE(mac, 0x35, 0x7c2); in bwi_phy_init_11b_rev4()
482 bwi_rf_lo_update(mac); in bwi_phy_init_11b_rev4()
484 PHY_WRITE(mac, 0x26, 0xcc00); in bwi_phy_init_11b_rev4()
485 if (rf->rf_type == BWI_RF_T_BCM2050) in bwi_phy_init_11b_rev4()
486 PHY_WRITE(mac, 0x26, 0xce00); in bwi_phy_init_11b_rev4()
490 PHY_WRITE(mac, 0x2a, 0x88a3); in bwi_phy_init_11b_rev4()
491 if (rf->rf_type == BWI_RF_T_BCM2050) in bwi_phy_init_11b_rev4()
492 PHY_WRITE(mac, 0x2a, 0x88c2); in bwi_phy_init_11b_rev4()
494 bwi_mac_set_tpctl_11bg(mac, NULL); in bwi_phy_init_11b_rev4()
495 if (sc->sc_card_flags & BWI_CARD_F_SW_NRSSI) { in bwi_phy_init_11b_rev4()
496 bwi_rf_calc_nrssi_slope(mac); in bwi_phy_init_11b_rev4()
497 bwi_rf_set_nrssi_thr(mac); in bwi_phy_init_11b_rev4()
499 bwi_mac_init_tpctl_11bg(mac); in bwi_phy_init_11b_rev4()
503 bwi_phy_init_11b_rev5(struct bwi_mac *mac) in bwi_phy_init_11b_rev5() argument
505 struct bwi_softc *sc = mac->mac_sc; in bwi_phy_init_11b_rev5()
506 struct bwi_rf *rf = &mac->mac_rf; in bwi_phy_init_11b_rev5()
507 struct bwi_phy *phy = &mac->mac_phy; in bwi_phy_init_11b_rev5()
510 if (phy->phy_version == 1) in bwi_phy_init_11b_rev5()
511 RF_SETBITS(mac, 0x7a, 0x50); in bwi_phy_init_11b_rev5()
513 if (sc->sc_pci_subvid != PCI_VENDOR_BROADCOM && in bwi_phy_init_11b_rev5()
514 sc->sc_pci_subdid != BWI_PCI_SUBDEVICE_BU4306) { in bwi_phy_init_11b_rev5()
519 PHY_WRITE(mac, ofs, val); in bwi_phy_init_11b_rev5()
524 PHY_FILT_SETBITS(mac, 0x35, 0xf0ff, 0x700); in bwi_phy_init_11b_rev5()
526 if (rf->rf_type == BWI_RF_T_BCM2050) in bwi_phy_init_11b_rev5()
527 PHY_WRITE(mac, 0x38, 0x667); in bwi_phy_init_11b_rev5()
529 if ((phy->phy_flags & BWI_PHY_F_LINKED) || phy->phy_rev >= 2) { in bwi_phy_init_11b_rev5()
530 if (rf->rf_type == BWI_RF_T_BCM2050) { in bwi_phy_init_11b_rev5()
531 RF_SETBITS(mac, 0x7a, 0x20); in bwi_phy_init_11b_rev5()
532 RF_SETBITS(mac, 0x51, 0x4); in bwi_phy_init_11b_rev5()
537 PHY_SETBITS(mac, 0x802, 0x100); in bwi_phy_init_11b_rev5()
538 PHY_SETBITS(mac, 0x42b, 0x2000); in bwi_phy_init_11b_rev5()
539 PHY_WRITE(mac, 0x1c, 0x186a); in bwi_phy_init_11b_rev5()
541 PHY_FILT_SETBITS(mac, 0x13, 0xff, 0x1900); in bwi_phy_init_11b_rev5()
542 PHY_FILT_SETBITS(mac, 0x35, 0xffc0, 0x64); in bwi_phy_init_11b_rev5()
543 PHY_FILT_SETBITS(mac, 0x5d, 0xff80, 0xa); in bwi_phy_init_11b_rev5()
548 if (phy->phy_version == 1) { in bwi_phy_init_11b_rev5()
549 PHY_WRITE(mac, 0x26, 0xce00); in bwi_phy_init_11b_rev5()
550 PHY_WRITE(mac, 0x21, 0x3763); in bwi_phy_init_11b_rev5()
551 PHY_WRITE(mac, 0x22, 0x1bc3); in bwi_phy_init_11b_rev5()
552 PHY_WRITE(mac, 0x23, 0x6f9); in bwi_phy_init_11b_rev5()
553 PHY_WRITE(mac, 0x24, 0x37e); in bwi_phy_init_11b_rev5()
555 PHY_WRITE(mac, 0x26, 0xcc00); in bwi_phy_init_11b_rev5()
557 PHY_WRITE(mac, 0x30, 0xc6); in bwi_phy_init_11b_rev5()
561 if (phy->phy_version == 1) in bwi_phy_init_11b_rev5()
562 PHY_WRITE(mac, 0x20, 0x3e1c); in bwi_phy_init_11b_rev5()
564 PHY_WRITE(mac, 0x20, 0x301c); in bwi_phy_init_11b_rev5()
566 if (phy->phy_version == 0) in bwi_phy_init_11b_rev5()
570 orig_chan = rf->rf_curchan; in bwi_phy_init_11b_rev5()
571 bwi_rf_set_chan(mac, 7, 0); in bwi_phy_init_11b_rev5()
573 if (rf->rf_type != BWI_RF_T_BCM2050) { in bwi_phy_init_11b_rev5()
574 RF_WRITE(mac, 0x75, 0x80); in bwi_phy_init_11b_rev5()
575 RF_WRITE(mac, 0x79, 0x81); in bwi_phy_init_11b_rev5()
578 RF_WRITE(mac, 0x50, 0x20); in bwi_phy_init_11b_rev5()
579 RF_WRITE(mac, 0x50, 0x23); in bwi_phy_init_11b_rev5()
581 if (rf->rf_type == BWI_RF_T_BCM2050) { in bwi_phy_init_11b_rev5()
582 RF_WRITE(mac, 0x50, 0x20); in bwi_phy_init_11b_rev5()
583 RF_WRITE(mac, 0x5a, 0x70); in bwi_phy_init_11b_rev5()
586 RF_WRITE(mac, 0x5b, 0x7b); in bwi_phy_init_11b_rev5()
587 RF_WRITE(mac, 0x5c, 0xb0); in bwi_phy_init_11b_rev5()
588 RF_SETBITS(mac, 0x7a, 0x7); in bwi_phy_init_11b_rev5()
590 bwi_rf_set_chan(mac, orig_chan, 0); in bwi_phy_init_11b_rev5()
592 PHY_WRITE(mac, 0x14, 0x80); in bwi_phy_init_11b_rev5()
593 PHY_WRITE(mac, 0x32, 0xca); in bwi_phy_init_11b_rev5()
594 PHY_WRITE(mac, 0x2a, 0x88a3); in bwi_phy_init_11b_rev5()
596 bwi_mac_set_tpctl_11bg(mac, NULL); in bwi_phy_init_11b_rev5()
598 if (rf->rf_type == BWI_RF_T_BCM2050) in bwi_phy_init_11b_rev5()
599 RF_WRITE(mac, 0x5d, 0xd); in bwi_phy_init_11b_rev5()
605 bwi_phy_init_11b_rev6(struct bwi_mac *mac) in bwi_phy_init_11b_rev6() argument
607 struct bwi_softc *sc = mac->mac_sc; in bwi_phy_init_11b_rev6()
608 struct bwi_rf *rf = &mac->mac_rf; in bwi_phy_init_11b_rev6()
609 struct bwi_phy *phy = &mac->mac_phy; in bwi_phy_init_11b_rev6()
613 PHY_WRITE(mac, 0x3e, 0x817a); in bwi_phy_init_11b_rev6()
614 RF_SETBITS(mac, 0x7a, 0x58); in bwi_phy_init_11b_rev6()
616 if (rf->rf_rev == 4 || rf->rf_rev == 5) { in bwi_phy_init_11b_rev6()
617 RF_WRITE(mac, 0x51, 0x37); in bwi_phy_init_11b_rev6()
618 RF_WRITE(mac, 0x52, 0x70); in bwi_phy_init_11b_rev6()
619 RF_WRITE(mac, 0x53, 0xb3); in bwi_phy_init_11b_rev6()
620 RF_WRITE(mac, 0x54, 0x9b); in bwi_phy_init_11b_rev6()
621 RF_WRITE(mac, 0x5a, 0x88); in bwi_phy_init_11b_rev6()
622 RF_WRITE(mac, 0x5b, 0x88); in bwi_phy_init_11b_rev6()
623 RF_WRITE(mac, 0x5d, 0x88); in bwi_phy_init_11b_rev6()
624 RF_WRITE(mac, 0x5e, 0x88); in bwi_phy_init_11b_rev6()
625 RF_WRITE(mac, 0x7d, 0x88); in bwi_phy_init_11b_rev6()
626 HFLAGS_SETBITS(mac, BWI_HFLAG_MAGIC1); in bwi_phy_init_11b_rev6()
627 } else if (rf->rf_rev == 8) { in bwi_phy_init_11b_rev6()
628 RF_WRITE(mac, 0x51, 0); in bwi_phy_init_11b_rev6()
629 RF_WRITE(mac, 0x52, 0x40); in bwi_phy_init_11b_rev6()
630 RF_WRITE(mac, 0x53, 0xb7); in bwi_phy_init_11b_rev6()
631 RF_WRITE(mac, 0x54, 0x98); in bwi_phy_init_11b_rev6()
632 RF_WRITE(mac, 0x5a, 0x88); in bwi_phy_init_11b_rev6()
633 RF_WRITE(mac, 0x5b, 0x6b); in bwi_phy_init_11b_rev6()
634 RF_WRITE(mac, 0x5c, 0xf); in bwi_phy_init_11b_rev6()
635 if (sc->sc_card_flags & BWI_CARD_F_ALT_IQ) { in bwi_phy_init_11b_rev6()
636 RF_WRITE(mac, 0x5d, 0xfa); in bwi_phy_init_11b_rev6()
637 RF_WRITE(mac, 0x5e, 0xd8); in bwi_phy_init_11b_rev6()
639 RF_WRITE(mac, 0x5d, 0xf5); in bwi_phy_init_11b_rev6()
640 RF_WRITE(mac, 0x5e, 0xb8); in bwi_phy_init_11b_rev6()
642 RF_WRITE(mac, 0x73, 0x3); in bwi_phy_init_11b_rev6()
643 RF_WRITE(mac, 0x7d, 0xa8); in bwi_phy_init_11b_rev6()
644 RF_WRITE(mac, 0x7c, 0x1); in bwi_phy_init_11b_rev6()
645 RF_WRITE(mac, 0x7e, 0x8); in bwi_phy_init_11b_rev6()
650 PHY_WRITE(mac, ofs, val); in bwi_phy_init_11b_rev6()
651 val -= 0x202; in bwi_phy_init_11b_rev6()
656 PHY_WRITE(mac, ofs, val); in bwi_phy_init_11b_rev6()
657 val -= 0x202; in bwi_phy_init_11b_rev6()
662 PHY_WRITE(mac, ofs, (val & 0x3f3f)); in bwi_phy_init_11b_rev6()
669 if (phy->phy_mode == IEEE80211_MODE_11G) { in bwi_phy_init_11b_rev6()
670 RF_SETBITS(mac, 0x7a, 0x20); in bwi_phy_init_11b_rev6()
671 RF_SETBITS(mac, 0x51, 0x4); in bwi_phy_init_11b_rev6()
672 PHY_SETBITS(mac, 0x802, 0x100); in bwi_phy_init_11b_rev6()
673 PHY_SETBITS(mac, 0x42b, 0x2000); in bwi_phy_init_11b_rev6()
674 PHY_WRITE(mac, 0x5b, 0); in bwi_phy_init_11b_rev6()
675 PHY_WRITE(mac, 0x5c, 0); in bwi_phy_init_11b_rev6()
679 orig_chan = rf->rf_curchan; in bwi_phy_init_11b_rev6()
681 bwi_rf_set_chan(mac, 1, 0); in bwi_phy_init_11b_rev6()
683 bwi_rf_set_chan(mac, 13, 0); in bwi_phy_init_11b_rev6()
685 RF_WRITE(mac, 0x50, 0x20); in bwi_phy_init_11b_rev6()
686 RF_WRITE(mac, 0x50, 0x23); in bwi_phy_init_11b_rev6()
690 if (rf->rf_rev < 6 || rf->rf_rev == 8) { in bwi_phy_init_11b_rev6()
691 RF_SETBITS(mac, 0x7c, 0x2); in bwi_phy_init_11b_rev6()
692 RF_WRITE(mac, 0x50, 0x20); in bwi_phy_init_11b_rev6()
694 if (rf->rf_rev <= 2) { in bwi_phy_init_11b_rev6()
695 RF_WRITE(mac, 0x7c, 0x20); in bwi_phy_init_11b_rev6()
696 RF_WRITE(mac, 0x5a, 0x70); in bwi_phy_init_11b_rev6()
697 RF_WRITE(mac, 0x5b, 0x7b); in bwi_phy_init_11b_rev6()
698 RF_WRITE(mac, 0x5c, 0xb0); in bwi_phy_init_11b_rev6()
701 RF_FILT_SETBITS(mac, 0x7a, 0xf8, 0x7); in bwi_phy_init_11b_rev6()
703 bwi_rf_set_chan(mac, orig_chan, 0); in bwi_phy_init_11b_rev6()
705 PHY_WRITE(mac, 0x14, 0x200); in bwi_phy_init_11b_rev6()
706 if (rf->rf_rev >= 6) in bwi_phy_init_11b_rev6()
707 PHY_WRITE(mac, 0x2a, 0x88c2); in bwi_phy_init_11b_rev6()
709 PHY_WRITE(mac, 0x2a, 0x8ac0); in bwi_phy_init_11b_rev6()
710 PHY_WRITE(mac, 0x38, 0x668); in bwi_phy_init_11b_rev6()
712 bwi_mac_set_tpctl_11bg(mac, NULL); in bwi_phy_init_11b_rev6()
714 if (rf->rf_rev <= 5) { in bwi_phy_init_11b_rev6()
715 PHY_FILT_SETBITS(mac, 0x5d, 0xff80, 0x3); in bwi_phy_init_11b_rev6()
716 if (rf->rf_rev <= 2) in bwi_phy_init_11b_rev6()
717 RF_WRITE(mac, 0x5d, 0xd); in bwi_phy_init_11b_rev6()
720 if (phy->phy_version == 4) { in bwi_phy_init_11b_rev6()
722 PHY_CLRBITS(mac, 0x61, 0xf000); in bwi_phy_init_11b_rev6()
724 PHY_FILT_SETBITS(mac, 0x2, 0xffc0, 0x4); in bwi_phy_init_11b_rev6()
727 if (phy->phy_mode == IEEE80211_MODE_11B) { in bwi_phy_init_11b_rev6()
729 PHY_WRITE(mac, 0x16, 0x410); in bwi_phy_init_11b_rev6()
730 PHY_WRITE(mac, 0x17, 0x820); in bwi_phy_init_11b_rev6()
731 PHY_WRITE(mac, 0x62, 0x7); in bwi_phy_init_11b_rev6()
733 bwi_rf_init_bcm2050(mac); in bwi_phy_init_11b_rev6()
734 bwi_rf_lo_update(mac); in bwi_phy_init_11b_rev6()
735 if (sc->sc_card_flags & BWI_CARD_F_SW_NRSSI) { in bwi_phy_init_11b_rev6()
736 bwi_rf_calc_nrssi_slope(mac); in bwi_phy_init_11b_rev6()
737 bwi_rf_set_nrssi_thr(mac); in bwi_phy_init_11b_rev6()
739 bwi_mac_init_tpctl_11bg(mac); in bwi_phy_init_11b_rev6()
746 bwi_phy_config_11g(struct bwi_mac *mac) in bwi_phy_config_11g() argument
748 struct bwi_softc *sc = mac->mac_sc; in bwi_phy_config_11g()
749 struct bwi_phy *phy = &mac->mac_phy; in bwi_phy_config_11g()
754 if (phy->phy_rev == 1) { in bwi_phy_config_11g()
755 PHY_WRITE(mac, 0x406, 0x4f19); in bwi_phy_config_11g()
756 PHY_FILT_SETBITS(mac, 0x429, 0xfc3f, 0x340); in bwi_phy_config_11g()
757 PHY_WRITE(mac, 0x42c, 0x5a); in bwi_phy_config_11g()
758 PHY_WRITE(mac, 0x427, 0x1a); in bwi_phy_config_11g()
762 bwi_tbl_write_2(mac, BWI_PHYTBL_FREQ + i, in bwi_phy_config_11g()
768 bwi_tbl_write_2(mac, BWI_PHYTBL_NOISE + i, in bwi_phy_config_11g()
775 bwi_tbl_write_4(mac, BWI_PHYTBL_ROTOR + i, in bwi_phy_config_11g()
779 bwi_nrssi_write(mac, 0xba98, (int16_t)0x7654); /* XXX */ in bwi_phy_config_11g()
781 if (phy->phy_rev == 2) { in bwi_phy_config_11g()
782 PHY_WRITE(mac, 0x4c0, 0x1861); in bwi_phy_config_11g()
783 PHY_WRITE(mac, 0x4c1, 0x271); in bwi_phy_config_11g()
784 } else if (phy->phy_rev > 2) { in bwi_phy_config_11g()
785 PHY_WRITE(mac, 0x4c0, 0x98); in bwi_phy_config_11g()
786 PHY_WRITE(mac, 0x4c1, 0x70); in bwi_phy_config_11g()
787 PHY_WRITE(mac, 0x4c9, 0x80); in bwi_phy_config_11g()
789 PHY_SETBITS(mac, 0x42b, 0x800); in bwi_phy_config_11g()
793 bwi_tbl_write_2(mac, BWI_PHYTBL_RSSI + i, i); in bwi_phy_config_11g()
797 bwi_tbl_write_2(mac, BWI_PHYTBL_NOISE + i, in bwi_phy_config_11g()
805 if (phy->phy_rev <= 2) { in bwi_phy_config_11g()
808 } else if (phy->phy_rev >= 7 && (PHY_READ(mac, 0x449) & 0x200)) { in bwi_phy_config_11g()
816 bwi_tbl_write_2(mac, BWI_PHYTBL_NOISE_SCALE + i, tbl[i]); in bwi_phy_config_11g()
821 if (phy->phy_rev == 2) { in bwi_phy_config_11g()
824 } else if (phy->phy_rev > 2 && phy->phy_rev <= 8) { in bwi_phy_config_11g()
832 bwi_tbl_write_2(mac, BWI_PHYTBL_SIGMA_SQ + i, tbl[i]); in bwi_phy_config_11g()
834 if (phy->phy_rev == 1) { in bwi_phy_config_11g()
837 bwi_tbl_write_4(mac, BWI_PHYTBL_DELAY + i, in bwi_phy_config_11g()
841 /* Fill WRSSI (Wide-Band RSSI) table */ in bwi_phy_config_11g()
843 bwi_tbl_write_2(mac, BWI_PHYTBL_WRSSI_REV1 + i, 0x20); in bwi_phy_config_11g()
845 bwi_phy_config_agc(mac); in bwi_phy_config_11g()
850 /* Fill WRSSI (Wide-Band RSSI) table */ in bwi_phy_config_11g()
852 bwi_tbl_write_2(mac, BWI_PHYTBL_WRSSI + i, 0x820); in bwi_phy_config_11g()
854 bwi_phy_config_agc(mac); in bwi_phy_config_11g()
856 PHY_READ(mac, 0x400); /* Dummy read */ in bwi_phy_config_11g()
857 PHY_WRITE(mac, 0x403, 0x1000); in bwi_phy_config_11g()
858 bwi_tbl_write_2(mac, 0x3c02, 0xf); in bwi_phy_config_11g()
859 bwi_tbl_write_2(mac, 0x3c03, 0x14); in bwi_phy_config_11g()
865 if (!(BWI_IS_BRCM_BU4306(sc) && sc->sc_pci_revid == 0x17)) { in bwi_phy_config_11g()
866 bwi_tbl_write_2(mac, wrd_ofs1, 0x2); in bwi_phy_config_11g()
867 bwi_tbl_write_2(mac, wrd_ofs2, 0x1); in bwi_phy_config_11g()
870 /* phy->phy_flags & BWI_PHY_F_LINKED ? */ in bwi_phy_config_11g()
871 if (sc->sc_card_flags & BWI_CARD_F_PA_GPIO9) in bwi_phy_config_11g()
872 PHY_WRITE(mac, 0x46e, 0x3cf); in bwi_phy_config_11g()
879 bwi_phy_config_agc(struct bwi_mac *mac) in bwi_phy_config_agc() argument
881 struct bwi_phy *phy = &mac->mac_phy; in bwi_phy_config_agc()
884 ofs = phy->phy_rev == 1 ? 0x4c00 : 0; in bwi_phy_config_agc()
886 bwi_tbl_write_2(mac, ofs, 0xfe); in bwi_phy_config_agc()
887 bwi_tbl_write_2(mac, ofs + 1, 0xd); in bwi_phy_config_agc()
888 bwi_tbl_write_2(mac, ofs + 2, 0x13); in bwi_phy_config_agc()
889 bwi_tbl_write_2(mac, ofs + 3, 0x19); in bwi_phy_config_agc()
891 if (phy->phy_rev == 1) { in bwi_phy_config_agc()
892 bwi_tbl_write_2(mac, 0x1800, 0x2710); in bwi_phy_config_agc()
893 bwi_tbl_write_2(mac, 0x1801, 0x9b83); in bwi_phy_config_agc()
894 bwi_tbl_write_2(mac, 0x1802, 0x9b83); in bwi_phy_config_agc()
895 bwi_tbl_write_2(mac, 0x1803, 0xf8d); in bwi_phy_config_agc()
896 PHY_WRITE(mac, 0x455, 0x4); in bwi_phy_config_agc()
899 PHY_FILT_SETBITS(mac, 0x4a5, 0xff, 0x5700); in bwi_phy_config_agc()
900 PHY_FILT_SETBITS(mac, 0x41a, 0xff80, 0xf); in bwi_phy_config_agc()
901 PHY_FILT_SETBITS(mac, 0x41a, 0xc07f, 0x2b80); in bwi_phy_config_agc()
902 PHY_FILT_SETBITS(mac, 0x48c, 0xf0ff, 0x300); in bwi_phy_config_agc()
904 RF_SETBITS(mac, 0x7a, 0x8); in bwi_phy_config_agc()
906 PHY_FILT_SETBITS(mac, 0x4a0, 0xfff0, 0x8); in bwi_phy_config_agc()
907 PHY_FILT_SETBITS(mac, 0x4a1, 0xf0ff, 0x600); in bwi_phy_config_agc()
908 PHY_FILT_SETBITS(mac, 0x4a2, 0xf0ff, 0x700); in bwi_phy_config_agc()
909 PHY_FILT_SETBITS(mac, 0x4a0, 0xf0ff, 0x100); in bwi_phy_config_agc()
911 if (phy->phy_rev == 1) in bwi_phy_config_agc()
912 PHY_FILT_SETBITS(mac, 0x4a2, 0xfff0, 0x7); in bwi_phy_config_agc()
914 PHY_FILT_SETBITS(mac, 0x488, 0xff00, 0x1c); in bwi_phy_config_agc()
915 PHY_FILT_SETBITS(mac, 0x488, 0xc0ff, 0x200); in bwi_phy_config_agc()
916 PHY_FILT_SETBITS(mac, 0x496, 0xff00, 0x1c); in bwi_phy_config_agc()
917 PHY_FILT_SETBITS(mac, 0x489, 0xff00, 0x20); in bwi_phy_config_agc()
918 PHY_FILT_SETBITS(mac, 0x489, 0xc0ff, 0x200); in bwi_phy_config_agc()
919 PHY_FILT_SETBITS(mac, 0x482, 0xff00, 0x2e); in bwi_phy_config_agc()
920 PHY_FILT_SETBITS(mac, 0x496, 0xff, 0x1a00); in bwi_phy_config_agc()
921 PHY_FILT_SETBITS(mac, 0x481, 0xff00, 0x28); in bwi_phy_config_agc()
922 PHY_FILT_SETBITS(mac, 0x481, 0xff, 0x2c00); in bwi_phy_config_agc()
924 if (phy->phy_rev == 1) { in bwi_phy_config_agc()
925 PHY_WRITE(mac, 0x430, 0x92b); in bwi_phy_config_agc()
926 PHY_FILT_SETBITS(mac, 0x41b, 0xffe1, 0x2); in bwi_phy_config_agc()
928 PHY_CLRBITS(mac, 0x41b, 0x1e); in bwi_phy_config_agc()
929 PHY_WRITE(mac, 0x41f, 0x287a); in bwi_phy_config_agc()
930 PHY_FILT_SETBITS(mac, 0x420, 0xfff0, 0x4); in bwi_phy_config_agc()
932 if (phy->phy_rev >= 6) { in bwi_phy_config_agc()
933 PHY_WRITE(mac, 0x422, 0x287a); in bwi_phy_config_agc()
934 PHY_FILT_SETBITS(mac, 0x420, 0xfff, 0x3000); in bwi_phy_config_agc()
938 PHY_FILT_SETBITS(mac, 0x4a8, 0x8080, 0x7874); in bwi_phy_config_agc()
939 PHY_WRITE(mac, 0x48e, 0x1c00); in bwi_phy_config_agc()
941 if (phy->phy_rev == 1) { in bwi_phy_config_agc()
942 PHY_FILT_SETBITS(mac, 0x4ab, 0xf0ff, 0x600); in bwi_phy_config_agc()
943 PHY_WRITE(mac, 0x48b, 0x5e); in bwi_phy_config_agc()
944 PHY_FILT_SETBITS(mac, 0x48c, 0xff00, 0x1e); in bwi_phy_config_agc()
945 PHY_WRITE(mac, 0x48d, 0x2); in bwi_phy_config_agc()
948 bwi_tbl_write_2(mac, ofs + 0x800, 0); in bwi_phy_config_agc()
949 bwi_tbl_write_2(mac, ofs + 0x801, 7); in bwi_phy_config_agc()
950 bwi_tbl_write_2(mac, ofs + 0x802, 16); in bwi_phy_config_agc()
951 bwi_tbl_write_2(mac, ofs + 0x803, 28); in bwi_phy_config_agc()
953 if (phy->phy_rev >= 6) { in bwi_phy_config_agc()
954 PHY_CLRBITS(mac, 0x426, 0x3); in bwi_phy_config_agc()
955 PHY_CLRBITS(mac, 0x426, 0x1000); in bwi_phy_config_agc()
960 bwi_set_gains(struct bwi_mac *mac, const struct bwi_gains *gains) in bwi_set_gains() argument
962 struct bwi_phy *phy = &mac->mac_phy; in bwi_set_gains()
966 if (phy->phy_rev <= 1) { in bwi_set_gains()
976 tbl_gain = gains->tbl_gain1; in bwi_set_gains()
982 bwi_tbl_write_2(mac, tbl_gain_ofs1 + i, tbl_gain); in bwi_set_gains()
987 tbl_gain = gains->tbl_gain2; in bwi_set_gains()
990 bwi_tbl_write_2(mac, tbl_gain_ofs2 + i, tbl_gain); in bwi_set_gains()
993 if (gains == NULL || (gains != NULL && gains->phy_gain != -1)) { in bwi_set_gains()
998 ((uint16_t)gains->phy_gain << 14) | in bwi_set_gains()
999 ((uint16_t)gains->phy_gain << 6); in bwi_set_gains()
1005 PHY_FILT_SETBITS(mac, 0x4a0, 0xbfbf, phy_gain1); in bwi_set_gains()
1006 PHY_FILT_SETBITS(mac, 0x4a1, 0xbfbf, phy_gain1); in bwi_set_gains()
1007 PHY_FILT_SETBITS(mac, 0x4a2, 0xbfbf, phy_gain2); in bwi_set_gains()
1009 bwi_mac_dummy_xmit(mac); in bwi_set_gains()
1015 phy->phy_flags &= ~BWI_CLEAR_PHY_FLAGS; in bwi_phy_clear_state()