Lines Matching full:cons
217 uint32_t cons = cpr->cons; in bnxt_isc_txd_credits_update() local
227 last_cons = cons; in bnxt_isc_txd_credits_update()
231 NEXT_CP_CONS_V(&cpr->ring, cons, v_bit); in bnxt_isc_txd_credits_update()
233 CMPL_PREFETCH_NEXT(cpr, cons); in bnxt_isc_txd_credits_update()
235 if (!CMP_VALID(&cmpl[cons], v_bit)) in bnxt_isc_txd_credits_update()
238 type = cmpl[cons].flags_type & TX_CMPL_TYPE_MASK; in bnxt_isc_txd_credits_update()
241 err = (le16toh(cmpl[cons].errors_v) & in bnxt_isc_txd_credits_update()
248 avail += cmpl[cons].opaque >> 24; in bnxt_isc_txd_credits_update()
259 NEXT_CP_CONS_V(&cpr->ring, cons, v_bit); in bnxt_isc_txd_credits_update()
261 if (!CMP_VALID(&cmpl[cons], v_bit)) { in bnxt_isc_txd_credits_update()
273 cpr->cons = last_cons; in bnxt_isc_txd_credits_update()
365 uint32_t cons = cpr->cons; in bnxt_isc_rxd_available() local
372 NEXT_CP_CONS_V(&cpr->ring, cons, v_bit); in bnxt_isc_rxd_available()
373 CMPL_PREFETCH_NEXT(cpr, cons); in bnxt_isc_rxd_available()
375 if (!CMP_VALID(&cmp[cons], v_bit)) in bnxt_isc_rxd_available()
378 type = le16toh(cmp[cons].type) & CMPL_BASE_TYPE_MASK; in bnxt_isc_rxd_available()
382 rcp = (void *)&cmp[cons]; in bnxt_isc_rxd_available()
385 NEXT_CP_CONS_V(&cpr->ring, cons, v_bit); in bnxt_isc_rxd_available()
386 CMPL_PREFETCH_NEXT(cpr, cons); in bnxt_isc_rxd_available()
388 if (!CMP_VALID(&cmp[cons], v_bit)) in bnxt_isc_rxd_available()
393 NEXT_CP_CONS_V(&cpr->ring, cons, v_bit); in bnxt_isc_rxd_available()
394 CMPL_PREFETCH_NEXT(cpr, cons); in bnxt_isc_rxd_available()
395 if (!CMP_VALID(&cmp[cons], v_bit)) in bnxt_isc_rxd_available()
401 rtpae = (void *)&cmp[cons]; in bnxt_isc_rxd_available()
405 NEXT_CP_CONS_V(&cpr->ring, cons, v_bit); in bnxt_isc_rxd_available()
406 CMPL_PREFETCH_NEXT(cpr, cons); in bnxt_isc_rxd_available()
408 if (!CMP_VALID(&cmp[cons], v_bit)) in bnxt_isc_rxd_available()
412 NEXT_CP_CONS_V(&cpr->ring, cons, v_bit); in bnxt_isc_rxd_available()
413 CMPL_PREFETCH_NEXT(cpr, cons); in bnxt_isc_rxd_available()
414 if (!CMP_VALID(&cmp[cons], v_bit)) in bnxt_isc_rxd_available()
420 NEXT_CP_CONS_V(&cpr->ring, cons, v_bit); in bnxt_isc_rxd_available()
421 CMPL_PREFETCH_NEXT(cpr, cons); in bnxt_isc_rxd_available()
423 if (!CMP_VALID(&cmp[cons], v_bit)) in bnxt_isc_rxd_available()
435 NEXT_CP_CONS_V(&cpr->ring, cons, v_bit); in bnxt_isc_rxd_available()
436 CMPL_PREFETCH_NEXT(cpr, cons); in bnxt_isc_rxd_available()
438 if (!CMP_VALID(&cmp[cons], v_bit)) in bnxt_isc_rxd_available()
494 rcp = &((struct rx_pkt_cmpl *)cpr->ring.vaddr)[cpr->cons]; in bnxt_pkt_get_l2()
514 NEXT_CP_CONS_V(&cpr->ring, cpr->cons, cpr->v_bit); in bnxt_pkt_get_l2()
517 rcph = &((struct rx_pkt_cmpl_hi *)cpr->ring.vaddr)[cpr->cons]; in bnxt_pkt_get_l2()
546 NEXT_CP_CONS_V(&cpr->ring, cpr->cons, cpr->v_bit); in bnxt_pkt_get_l2()
549 acp = &((struct rx_abuf_cmpl *)cpr->ring.vaddr)[cpr->cons]; in bnxt_pkt_get_l2()
566 &((struct rx_tpa_end_cmpl *)cpr->ring.vaddr)[cpr->cons]; in bnxt_pkt_get_tpa()
597 NEXT_CP_CONS_V(&cpr->ring, cpr->cons, cpr->v_bit); in bnxt_pkt_get_tpa()
623 NEXT_CP_CONS_V(&cpr->ring, cpr->cons, cpr->v_bit); in bnxt_pkt_get_tpa()
626 acp = &((struct rx_abuf_cmpl *)cpr->ring.vaddr)[cpr->cons]; in bnxt_pkt_get_tpa()
660 NEXT_CP_CONS_V(&cpr->ring, cpr->cons, cpr->v_bit); in bnxt_isc_rxd_pkt_get()
663 CMPL_PREFETCH_NEXT(cpr, cpr->cons); in bnxt_isc_rxd_pkt_get()
664 cmp = &((struct cmpl_base *)cpr->ring.vaddr)[cpr->cons]; in bnxt_isc_rxd_pkt_get()
677 rtpa = (void *)&cmp_q[cpr->cons]; in bnxt_isc_rxd_pkt_get()
683 NEXT_CP_CONS_V(&cpr->ring, cpr->cons, cpr->v_bit); in bnxt_isc_rxd_pkt_get()
686 CMPL_PREFETCH_NEXT(cpr, cpr->cons); in bnxt_isc_rxd_pkt_get()
689 ((struct rx_tpa_start_cmpl_hi *)cmp_q)[cpr->cons]; in bnxt_isc_rxd_pkt_get()
696 NEXT_CP_CONS_V(&cpr->ring, cpr->cons, in bnxt_isc_rxd_pkt_get()
701 CMPL_PREFETCH_NEXT(cpr, cpr->cons); in bnxt_isc_rxd_pkt_get()